arm: tegra: cardhu: pm269 board support for sh532u
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-pm298-power-rails.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/gpio.h>
26 #include <linux/io.h>
27 #include <linux/regulator/gpio-switch-regulator.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/regulator/max77663-regulator.h>
30
31 #include <mach/iomap.h>
32 #include <mach/irqs.h>
33 #include <mach/pinmux.h>
34 #include <mach/edp.h>
35
36 #include "gpio-names.h"
37 #include "board.h"
38 #include "board-cardhu.h"
39 #include "pm.h"
40 #include "wakeups-t3.h"
41
42 #define PMC_CTRL                0x0
43 #define PMC_CTRL_INTR_LOW       BIT(17)
44
45 static struct regulator_consumer_supply max77663_sd0_supply[] = {
46         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
47         REGULATOR_SUPPLY("vdd_cpu", NULL),
48         REGULATOR_SUPPLY("vdd_sys", NULL),
49 };
50
51 static struct regulator_consumer_supply max77663_sd1_supply[] = {
52         REGULATOR_SUPPLY("vdd_core", NULL),
53         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
54 };
55
56 static struct regulator_consumer_supply max77663_sd2_supply[] = {
57         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
58         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
59         REGULATOR_SUPPLY("avdd_osc", NULL),
60         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
61         REGULATOR_SUPPLY("vddio_uart", NULL),
62         REGULATOR_SUPPLY("pwrdet_uart", NULL),
63         REGULATOR_SUPPLY("vddio_audio", NULL),
64         REGULATOR_SUPPLY("pwrdet_audio", NULL),
65         REGULATOR_SUPPLY("vddio_bb", NULL),
66         REGULATOR_SUPPLY("pwrdet_bb", NULL),
67         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
68         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
69         REGULATOR_SUPPLY("vddio_cam", NULL),
70         REGULATOR_SUPPLY("pwrdet_cam", NULL),
71         REGULATOR_SUPPLY("vddio_vi", NULL),
72         REGULATOR_SUPPLY("pwrdet_vi", NULL),
73         REGULATOR_SUPPLY("ldo6", NULL),
74         REGULATOR_SUPPLY("ldo7", NULL),
75         REGULATOR_SUPPLY("ldo8", NULL),
76         REGULATOR_SUPPLY("vcore_audio", NULL),
77         REGULATOR_SUPPLY("avcore_audio", NULL),
78         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
79         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
80         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
81         REGULATOR_SUPPLY("vcom_1v8", NULL),
82         REGULATOR_SUPPLY("pmuio_1v8", NULL),
83         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
84         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
85 };
86
87 static struct regulator_consumer_supply max77663_sd3_supply[] = {
88         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
89         REGULATOR_SUPPLY("vcore_lcd", NULL),
90         REGULATOR_SUPPLY("track_ldo1", NULL),
91         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
92         REGULATOR_SUPPLY("vcore_cam1", NULL),
93         REGULATOR_SUPPLY("vcore_cam2", NULL),
94         REGULATOR_SUPPLY("avdd_pexb", NULL),
95         REGULATOR_SUPPLY("vdd_pexb", NULL),
96         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
97         REGULATOR_SUPPLY("avdd_pexa", NULL),
98         REGULATOR_SUPPLY("vdd_pexa", NULL),
99         REGULATOR_SUPPLY("vcom_1v2", NULL),
100         REGULATOR_SUPPLY("vdio_hsic", NULL),
101 };
102
103 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
104         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
105 };
106
107 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
108         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
109         REGULATOR_SUPPLY("avdd_pllm", NULL),
110         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
111         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
112         REGULATOR_SUPPLY("avdd_pllx", NULL),
113 };
114
115 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
116         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
117         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
118 };
119
120 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
121         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
122         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
123 };
124
125 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
126         REGULATOR_SUPPLY("vdd_rtc", NULL),
127 };
128
129 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
130         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
131         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
132 };
133
134 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
135         REGULATOR_SUPPLY("vddio_sys", NULL),
136 };
137
138 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
139         REGULATOR_SUPPLY("unused_ldo7", NULL),
140 };
141
142 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
143         REGULATOR_SUPPLY("vcore_mmc", NULL),
144 };
145
146 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
147         {
148                 .src = FPS_SRC_0,
149                 .en_src = FPS_EN_SRC_EN0,
150                 .time_period = FPS_TIME_PERIOD_DEF,
151         },
152         {
153                 .src = FPS_SRC_1,
154                 .en_src = FPS_EN_SRC_EN1,
155                 .time_period = FPS_TIME_PERIOD_DEF,
156         },
157         {
158                 .src = FPS_SRC_2,
159                 .en_src = FPS_EN_SRC_EN0,
160                 .time_period = FPS_TIME_PERIOD_DEF,
161         },
162 };
163
164 #define MAX77663_PDATA_INIT(_id, _min_uV, _max_uV, _supply_reg,         \
165                             _always_on, _boot_on, _apply_uV,            \
166                             _init_apply, _init_enable, _init_uV,        \
167                             _fps_src, _fps_pu_period, _fps_pd_period, _flags) \
168         static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id = \
169         {                                                               \
170                 .init_data = {                                          \
171                         .constraints = {                                \
172                                 .min_uV = _min_uV,                      \
173                                 .max_uV = _max_uV,                      \
174                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
175                                                      REGULATOR_MODE_STANDBY), \
176                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
177                                                    REGULATOR_CHANGE_STATUS |  \
178                                                    REGULATOR_CHANGE_VOLTAGE), \
179                                 .always_on = _always_on,                \
180                                 .boot_on = _boot_on,                    \
181                                 .apply_uV = _apply_uV,                  \
182                         },                                              \
183                         .num_consumer_supplies =                        \
184                                 ARRAY_SIZE(max77663_##_id##_supply),    \
185                         .consumer_supplies = max77663_##_id##_supply,   \
186                         .supply_regulator = _supply_reg,                \
187                 },                                                      \
188                 .init_apply = _init_apply,                              \
189                 .init_enable = _init_enable,                            \
190                 .init_uV = _init_uV,                                    \
191                 .fps_src = _fps_src,                                    \
192                 .fps_pu_period = _fps_pu_period,                        \
193                 .fps_pd_period = _fps_pd_period,                        \
194                 .fps_cfgs = max77663_fps_cfgs,                          \
195                 .flags = _flags,                                        \
196         }
197
198 MAX77663_PDATA_INIT(sd0,  600000, 3387500, NULL, 1, 0, 0,
199                     0, 0, -1, FPS_SRC_NONE, -1, -1, EN2_CTRL_SD0 | SD_FSRADE_DISABLE);
200
201 MAX77663_PDATA_INIT(sd1,  800000, 1587500, NULL, 1, 0, 0,
202                     1, 1, -1, FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
203
204 MAX77663_PDATA_INIT(sd2,  600000, 3387500, NULL, 1, 0, 0,
205                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
206
207 MAX77663_PDATA_INIT(sd3,  600000, 3387500, NULL, 0, 0, 0,
208                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
209
210 MAX77663_PDATA_INIT(ldo0, 800000, 2350000, max77663_rails(sd2), 0, 0, 0,
211                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
212
213 MAX77663_PDATA_INIT(ldo1, 800000, 2350000, max77663_rails(sd2), 0, 0, 0,
214                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
215
216 MAX77663_PDATA_INIT(ldo2, 800000, 3950000, max77663_rails(sd2), 0, 0, 0,
217                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
218
219 MAX77663_PDATA_INIT(ldo3, 800000, 3950000, NULL, 0, 0, 0,
220                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
221
222 MAX77663_PDATA_INIT(ldo4, 800000, 1587500, NULL, 0, 0, 0,
223                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
224
225 MAX77663_PDATA_INIT(ldo5, 800000, 3950000, NULL, 0, 0, 0,
226                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
227
228 MAX77663_PDATA_INIT(ldo6, 800000, 3950000, NULL, 1, 0, 0,
229                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
230
231 MAX77663_PDATA_INIT(ldo7, 800000, 3950000, NULL, 0, 0, 0,
232                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
233
234 MAX77663_PDATA_INIT(ldo8, 800000, 3950000, NULL, 0, 0, 0,
235                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
236
237 #define MAX77663_REG(_id, _data)                                        \
238         {                                                               \
239                 .name = "max77663-regulator",                           \
240                 .id = MAX77663_REGULATOR_ID_##_id,                      \
241                 .platform_data = &max77663_regulator_pdata_##_data,     \
242                 .pdata_size = sizeof(max77663_regulator_pdata_##_data), \
243         }
244
245 #define MAX77663_RTC()                                                  \
246         {                                                               \
247                 .name = "max77663-rtc",                                 \
248                 .id = 0,                                                \
249         }
250
251 static struct mfd_cell max77663_subdevs[] = {
252         MAX77663_REG(SD0, sd0),
253         MAX77663_REG(SD1, sd1),
254         MAX77663_REG(SD2, sd2),
255         MAX77663_REG(SD3, sd3),
256         MAX77663_REG(LDO0, ldo0),
257         MAX77663_REG(LDO1, ldo1),
258         MAX77663_REG(LDO2, ldo2),
259         MAX77663_REG(LDO3, ldo3),
260         MAX77663_REG(LDO4, ldo4),
261         MAX77663_REG(LDO5, ldo5),
262         MAX77663_REG(LDO6, ldo6),
263         MAX77663_REG(LDO7, ldo7),
264         MAX77663_REG(LDO8, ldo8),
265         MAX77663_RTC(),
266 };
267
268 struct max77663_gpio_config max77663_gpio_cfgs[] = {
269         {
270                 .gpio = MAX77663_GPIO0,
271                 .dir = GPIO_DIR_OUT,
272                 .dout = GPIO_DOUT_LOW,
273                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
274                 .alternate = GPIO_ALT_DISABLE,
275         },
276         {
277                 .gpio = MAX77663_GPIO1,
278                 .dir = GPIO_DIR_OUT,
279                 .dout = GPIO_DOUT_HIGH,
280                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
281                 .alternate = GPIO_ALT_DISABLE,
282         },
283         {
284                 .gpio = MAX77663_GPIO2,
285                 .dir = GPIO_DIR_OUT,
286                 .dout = GPIO_DOUT_HIGH,
287                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
288                 .alternate = GPIO_ALT_DISABLE,
289         },
290         {
291                 .gpio = MAX77663_GPIO3,
292                 .dir = GPIO_DIR_OUT,
293                 .dout = GPIO_DOUT_HIGH,
294                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
295                 .alternate = GPIO_ALT_DISABLE,
296         },
297         {
298                 .gpio = MAX77663_GPIO4,
299                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
300                 .alternate = GPIO_ALT_ENABLE,
301         },
302         {
303                 .gpio = MAX77663_GPIO5,
304                 .dir = GPIO_DIR_OUT,
305                 .dout = GPIO_DOUT_LOW,
306                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
307                 .alternate = GPIO_ALT_DISABLE,
308         },
309         {
310                 .gpio = MAX77663_GPIO6,
311                 .dir = GPIO_DIR_OUT,
312                 .dout = GPIO_DOUT_LOW,
313                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
314                 .alternate = GPIO_ALT_DISABLE,
315         },
316         {
317                 .gpio = MAX77663_GPIO7,
318                 .dir = GPIO_DIR_OUT,
319                 .dout = GPIO_DOUT_LOW,
320                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
321                 .alternate = GPIO_ALT_DISABLE,
322         },
323 };
324
325 static struct max77663_platform_data max7763_pdata = {
326         .irq_base       = MAX77663_IRQ_BASE,
327         .gpio_base      = MAX77663_GPIO_BASE,
328
329         .num_gpio_cfgs = ARRAY_SIZE(max77663_gpio_cfgs),
330         .gpio_cfgs = max77663_gpio_cfgs,
331
332         .num_subdevs    = ARRAY_SIZE(max77663_subdevs),
333         .sub_devices    = max77663_subdevs,
334 };
335
336 static struct i2c_board_info __initdata max77663_regulators[] = {
337         {
338                 /* The I2C address was determined by OTP factory setting */
339                 I2C_BOARD_INFO("max77663", 0x1C),
340                 .irq            = INT_EXTERNAL_PMU,
341                 .platform_data  = &max7763_pdata,
342         },
343 };
344
345 int __init cardhu_pm298_regulator_init(void)
346 {
347         struct board_info board_info;
348         struct board_info pmu_board_info;
349         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
350         u32 pmc_ctrl;
351
352         /* configure the power management controller to trigger PMU
353          * interrupts when low */
354         pmc_ctrl = readl(pmc + PMC_CTRL);
355         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
356
357         /* The regulator details have complete constraints */
358         tegra_get_board_info(&board_info);
359         tegra_get_pmu_board_info(&pmu_board_info);
360         if (pmu_board_info.board_id != BOARD_PMU_PM298) {
361                 pr_err("%s(): Board ID is not proper\n", __func__);
362                 return -ENODEV;
363         }
364
365         i2c_register_board_info(4, max77663_regulators,
366                                 ARRAY_SIZE(max77663_regulators));
367
368         return 0;
369 }
370
371 static struct regulator_consumer_supply gpio_switch_en_track_ldo2_supply[] = {
372         REGULATOR_SUPPLY("avdd_sata", NULL),
373         REGULATOR_SUPPLY("vdd_sata", NULL),
374         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
375         REGULATOR_SUPPLY("avdd_plle", NULL),
376 };
377 static int gpio_switch_en_track_ldo2_voltages[] = { 3300};
378
379 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
380         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
381         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
382         REGULATOR_SUPPLY("vdd_hall", NULL),
383         REGULATOR_SUPPLY("vterm_ddr", NULL),
384         REGULATOR_SUPPLY("v2ref_ddr", NULL),
385 };
386 static int gpio_switch_en_5v0_voltages[] = { 5000};
387
388 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
389         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
390         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
391 };
392 static int gpio_switch_en_ddr_voltages[] = { 1500};
393
394 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
395         REGULATOR_SUPPLY("avdd_vdac", NULL),
396         REGULATOR_SUPPLY("vdd_lvds", NULL),
397         REGULATOR_SUPPLY("vdd_pnl", NULL),
398         REGULATOR_SUPPLY("vcom_3v3", NULL),
399         REGULATOR_SUPPLY("vdd_3v3", NULL),
400         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
401         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
402         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
403         REGULATOR_SUPPLY("avdd_hdmi", NULL),
404         REGULATOR_SUPPLY("vpp_fuse", NULL),
405         REGULATOR_SUPPLY("avdd_usb", NULL),
406         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
407         REGULATOR_SUPPLY("vcore_nand", NULL),
408         REGULATOR_SUPPLY("hvdd_sata", NULL),
409         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
410         REGULATOR_SUPPLY("pwrdet_nand", NULL),
411         REGULATOR_SUPPLY("avdd_cam1", NULL),
412         REGULATOR_SUPPLY("vdd_af", NULL),
413         REGULATOR_SUPPLY("avdd_cam2", NULL),
414         REGULATOR_SUPPLY("vdd_acc", NULL),
415         REGULATOR_SUPPLY("vdd_phtl", NULL),
416         REGULATOR_SUPPLY("vddio_tp", NULL),
417         REGULATOR_SUPPLY("vdd_led", NULL),
418         REGULATOR_SUPPLY("vddio_cec", NULL),
419         REGULATOR_SUPPLY("vdd_cmps", NULL),
420         REGULATOR_SUPPLY("vdd_temp", NULL),
421         REGULATOR_SUPPLY("vpp_kfuse", NULL),
422         REGULATOR_SUPPLY("vddio_ts", NULL),
423         REGULATOR_SUPPLY("vdd_ir_led", NULL),
424         REGULATOR_SUPPLY("vddio_1wire", NULL),
425         REGULATOR_SUPPLY("avddio_audio", NULL),
426         REGULATOR_SUPPLY("vdd_ec", NULL),
427         REGULATOR_SUPPLY("vcom_pa", NULL),
428         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
429         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
430         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
431         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
432         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
433         REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
434         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
435         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
436         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
437         REGULATOR_SUPPLY("debug_cons", NULL),
438         REGULATOR_SUPPLY("vdd", "4-004c"),
439 };
440 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
441
442 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
443 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
444         REGULATOR_SUPPLY("master_5v_switch", NULL),
445 };
446 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
447
448 /* EN_VDD_BL */
449 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
450         REGULATOR_SUPPLY("vdd_backlight", NULL),
451         REGULATOR_SUPPLY("vdd_backlight1", NULL),
452 };
453 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
454
455 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
456 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
457         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
458         REGULATOR_SUPPLY("vdd_mini_card", NULL),
459 };
460 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
461
462 /* EN_USB1_VBUS_OC*/
463 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
464         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
465 };
466 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
467
468 /*EN_USB3_VBUS_OC*/
469 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
470         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
471 };
472 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
473
474 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
475 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
476         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
477 };
478 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
479
480 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
481 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
482         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
483 };
484 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
485
486 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
487 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
488         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
489         REGULATOR_SUPPLY("vdd", "6-0072"),
490 };
491 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
492
493 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
494 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
495         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
496         REGULATOR_SUPPLY("vdd", "7-0072"),
497 };
498 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
499
500 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
501 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
502         REGULATOR_SUPPLY("vdd_cam3", NULL),
503 };
504 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
505
506 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
507 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
508         REGULATOR_SUPPLY("vdd_com_bd", NULL),
509 };
510 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
511
512 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
513 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
514         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
515 };
516 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
517
518 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
519 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
520         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
521 };
522 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
523
524 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
525 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
526         REGULATOR_SUPPLY("hvdd_pex", NULL),
527 };
528 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
529
530 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
531 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
532         REGULATOR_SUPPLY("vdd_fuse", NULL),
533 };
534 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
535
536 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
537 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
538         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
539         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
540         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
541         REGULATOR_SUPPLY("vdd_i2c", "6-0072"),
542         REGULATOR_SUPPLY("vdd_i2c", "7-0072"),
543         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
544 };
545 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
546
547 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
548         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
549 };
550 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
551
552 static int enable_load_switch_rail(
553                 struct gpio_switch_regulator_subdev_data *psubdev_data)
554 {
555         int ret;
556
557         if (psubdev_data->pin_group <= 0)
558                 return -EINVAL;
559
560         /* Tristate and make pin as input*/
561         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
562                                                 TEGRA_TRI_TRISTATE);
563         if (ret < 0)
564                 return ret;
565         return gpio_direction_input(psubdev_data->gpio_nr);
566 }
567
568 static int disable_load_switch_rail(
569                 struct gpio_switch_regulator_subdev_data *psubdev_data)
570 {
571         int ret;
572
573         if (psubdev_data->pin_group <= 0)
574                 return -EINVAL;
575
576         /* Un-tristate and driver low */
577         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
578                                                 TEGRA_TRI_NORMAL);
579         if (ret < 0)
580                 return ret;
581         return gpio_direction_output(psubdev_data->gpio_nr, 0);
582 }
583
584
585 /* Macro for defining gpio switch regulator sub device data */
586 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
587         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
588         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
589         {                                                               \
590                 .regulator_name = "gpio-switch-"#_name,                 \
591                 .input_supply   = _input_supply,                        \
592                 .id             = _id,                                  \
593                 .gpio_nr        = _gpio_nr,                             \
594                 .pin_group      = _pg,                                  \
595                 .active_low     = _active_low,                          \
596                 .init_state     = _init_state,                          \
597                 .voltages       = gpio_switch_##_name##_voltages,       \
598                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
599                 .num_consumer_supplies =                                \
600                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
601                 .consumer_supplies = gpio_switch_##_name##_supply,      \
602                 .constraints = {                                        \
603                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
604                                              REGULATOR_MODE_STANDBY),   \
605                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
606                                            REGULATOR_CHANGE_STATUS |    \
607                                            REGULATOR_CHANGE_VOLTAGE),   \
608                         .always_on = _always_on,                        \
609                         .boot_on = _boot_on,                            \
610                 },                                                      \
611                 .enable_rail = _enable,                                 \
612                 .disable_rail = _disable,                               \
613         }
614
615 /* common to most of boards*/
616 GREG_INIT(0, en_track_ldo2,     en_track_ldo2,  NULL,                   0,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO0,    false,  0,      0,      0,      0);
617 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   1,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO2,    false,  1,      0,      0,      0);
618 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   1,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO3,    false,  1,      0,      0,      0);
619 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   1,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO1,    false,  1,      0,      0,      0);
620 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   0,      0,      TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
621 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   1,      0,      TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
622 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
623 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
624 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
625 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
626 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
627 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
628 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "hvdd_pex_pmu",        0,      0,      TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
629 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           0,      0,      TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
630
631 /*Specific to pm269*/
632 GREG_INIT(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,
633         0,      0,      TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
634 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
635         0,      0,      TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
636 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
637         0,      0,      TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
638 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "hvdd_pex_pmu",
639         0,      0,      TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
640 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
641         0,      0,      TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
642         enable_load_switch_rail, disable_load_switch_rail);
643
644 /* Specific to E1187/E1186/E1256 */
645 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
646                 0,      0,      TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
647 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
648                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
649                 enable_load_switch_rail, disable_load_switch_rail);
650 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
651                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
652                 enable_load_switch_rail, disable_load_switch_rail);
653 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
654                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
655                 enable_load_switch_rail, disable_load_switch_rail);
656
657 /* E1198/E1291 specific*/
658 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
659 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
660
661 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      0,      0,      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
662
663 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
664
665 #define COMMON_GPIO_REG \
666         ADD_GPIO_REG(en_track_ldo2),            \
667         ADD_GPIO_REG(en_5v0),                   \
668         ADD_GPIO_REG(en_ddr),                   \
669         ADD_GPIO_REG(en_3v3_sys),               \
670         ADD_GPIO_REG(en_3v3_modem),             \
671         ADD_GPIO_REG(en_vdd_pnl1),              \
672         ADD_GPIO_REG(cam1_ldo_en),              \
673         ADD_GPIO_REG(cam2_ldo_en),              \
674         ADD_GPIO_REG(cam3_ldo_en),              \
675         ADD_GPIO_REG(en_vdd_com),               \
676         ADD_GPIO_REG(en_3v3_fuse),              \
677         ADD_GPIO_REG(en_3v3_emmc),              \
678         ADD_GPIO_REG(en_vdd_sdmmc1),            \
679         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
680         ADD_GPIO_REG(en_1v8_cam),
681
682 #define PM269_GPIO_REG \
683         ADD_GPIO_REG(en_track_ldo2),            \
684         ADD_GPIO_REG(en_5v0),                   \
685         ADD_GPIO_REG(en_ddr),                   \
686         ADD_GPIO_REG(en_vdd_bl_pm269),          \
687         ADD_GPIO_REG(en_3v3_sys),               \
688         ADD_GPIO_REG(en_3v3_modem),             \
689         ADD_GPIO_REG(en_vdd_pnl1_pm269),        \
690         ADD_GPIO_REG(cam1_ldo_en),              \
691         ADD_GPIO_REG(cam2_ldo_en),              \
692         ADD_GPIO_REG(cam3_ldo_en),              \
693         ADD_GPIO_REG(en_vdd_com),               \
694         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
695         ADD_GPIO_REG(en_3v3_emmc),              \
696         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
697         ADD_GPIO_REG(en_1v8_cam),               \
698         ADD_GPIO_REG(dis_5v_switch_e118x),      \
699         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
700         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
701         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
702
703 #define E118x_GPIO_REG  \
704         ADD_GPIO_REG(en_vdd_bl),                \
705         ADD_GPIO_REG(dis_5v_switch_e118x),      \
706         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
707         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
708         ADD_GPIO_REG(en_vddio_vid_oc_e118x),    \
709         ADD_GPIO_REG(en_vbrtr),
710
711 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
712 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
713         COMMON_GPIO_REG
714         E118x_GPIO_REG
715 };
716
717 /* Gpio switch regulator platform data for PM269*/
718 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
719         PM269_GPIO_REG
720 };
721
722 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
723 static struct platform_device gswitch_regulator_pdata = {
724         .name = "gpio-switch-regulator",
725         .id   = -1,
726         .dev  = {
727              .platform_data = &gswitch_pdata,
728         },
729 };
730
731 int __init cardhu_pm298_gpio_switch_regulator_init(void)
732 {
733         int i;
734         struct board_info board_info;
735         tegra_get_board_info(&board_info);
736
737         switch (board_info.board_id) {
738         case BOARD_PM269:
739         case BOARD_PM305:
740         case BOARD_PM311:
741         case BOARD_E1257:
742                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
743                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
744                 break;
745
746         default:
747                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
748                 gswitch_pdata.subdevs = gswitch_subdevs_e118x;
749                 break;
750         }
751
752         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
753                 struct gpio_switch_regulator_subdev_data *gswitch_data =
754                                                 gswitch_pdata.subdevs[i];
755                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
756                         tegra_gpio_enable(gswitch_data->gpio_nr);
757         }
758
759         return platform_device_register(&gswitch_regulator_pdata);
760 }