arm: tegra: cardhu: Added dsi board support.
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-panel.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-panel.c
3  *
4  * Copyright (c) 2010, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/gpio.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/resource.h>
25 #include <asm/mach-types.h>
26 #include <linux/platform_device.h>
27 #include <linux/pwm_backlight.h>
28 #include <mach/nvhost.h>
29 #include <mach/nvmap.h>
30 #include <mach/irqs.h>
31 #include <mach/iomap.h>
32 #include <mach/dc.h>
33 #include <mach/fb.h>
34
35 #include "board.h"
36 #include "board-cardhu.h"
37 #include "devices.h"
38 #include "gpio-names.h"
39
40 #ifdef CONFIG_TEGRA_CARDHU_DSI
41 /* Select panel to be used. */
42 #define DSI_PANEL_219 0
43 #define DSI_PANEL_218 1
44 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
45 #endif
46
47 #define cardhu_lvds_shutdown    TEGRA_GPIO_PL2
48 #define cardhu_bl_enb           TEGRA_GPIO_PH2
49 #define cardhu_hdmi_hpd         TEGRA_GPIO_PN7
50
51 #ifdef DSI_PANEL_219
52 #define cardhu_dsia_bl_enb      TEGRA_GPIO_PW1
53 #define cardhu_dsib_bl_enb      TEGRA_GPIO_PW0
54 #define cardhu_dsi_panel_reset  TEGRA_GPIO_PD2
55 #endif
56
57 static struct regulator *cardhu_hdmi_reg = NULL;
58 static struct regulator *cardhu_hdmi_pll = NULL;
59 static struct regulator *cardhu_hdmi_vddio = NULL;
60
61 static int cardhu_backlight_init(struct device *dev) {
62         int ret;
63
64 #ifndef CONFIG_TEGRA_CARDHU_DSI
65         ret = gpio_request(cardhu_bl_enb, "backlight_enb");
66         if (ret < 0)
67                 return ret;
68
69         ret = gpio_direction_output(cardhu_bl_enb, 1);
70         if (ret < 0)
71                 gpio_free(cardhu_bl_enb);
72         else
73                 tegra_gpio_enable(cardhu_bl_enb);
74 #else
75         #if DSI_PANEL_219
76         /* Enable back light for DSIa panel */
77         printk("cardhu_dsi_backlight_init\n");
78         ret = gpio_request(cardhu_dsia_bl_enb, "dsia_bl_enable");
79         if (ret < 0)
80                 return ret;
81
82         ret = gpio_direction_output(cardhu_dsia_bl_enb, 1);
83         if (ret < 0)
84                 gpio_free(cardhu_dsia_bl_enb);
85         else
86                 tegra_gpio_enable(cardhu_dsia_bl_enb);
87
88         /* Enable back light for DSIb panel */
89         ret = gpio_request(cardhu_dsib_bl_enb, "dsib_bl_enable");
90         if (ret < 0)
91                 return ret;
92
93         ret = gpio_direction_output(cardhu_dsib_bl_enb, 1);
94         if (ret < 0)
95                 gpio_free(cardhu_dsib_bl_enb);
96         else
97                 tegra_gpio_enable(cardhu_dsib_bl_enb);
98         #endif
99
100 #endif
101         return ret;
102 };
103
104 static void cardhu_backlight_exit(struct device *dev) {
105 #ifndef CONFIG_TEGRA_CARDHU_DSI
106         int ret;
107         ret = gpio_request(cardhu_bl_enb, "backlight_enb");
108         gpio_set_value(cardhu_bl_enb, 0);
109         gpio_free(cardhu_bl_enb);
110         tegra_gpio_disable(cardhu_bl_enb);
111 #else
112         #if DSI_PANEL_219
113         /* Disable back light for DSIa panel */
114         gpio_set_value(cardhu_dsia_bl_enb, 0);
115         gpio_free(cardhu_dsia_bl_enb);
116         tegra_gpio_disable(cardhu_dsia_bl_enb);
117
118         /* Disable back light for DSIb panel */
119         gpio_set_value(cardhu_dsib_bl_enb, 0);
120         gpio_free(cardhu_dsib_bl_enb);
121         tegra_gpio_disable(cardhu_dsib_bl_enb);
122
123         gpio_set_value(TEGRA_GPIO_PL2, 1);
124         mdelay(20);
125         #endif
126 #endif
127 }
128
129 static int cardhu_backlight_notify(struct device *unused, int brightness)
130 {
131 #ifndef CONFIG_TEGRA_CARDHU_DSI
132         int ret;
133         ret = gpio_request(cardhu_bl_enb, "backlight_enb");
134         gpio_set_value(cardhu_bl_enb, !!brightness);
135 #else
136         #if DSI_PANEL_219
137         /* DSIa */
138         gpio_set_value(cardhu_dsia_bl_enb, !!brightness);
139
140         /* DSIb */
141         gpio_set_value(cardhu_dsib_bl_enb, !!brightness);
142         #endif
143 #endif
144         return brightness;
145 }
146
147 static struct platform_pwm_backlight_data cardhu_backlight_data = {
148         .pwm_id         = 0,
149         .max_brightness = 255,
150         .dft_brightness = 224,
151         .pwm_period_ns  = 5000000,
152         .init           = cardhu_backlight_init,
153         .exit           = cardhu_backlight_exit,
154         .notify         = cardhu_backlight_notify,
155 };
156
157 static struct platform_device cardhu_backlight_device = {
158         .name   = "pwm-backlight",
159         .id     = -1,
160         .dev    = {
161                 .platform_data = &cardhu_backlight_data,
162         },
163 };
164
165 static int cardhu_panel_enable(void)
166 {
167         static struct regulator *reg = NULL;
168
169         if (reg == NULL) {
170                 reg = regulator_get(NULL, "avdd_lvds");
171                 if (WARN_ON(IS_ERR(reg)))
172                         pr_err("%s: couldn't get regulator avdd_lvds: %ld\n",
173                                __func__, PTR_ERR(reg));
174                 else
175                         regulator_enable(reg);
176         }
177
178         gpio_set_value(cardhu_lvds_shutdown, 1);
179         return 0;
180 }
181
182 static int cardhu_panel_disable(void)
183 {
184         gpio_set_value(cardhu_lvds_shutdown, 0);
185         return 0;
186 }
187
188 static int cardhu_hdmi_enable(void)
189 {
190         int ret;
191         if (!cardhu_hdmi_reg) {
192                 cardhu_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
193                 if (IS_ERR_OR_NULL(cardhu_hdmi_reg)) {
194                         pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
195                         cardhu_hdmi_reg = NULL;
196                         return PTR_ERR(cardhu_hdmi_reg);
197                 }
198         }
199         ret = regulator_enable(cardhu_hdmi_reg);
200         if (ret < 0) {
201                 pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
202                 return ret;
203         }
204         if (!cardhu_hdmi_pll) {
205                 cardhu_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
206                 if (IS_ERR_OR_NULL(cardhu_hdmi_pll)) {
207                         pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
208                         cardhu_hdmi_pll = NULL;
209                         regulator_put(cardhu_hdmi_reg);
210                         cardhu_hdmi_reg = NULL;
211                         return PTR_ERR(cardhu_hdmi_pll);
212                 }
213         }
214         ret = regulator_enable(cardhu_hdmi_pll);
215         if (ret < 0) {
216                 pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
217                 return ret;
218         }
219         if (!cardhu_hdmi_vddio) {
220                 cardhu_hdmi_vddio = regulator_get(NULL, "vdd_hdmi_con");
221                 if (IS_ERR_OR_NULL(cardhu_hdmi_vddio)) {
222                         pr_err("hdmi: couldn't get regulator vdd_hdmi_con\n");
223                         cardhu_hdmi_vddio = NULL;
224                         regulator_put(cardhu_hdmi_pll);
225                         cardhu_hdmi_pll = NULL;
226                         regulator_put(cardhu_hdmi_reg);
227                         cardhu_hdmi_reg = NULL;
228
229                         return PTR_ERR(cardhu_hdmi_vddio);
230                 }
231         }
232         ret = regulator_enable(cardhu_hdmi_vddio);
233         if (ret < 0) {
234                 pr_err("hdmi: couldn't enable regulator vdd_hdmi_con\n");
235                 return ret;
236         }
237         return 0;
238 }
239
240 static int cardhu_hdmi_disable(void)
241 {
242
243         regulator_disable(cardhu_hdmi_reg);
244         regulator_put(cardhu_hdmi_reg);
245         cardhu_hdmi_reg = NULL;
246
247         regulator_disable(cardhu_hdmi_pll);
248         regulator_put(cardhu_hdmi_pll);
249         cardhu_hdmi_pll = NULL;
250
251         regulator_disable(cardhu_hdmi_vddio);
252         regulator_put(cardhu_hdmi_vddio);
253         cardhu_hdmi_vddio = NULL;
254         return 0;
255 }
256 static struct resource cardhu_disp1_resources[] = {
257         {
258                 .name   = "irq",
259                 .start  = INT_DISPLAY_GENERAL,
260                 .end    = INT_DISPLAY_GENERAL,
261                 .flags  = IORESOURCE_IRQ,
262         },
263         {
264                 .name   = "regs",
265                 .start  = TEGRA_DISPLAY_BASE,
266                 .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
267                 .flags  = IORESOURCE_MEM,
268         },
269         {
270                 .name   = "fbmem",
271                 .start  = 0,    /* Filled in by cardhu_panel_init() */
272                 .end    = 0,    /* Filled in by cardhu_panel_init() */
273                 .flags  = IORESOURCE_MEM,
274         },
275 #ifdef CONFIG_TEGRA_CARDHU_DSI
276         {
277                 .name   = "dsi_regs",
278                 .start  = TEGRA_DSI_BASE,
279                 .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
280                 .flags  = IORESOURCE_MEM,
281         },
282 #endif
283 };
284
285 static struct resource cardhu_disp2_resources[] = {
286         {
287                 .name   = "irq",
288                 .start  = INT_DISPLAY_B_GENERAL,
289                 .end    = INT_DISPLAY_B_GENERAL,
290                 .flags  = IORESOURCE_IRQ,
291         },
292         {
293                 .name   = "regs",
294                 .start  = TEGRA_DISPLAY2_BASE,
295                 .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
296                 .flags  = IORESOURCE_MEM,
297         },
298         {
299                 .name   = "fbmem",
300                 .flags  = IORESOURCE_MEM,
301                 .start  = 0,
302                 .end    = 0,
303         },
304         {
305                 .name   = "hdmi_regs",
306                 .start  = TEGRA_HDMI_BASE,
307                 .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
308                 .flags  = IORESOURCE_MEM,
309         },
310 };
311
312 static struct tegra_dc_mode cardhu_panel_modes[] = {
313         {
314                 /* 1366x768@62.3Hz */
315                 .pclk = 72000000,
316                 .h_ref_to_sync = 4,
317                 .v_ref_to_sync = 2,
318                 .h_sync_width = 32,
319                 .v_sync_width = 5,
320                 .h_back_porch = 20,
321                 .v_back_porch = 12,
322                 .h_active = 1366,
323                 .v_active = 768,
324                 .h_front_porch = 48,
325                 .v_front_porch = 3,
326         },
327 };
328
329 static struct tegra_fb_data cardhu_fb_data = {
330         .win            = 0,
331         .xres           = 1366,
332         .yres           = 768,
333         .bits_per_pixel = 16,
334 };
335
336 static struct tegra_fb_data cardhu_hdmi_fb_data = {
337         .win            = 0,
338         .xres           = 1366,
339         .yres           = 768,
340         .bits_per_pixel = 16,
341 };
342
343 static struct tegra_dc_out cardhu_disp2_out = {
344         .type           = TEGRA_DC_OUT_HDMI,
345         .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
346
347         .dcc_bus        = 3,
348         .hotplug_gpio   = cardhu_hdmi_hpd,
349
350         .align          = TEGRA_DC_ALIGN_MSB,
351         .order          = TEGRA_DC_ORDER_RED_BLUE,
352
353         .enable         = cardhu_hdmi_enable,
354         .disable        = cardhu_hdmi_disable,
355 };
356
357 static struct tegra_dc_platform_data cardhu_disp2_pdata = {
358         .flags          = 0,
359         .default_out    = &cardhu_disp2_out,
360         .fb             = &cardhu_hdmi_fb_data,
361 };
362
363 static int cardhu_dsi_panel_enable(void)
364 {
365         static struct regulator *reg = NULL;
366         int ret;
367
368         if (reg == NULL) {
369                 reg = regulator_get(NULL, "avdd_dsi_csi");
370                 if (IS_ERR_OR_NULL(reg)) {
371                 pr_err("dsi: Could not get regulator avdd_dsi_csi\n");
372                         reg = NULL;
373                         return PTR_ERR(reg);
374                 }
375         }
376         regulator_enable(reg);
377
378 #if DSI_PANEL_219
379         ret = gpio_request(TEGRA_GPIO_PL2, "pl2");
380         if (ret < 0)
381                 return ret;
382         ret = gpio_direction_output(TEGRA_GPIO_PL2, 0);
383         if (ret < 0) {
384                 gpio_free(TEGRA_GPIO_PL2);
385                 return ret;
386         }
387         else
388                 tegra_gpio_enable(TEGRA_GPIO_PL2);
389
390         ret = gpio_request(TEGRA_GPIO_PH0, "ph0");
391         if (ret < 0)
392                 return ret;
393         ret = gpio_direction_output(TEGRA_GPIO_PH0, 0);
394         if (ret < 0) {
395                 gpio_free(TEGRA_GPIO_PH0);
396                 return ret;
397         }
398         else
399                 tegra_gpio_enable(TEGRA_GPIO_PH0);
400
401         ret = gpio_request(TEGRA_GPIO_PH2, "ph2");
402         if (ret < 0)
403                 return ret;
404         ret = gpio_direction_output(TEGRA_GPIO_PH2, 0);
405         if (ret < 0) {
406                 gpio_free(TEGRA_GPIO_PH2);
407                 return ret;
408         }
409         else
410                 tegra_gpio_enable(TEGRA_GPIO_PH2);
411
412         ret = gpio_request(TEGRA_GPIO_PU2, "pu2");
413         if (ret < 0)
414                 return ret;
415         ret = gpio_direction_output(TEGRA_GPIO_PU2, 0);
416         if (ret < 0) {
417                 gpio_free(TEGRA_GPIO_PU2);
418                 return ret;
419         }
420         else
421                 tegra_gpio_enable(TEGRA_GPIO_PU2);
422
423         gpio_set_value(TEGRA_GPIO_PL2, 1);
424         mdelay(20);
425         gpio_set_value(TEGRA_GPIO_PH0, 1);
426         mdelay(10);
427         gpio_set_value(TEGRA_GPIO_PH2, 1);
428         mdelay(15);
429         gpio_set_value(TEGRA_GPIO_PU2, 0);
430         gpio_set_value(TEGRA_GPIO_PU2, 1);
431         mdelay(10);
432         gpio_set_value(TEGRA_GPIO_PU2, 0);
433         mdelay(10);
434         gpio_set_value(TEGRA_GPIO_PU2, 1);
435         mdelay(15);
436 #endif
437
438 #if DSI_PANEL_218
439         printk("DSI_PANEL_218 is enabled\n");
440         ret = gpio_request(AVDD_LCD, 1);
441         if(ret < 0)
442                 gpio_free(AVDD_LCD);
443         ret = gpio_direction_output(AVDD_LCD, 1);
444         if(ret < 0)
445                 gpio_free(AVDD_LCD);
446         else
447                 tegra_gpio_enable(AVDD_LCD);
448
449         ret = gpio_request(TEGRA_GPIO_PD2, "pd2");
450         if (ret < 0){
451                 return ret;
452         }
453         ret = gpio_direction_output(TEGRA_GPIO_PD2, 0);
454         if (ret < 0) {
455                 gpio_free(TEGRA_GPIO_PD2);
456                 return ret;
457         }
458         else
459                 tegra_gpio_enable(TEGRA_GPIO_PD2);
460
461         gpio_set_value(TEGRA_GPIO_PD2, 1);
462         gpio_set_value(TEGRA_GPIO_PD2, 0);
463         mdelay(2);
464         gpio_set_value(TEGRA_GPIO_PD2, 1);
465         mdelay(2);
466 #endif
467
468         return 0;
469 }
470
471 static int cardhu_dsi_panel_disable(void)
472 {
473         return 0;
474 }
475
476 static struct tegra_dsi_cmd dsi_init_cmd[]= {
477         DSI_CMD_SHORT(0x05, 0x11, 0x00),
478         DSI_DLY_MS(150),
479         DSI_CMD_SHORT(0x05, 0x29, 0x00),
480         DSI_DLY_MS(20),
481 };
482
483 struct tegra_dsi_out cardhu_dsi = {
484         .n_data_lanes = 2,
485         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
486         .refresh_rate = 60,
487         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
488
489         .panel_has_frame_buffer = true,
490
491         .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
492         .dsi_init_cmd = dsi_init_cmd,
493
494         .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
495 };
496
497 static struct tegra_dc_mode cardhu_dsi_modes[] = {
498 #if DSI_PANEL_219
499         {
500                 .pclk = 10000000,
501                 .h_ref_to_sync = 4,
502                 .v_ref_to_sync = 1,
503                 .h_sync_width = 16,
504                 .v_sync_width = 1,
505                 .h_back_porch = 32,
506                 .v_back_porch = 1,
507                 .h_active = 540,
508                 .v_active = 960,
509                 .h_front_porch = 32,
510                 .v_front_porch = 2,
511         },
512 #endif
513
514 #if DSI_PANEL_218
515         {
516                 .pclk = 48000000,
517                 .h_ref_to_sync = 11,
518                 .v_ref_to_sync = 1,
519                 .h_sync_width = 16,
520                 .v_sync_width = 4,
521                 .h_back_porch = 16,
522                 .v_back_porch = 4,
523                 .h_active = 864,
524                 .v_active = 480,
525                 .h_front_porch = 16,
526                 .v_front_porch = 4,
527         },
528 #endif
529
530 };
531
532
533 static struct tegra_fb_data cardhu_dsi_fb_data = {
534 #if DSI_PANEL_219
535         .win            = 0,
536         .xres           = 540,
537         .yres           = 960,
538         .bits_per_pixel = 32,
539 #endif
540
541 #if DSI_PANEL_218
542         .win            = 0,
543         .xres           = 864,
544         .yres           = 480,
545         .bits_per_pixel = 32,
546 #endif
547 };
548
549 static struct tegra_dc_out cardhu_disp1_out = {
550         .align          = TEGRA_DC_ALIGN_MSB,
551         .order          = TEGRA_DC_ORDER_RED_BLUE,
552 #ifndef CONFIG_TEGRA_CARDHU_DSI
553         .type           = TEGRA_DC_OUT_RGB,
554
555         .modes          = cardhu_panel_modes,
556         .n_modes        = ARRAY_SIZE(cardhu_panel_modes),
557
558         .enable         = cardhu_panel_enable,
559         .disable        = cardhu_panel_disable,
560 #else
561         .type           = TEGRA_DC_OUT_DSI,
562
563         .modes          = cardhu_dsi_modes,
564         .n_modes        = ARRAY_SIZE(cardhu_dsi_modes),
565
566         .dsi            = &cardhu_dsi,
567
568         .enable         = cardhu_dsi_panel_enable,
569         .disable        = cardhu_dsi_panel_disable,
570 #endif
571 };
572 static struct tegra_dc_platform_data cardhu_disp1_pdata = {
573         .flags          = TEGRA_DC_FLAG_ENABLED,
574         .default_out    = &cardhu_disp1_out,
575 #ifndef CONFIG_TEGRA_CARDHU_DSI
576         .fb             = &cardhu_fb_data,
577 #else
578         .fb             = &cardhu_dsi_fb_data,
579 #endif
580 };
581 static struct nvhost_device cardhu_disp1_device = {
582         .name           = "tegradc",
583         .id             = 0,
584         .resource       = cardhu_disp1_resources,
585         .num_resources  = ARRAY_SIZE(cardhu_disp1_resources),
586         .dev = {
587                 .platform_data = &cardhu_disp1_pdata,
588         },
589 };
590
591 static struct nvhost_device cardhu_disp2_device = {
592         .name           = "tegradc",
593         .id             = 1,
594         .resource       = cardhu_disp2_resources,
595         .num_resources  = ARRAY_SIZE(cardhu_disp2_resources),
596         .dev = {
597                 .platform_data = &cardhu_disp2_pdata,
598         },
599 };
600
601 static struct nvmap_platform_carveout cardhu_carveouts[] = {
602         [0] = {
603                 .name           = "iram",
604                 .usage_mask     = NVMAP_HEAP_CARVEOUT_IRAM,
605                 .base           = TEGRA_IRAM_BASE,
606                 .size           = TEGRA_IRAM_SIZE,
607                 .buddy_size     = 0, /* no buddy allocation for IRAM */
608         },
609         [1] = {
610                 .name           = "generic-0",
611                 .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
612                 .base           = 0,    /* Filled in by cardhu_panel_init() */
613                 .size           = 0,    /* Filled in by cardhu_panel_init() */
614                 .buddy_size     = SZ_32K,
615         },
616 };
617
618 static struct nvmap_platform_data cardhu_nvmap_data = {
619         .carveouts      = cardhu_carveouts,
620         .nr_carveouts   = ARRAY_SIZE(cardhu_carveouts),
621 };
622
623 static struct platform_device cardhu_nvmap_device = {
624         .name   = "tegra-nvmap",
625         .id     = -1,
626         .dev    = {
627                 .platform_data = &cardhu_nvmap_data,
628         },
629 };
630
631 static struct platform_device *cardhu_gfx_devices[] __initdata = {
632         &cardhu_nvmap_device,
633         &tegra_grhost_device,
634         &tegra_pwfm0_device,
635         &cardhu_backlight_device,
636 };
637
638
639 int __init cardhu_panel_init(void)
640 {
641         int err;
642         struct resource *res;
643
644         cardhu_carveouts[1].base = tegra_carveout_start;
645         cardhu_carveouts[1].size = tegra_carveout_size;
646
647         tegra_gpio_enable(cardhu_hdmi_hpd);
648         gpio_request(cardhu_hdmi_hpd, "hdmi_hpd");
649         gpio_direction_input(cardhu_hdmi_hpd);
650         err = platform_add_devices(cardhu_gfx_devices,
651                                 ARRAY_SIZE(cardhu_gfx_devices));
652
653         res = nvhost_get_resource_byname(&cardhu_disp1_device,
654                                          IORESOURCE_MEM, "fbmem");
655         res->start = tegra_fb_start;
656         res->end = tegra_fb_start + tegra_fb_size - 1;
657
658         if (!err)
659                 err = nvhost_device_register(&cardhu_disp1_device);
660
661         res = nvhost_get_resource_byname(&cardhu_disp2_device,
662                                          IORESOURCE_MEM, "fbmem");
663         res->start = tegra_fb2_start;
664         res->end = tegra_fb2_start + tegra_fb2_size - 1;
665         if (!err)
666                 err = nvhost_device_register(&cardhu_disp2_device);
667         return err;
668 }