a62171060b8420a1c61593eb8e36421f73920b2e
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-panel.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-panel.c
3  *
4  * Copyright (c) 2010-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/ion.h>
23 #include <linux/tegra_ion.h>
24 #include <linux/gpio.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/resource.h>
27 #include <asm/mach-types.h>
28 #include <linux/platform_device.h>
29 #include <linux/earlysuspend.h>
30 #include <linux/pwm_backlight.h>
31 #include <asm/atomic.h>
32 #include <linux/nvhost.h>
33 #include <linux/nvmap.h>
34 #include <mach/irqs.h>
35 #include <mach/iomap.h>
36 #include <mach/dc.h>
37 #include <mach/fb.h>
38 #include <mach/smmu.h>
39
40 #include "board.h"
41 #include "board-cardhu.h"
42 #include "devices.h"
43 #include "gpio-names.h"
44
45 /* Select panel to be used. */
46 #define DSI_PANEL_219 1
47 #define DSI_PANEL_218 0
48 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
49 #define DSI_PANEL_RESET 1
50
51 /* Select LVDS panel resolution. 13X7 is default */
52 #define PM313_LVDS_PANEL_19X12                  1
53 #define PM313_LVDS_PANEL_BPP                    0 /* 0:24bpp, 1:18bpp */
54
55 /* PM313 display board specific pins */
56 #define pm313_R_FDE                     TEGRA_GPIO_PW0
57 #define pm313_R_FB                      TEGRA_GPIO_PN4
58 #define pm313_MODE0                     TEGRA_GPIO_PZ4
59 #define pm313_MODE1                     TEGRA_GPIO_PW1
60 #define pm313_BPP                       TEGRA_GPIO_PN6 /* 0:24bpp, 1:18bpp */
61 #define pm313_lvds_shutdown             TEGRA_GPIO_PH1
62
63 /* E1247 reworked for pm269 pins */
64 #define e1247_pm269_lvds_shutdown       TEGRA_GPIO_PN6
65
66 /* E1247 cardhu default display board pins */
67 #define cardhu_lvds_shutdown            TEGRA_GPIO_PL2
68
69 /* common pins( backlight ) for all display boards */
70 #define cardhu_bl_enb                   TEGRA_GPIO_PH2
71 #define cardhu_bl_pwm                   TEGRA_GPIO_PH0
72 #define cardhu_hdmi_hpd                 TEGRA_GPIO_PN7
73
74 #if defined(DSI_PANEL_219) || defined(DSI_PANEL_218)
75 #define cardhu_dsia_bl_enb              TEGRA_GPIO_PW1
76 #define cardhu_dsib_bl_enb              TEGRA_GPIO_PW0
77 #define cardhu_dsi_218_panel_reset      TEGRA_GPIO_PD2
78 #define cardhu_dsi_219_panel_reset      TEGRA_GPIO_PW0
79 #endif
80
81 #ifdef CONFIG_TEGRA_DC
82 static struct regulator *cardhu_hdmi_reg = NULL;
83 static struct regulator *cardhu_hdmi_pll = NULL;
84 static struct regulator *cardhu_hdmi_vddio = NULL;
85 #endif
86
87 static atomic_t sd_brightness = ATOMIC_INIT(255);
88
89 #ifdef CONFIG_TEGRA_CARDHU_DSI
90 static struct regulator *cardhu_dsi_reg = NULL;
91 #else
92 static struct regulator *cardhu_lvds_reg = NULL;
93 static struct regulator *cardhu_lvds_vdd_bl = NULL;
94 static struct regulator *cardhu_lvds_vdd_panel = NULL;
95 #endif
96
97 static struct board_info board_info;
98 static struct board_info display_board_info;
99
100 static tegra_dc_bl_output cardhu_bl_output_measured = {
101         0, 1, 2, 3, 4, 5, 6, 7,
102         8, 9, 10, 11, 12, 13, 14, 15,
103         16, 17, 18, 19, 20, 21, 22, 23,
104         24, 25, 26, 27, 28, 29, 30, 31,
105         32, 33, 34, 35, 36, 37, 38, 39,
106         40, 41, 42, 43, 44, 45, 46, 47,
107         48, 49, 49, 50, 51, 52, 53, 54,
108         55, 56, 57, 58, 59, 60, 61, 62,
109         63, 64, 65, 66, 67, 68, 69, 70,
110         70, 72, 73, 74, 75, 76, 77, 78,
111         79, 80, 81, 82, 83, 84, 85, 86,
112         87, 88, 89, 90, 91, 92, 93, 94,
113         95, 96, 97, 98, 99, 100, 101, 102,
114         103, 104, 105, 106, 107, 108, 110, 111,
115         112, 113, 114, 115, 116, 117, 118, 119,
116         120, 121, 122, 123, 124, 124, 125, 126,
117         127, 128, 129, 130, 131, 132, 133, 133,
118         134, 135, 136, 137, 138, 139, 140, 141,
119         142, 143, 144, 145, 146, 147, 148, 148,
120         149, 150, 151, 152, 153, 154, 155, 156,
121         157, 158, 159, 160, 161, 162, 163, 164,
122         165, 166, 167, 168, 169, 170, 171, 172,
123         173, 174, 175, 176, 177, 179, 180, 181,
124         182, 184, 185, 186, 187, 188, 189, 190,
125         191, 192, 193, 194, 195, 196, 197, 198,
126         199, 200, 201, 202, 203, 204, 205, 206,
127         207, 208, 209, 211, 212, 213, 214, 215,
128         216, 217, 218, 219, 220, 221, 222, 223,
129         224, 225, 226, 227, 228, 229, 230, 231,
130         232, 233, 234, 235, 236, 237, 238, 239,
131         240, 241, 242, 243, 244, 245, 246, 247,
132         248, 249, 250, 251, 252, 253, 254, 255
133 };
134
135 static p_tegra_dc_bl_output bl_output;
136
137 static int cardhu_backlight_init(struct device *dev)
138 {
139         int ret;
140
141         bl_output = cardhu_bl_output_measured;
142
143         if (WARN_ON(ARRAY_SIZE(cardhu_bl_output_measured) != 256))
144                 pr_err("bl_output array does not have 256 elements\n");
145
146 #ifndef CONFIG_TEGRA_CARDHU_DSI
147         ret = gpio_request(cardhu_bl_enb, "backlight_enb");
148         if (ret < 0)
149                 return ret;
150
151         ret = gpio_direction_output(cardhu_bl_enb, 1);
152         if (ret < 0)
153                 gpio_free(cardhu_bl_enb);
154
155         return ret;
156 #endif
157
158 #if DSI_PANEL_218
159         /* Enable back light for DSIa panel */
160         ret = gpio_request(cardhu_dsia_bl_enb, "dsia_bl_enable");
161         if (ret < 0)
162                 return ret;
163
164         ret = gpio_direction_output(cardhu_dsia_bl_enb, 1);
165         if (ret < 0)
166                 gpio_free(cardhu_dsia_bl_enb);
167
168         /* Enable back light for DSIb panel */
169         ret = gpio_request(cardhu_dsib_bl_enb, "dsib_bl_enable");
170         if (ret < 0)
171                 return ret;
172
173         ret = gpio_direction_output(cardhu_dsib_bl_enb, 1);
174         if (ret < 0)
175                 gpio_free(cardhu_dsib_bl_enb);
176 #endif
177
178 #if DSI_PANEL_219
179         /* Enable back light for DSIa panel */
180         ret = gpio_request(cardhu_dsia_bl_enb, "dsia_bl_enable");
181         if (ret < 0)
182                 return ret;
183
184         ret = gpio_direction_output(cardhu_dsia_bl_enb, 1);
185         if (ret < 0)
186                 gpio_free(cardhu_dsia_bl_enb);
187 #endif
188
189         return ret;
190 };
191
192 static void cardhu_backlight_exit(struct device *dev)
193 {
194 #ifndef CONFIG_TEGRA_CARDHU_DSI
195         /* int ret; */
196         /*ret = gpio_request(cardhu_bl_enb, "backlight_enb");*/
197         gpio_set_value(cardhu_bl_enb, 0);
198         gpio_free(cardhu_bl_enb);
199         return;
200 #endif
201
202 #if DSI_PANEL_218
203         /* Disable back light for DSIa panel */
204         gpio_set_value(cardhu_dsia_bl_enb, 0);
205         gpio_free(cardhu_dsia_bl_enb);
206
207
208         /* Disable back light for DSIb panel */
209         gpio_set_value(cardhu_dsib_bl_enb, 0);
210         gpio_free(cardhu_dsib_bl_enb);
211
212         gpio_set_value(cardhu_lvds_shutdown, 1);
213         mdelay(20);
214 #endif
215
216 #if DSI_PANEL_219
217         /* Disable back light for DSIa panel */
218         gpio_set_value(cardhu_dsia_bl_enb, 0);
219         gpio_free(cardhu_dsia_bl_enb);
220
221
222         gpio_set_value(cardhu_lvds_shutdown, 1);
223         mdelay(20);
224 #endif
225 }
226
227 static int cardhu_backlight_notify(struct device *unused, int brightness)
228 {
229         int cur_sd_brightness = atomic_read(&sd_brightness);
230
231 #ifndef CONFIG_TEGRA_CARDHU_DSI
232         /* Set the backlight GPIO pin mode to 'backlight_enable' */
233         gpio_set_value(cardhu_bl_enb, !!brightness);
234 #elif DSI_PANEL_218
235         /* DSIa */
236         gpio_set_value(cardhu_dsia_bl_enb, !!brightness);
237
238         /* DSIb */
239         gpio_set_value(cardhu_dsib_bl_enb, !!brightness);
240 #elif DSI_PANEL_219
241         /* DSIa */
242         gpio_set_value(cardhu_dsia_bl_enb, !!brightness);
243 #endif
244
245         /* SD brightness is a percentage, 8-bit value. */
246         brightness = (brightness * cur_sd_brightness) / 255;
247
248         /* Apply any backlight response curve */
249         if (brightness > 255) {
250                 pr_info("Error: Brightness > 255!\n");
251         } else {
252                 /* This value depends on the panel.
253                   Current 19X12 panel with PM313 gets
254                   full brightness when the output is 0. */
255                 if (display_board_info.board_id == BOARD_DISPLAY_PM313)
256                         brightness = 255 - bl_output[brightness];
257                 else
258                         brightness = bl_output[brightness];
259         }
260
261         return brightness;
262 }
263
264 static int cardhu_disp1_check_fb(struct device *dev, struct fb_info *info);
265
266 static struct platform_pwm_backlight_data cardhu_backlight_data = {
267         .pwm_id         = 0,
268         .max_brightness = 255,
269         .dft_brightness = 224,
270         .pwm_period_ns  = 1000000,
271         .init           = cardhu_backlight_init,
272         .exit           = cardhu_backlight_exit,
273         .notify         = cardhu_backlight_notify,
274         /* Only toggle backlight on fb blank notifications for disp1 */
275         .check_fb       = cardhu_disp1_check_fb,
276 };
277
278 static struct platform_device cardhu_backlight_device = {
279         .name   = "pwm-backlight",
280         .id     = -1,
281         .dev    = {
282                 .platform_data = &cardhu_backlight_data,
283         },
284 };
285
286 #ifndef CONFIG_TEGRA_CARDHU_DSI
287 static int cardhu_panel_enable(void)
288 {
289         if (cardhu_lvds_reg == NULL) {
290                 cardhu_lvds_reg = regulator_get(NULL, "vdd_lvds");
291                 if (WARN_ON(IS_ERR(cardhu_lvds_reg)))
292                         pr_err("%s: couldn't get regulator vdd_lvds: %ld\n",
293                                 __func__, PTR_ERR(cardhu_lvds_reg));
294                 else
295                         regulator_enable(cardhu_lvds_reg);
296         }
297
298         if (cardhu_lvds_vdd_bl == NULL) {
299                 cardhu_lvds_vdd_bl = regulator_get(NULL, "vdd_backlight");
300                 if (WARN_ON(IS_ERR(cardhu_lvds_vdd_bl)))
301                         pr_err("%s: couldn't get regulator vdd_backlight: %ld\n",
302                                 __func__, PTR_ERR(cardhu_lvds_vdd_bl));
303                 else
304                         regulator_enable(cardhu_lvds_vdd_bl);
305         }
306
307         if (cardhu_lvds_vdd_panel == NULL) {
308                 cardhu_lvds_vdd_panel = regulator_get(NULL, "vdd_lcd_panel");
309                 if (WARN_ON(IS_ERR(cardhu_lvds_vdd_panel)))
310                         pr_err("%s: couldn't get regulator vdd_lcd_panel: %ld\n",
311                                 __func__, PTR_ERR(cardhu_lvds_vdd_panel));
312                 else
313                         regulator_enable(cardhu_lvds_vdd_panel);
314         }
315
316         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
317                 /* lvds configuration */
318                 gpio_set_value(pm313_R_FDE, 1);
319                 gpio_set_value(pm313_R_FB, 1);
320                 gpio_set_value(pm313_MODE0, 1);
321                 gpio_set_value(pm313_MODE1, 0);
322                 gpio_set_value(pm313_BPP, PM313_LVDS_PANEL_BPP);
323
324                 /* FIXME : it may require more or less delay for latching
325                   values correctly before enabling RGB2LVDS */
326                 mdelay(100);
327                 gpio_set_value(pm313_lvds_shutdown, 1);
328         } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
329                         board_info.board_id == BOARD_PM269) ||
330                         (board_info.board_id == BOARD_E1257) ||
331                         (board_info.board_id == BOARD_PM305) ||
332                         (board_info.board_id == BOARD_PM311))
333                 gpio_set_value(e1247_pm269_lvds_shutdown, 1);
334         else
335                 gpio_set_value(cardhu_lvds_shutdown, 1);
336
337         return 0;
338 }
339
340 static int cardhu_panel_disable(void)
341 {
342         regulator_disable(cardhu_lvds_reg);
343         regulator_put(cardhu_lvds_reg);
344         cardhu_lvds_reg = NULL;
345
346         regulator_disable(cardhu_lvds_vdd_bl);
347         regulator_put(cardhu_lvds_vdd_bl);
348         cardhu_lvds_vdd_bl = NULL;
349
350         regulator_disable(cardhu_lvds_vdd_panel);
351         regulator_put(cardhu_lvds_vdd_panel);
352
353         cardhu_lvds_vdd_panel= NULL;
354
355         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
356                 gpio_set_value(pm313_lvds_shutdown, 0);
357         } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
358                         board_info.board_id == BOARD_PM269) ||
359                         (board_info.board_id == BOARD_E1257) ||
360                         (board_info.board_id == BOARD_PM305) ||
361                         (board_info.board_id == BOARD_PM311)) {
362                 gpio_set_value(e1247_pm269_lvds_shutdown, 0);
363         } else {
364                 gpio_set_value(cardhu_lvds_shutdown, 0);
365         }
366         return 0;
367 }
368 #endif
369
370 #ifdef CONFIG_TEGRA_DC
371 static int cardhu_hdmi_vddio_enable(void)
372 {
373         int ret;
374         if (!cardhu_hdmi_vddio) {
375                 cardhu_hdmi_vddio = regulator_get(NULL, "vdd_hdmi_con");
376                 if (IS_ERR_OR_NULL(cardhu_hdmi_vddio)) {
377                         ret = PTR_ERR(cardhu_hdmi_vddio);
378                         pr_err("hdmi: couldn't get regulator vdd_hdmi_con\n");
379                         cardhu_hdmi_vddio = NULL;
380                         return ret;
381                 }
382         }
383         ret = regulator_enable(cardhu_hdmi_vddio);
384         if (ret < 0) {
385                 pr_err("hdmi: couldn't enable regulator vdd_hdmi_con\n");
386                 regulator_put(cardhu_hdmi_vddio);
387                 cardhu_hdmi_vddio = NULL;
388                 return ret;
389         }
390         return ret;
391 }
392
393 static int cardhu_hdmi_vddio_disable(void)
394 {
395         if (cardhu_hdmi_vddio) {
396                 regulator_disable(cardhu_hdmi_vddio);
397                 regulator_put(cardhu_hdmi_vddio);
398                 cardhu_hdmi_vddio = NULL;
399         }
400         return 0;
401 }
402
403 static int cardhu_hdmi_enable(void)
404 {
405         int ret;
406         if (!cardhu_hdmi_reg) {
407                 cardhu_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
408                 if (IS_ERR_OR_NULL(cardhu_hdmi_reg)) {
409                         pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
410                         cardhu_hdmi_reg = NULL;
411                         return PTR_ERR(cardhu_hdmi_reg);
412                 }
413         }
414         ret = regulator_enable(cardhu_hdmi_reg);
415         if (ret < 0) {
416                 pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
417                 return ret;
418         }
419         if (!cardhu_hdmi_pll) {
420                 cardhu_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
421                 if (IS_ERR_OR_NULL(cardhu_hdmi_pll)) {
422                         pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
423                         cardhu_hdmi_pll = NULL;
424                         regulator_put(cardhu_hdmi_reg);
425                         cardhu_hdmi_reg = NULL;
426                         return PTR_ERR(cardhu_hdmi_pll);
427                 }
428         }
429         ret = regulator_enable(cardhu_hdmi_pll);
430         if (ret < 0) {
431                 pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
432                 return ret;
433         }
434         return 0;
435 }
436
437 static int cardhu_hdmi_disable(void)
438 {
439         regulator_disable(cardhu_hdmi_reg);
440         regulator_put(cardhu_hdmi_reg);
441         cardhu_hdmi_reg = NULL;
442
443         regulator_disable(cardhu_hdmi_pll);
444         regulator_put(cardhu_hdmi_pll);
445         cardhu_hdmi_pll = NULL;
446         return 0;
447 }
448
449 static struct resource cardhu_disp1_resources[] = {
450         {
451                 .name   = "irq",
452                 .start  = INT_DISPLAY_GENERAL,
453                 .end    = INT_DISPLAY_GENERAL,
454                 .flags  = IORESOURCE_IRQ,
455         },
456         {
457                 .name   = "regs",
458                 .start  = TEGRA_DISPLAY_BASE,
459                 .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
460                 .flags  = IORESOURCE_MEM,
461         },
462         {
463                 .name   = "fbmem",
464                 .start  = 0,    /* Filled in by cardhu_panel_init() */
465                 .end    = 0,    /* Filled in by cardhu_panel_init() */
466                 .flags  = IORESOURCE_MEM,
467         },
468 #ifdef CONFIG_TEGRA_DSI_INSTANCE_1
469         {
470                 .name   = "dsi_regs",
471                 .start  = TEGRA_DSIB_BASE,
472                 .end    = TEGRA_DSIB_BASE + TEGRA_DSIB_SIZE - 1,
473                 .flags  = IORESOURCE_MEM,
474         },
475 #else
476         {
477                 .name   = "dsi_regs",
478                 .start  = TEGRA_DSI_BASE,
479                 .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
480                 .flags  = IORESOURCE_MEM,
481         },
482 #endif
483 };
484
485 static struct resource cardhu_disp2_resources[] = {
486         {
487                 .name   = "irq",
488                 .start  = INT_DISPLAY_B_GENERAL,
489                 .end    = INT_DISPLAY_B_GENERAL,
490                 .flags  = IORESOURCE_IRQ,
491         },
492         {
493                 .name   = "regs",
494                 .start  = TEGRA_DISPLAY2_BASE,
495                 .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
496                 .flags  = IORESOURCE_MEM,
497         },
498         {
499                 .name   = "fbmem",
500                 .flags  = IORESOURCE_MEM,
501                 .start  = 0,
502                 .end    = 0,
503         },
504         {
505                 .name   = "hdmi_regs",
506                 .start  = TEGRA_HDMI_BASE,
507                 .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
508                 .flags  = IORESOURCE_MEM,
509         },
510 };
511 #endif
512
513 #ifndef CONFIG_TEGRA_CARDHU_DSI
514 static struct tegra_dc_mode panel_19X12_modes[] = {
515         {
516                 .pclk = 154000000,
517                 .h_ref_to_sync = 11,
518                 .v_ref_to_sync = 1,
519                 .h_sync_width = 32,
520                 .v_sync_width = 6,
521                 .h_back_porch = 80,
522                 .v_back_porch = 26,
523                 .h_active = 1920,
524                 .v_active = 1200,
525                 .h_front_porch = 48,
526                 .v_front_porch = 3,
527         },
528 };
529
530 static struct tegra_dc_mode cardhu_panel_modes[] = {
531         {
532                 /* 1366x768@60Hz */
533                 .pclk = 74180000,
534                 .h_ref_to_sync = 1,
535                 .v_ref_to_sync = 1,
536                 .h_sync_width = 30,
537                 .v_sync_width = 5,
538                 .h_back_porch = 52,
539                 .v_back_porch = 20,
540                 .h_active = 1366,
541                 .v_active = 768,
542                 .h_front_porch = 64,
543                 .v_front_porch = 25,
544         },
545         {
546                 /* 1366x768@50Hz */
547                 .pclk = 74180000,
548                 .h_ref_to_sync = 1,
549                 .v_ref_to_sync = 1,
550                 .h_sync_width = 30,
551                 .v_sync_width = 5,
552                 .h_back_porch = 56,
553                 .v_back_porch = 80,
554                 .h_active = 1366,
555                 .v_active = 768,
556                 .h_front_porch = 64,
557                 .v_front_porch = 125,
558         },
559         {
560                 /* 1366x768@48 */
561                 .pclk = 74180000,
562                 .h_ref_to_sync = 1,
563                 .v_ref_to_sync = 1,
564                 .h_sync_width = 30,
565                 .v_sync_width = 5,
566                 .h_back_porch = 52,
567                 .v_back_porch = 98,
568                 .h_active = 1366,
569                 .v_active = 768,
570                 .h_front_porch = 64,
571                 .v_front_porch = 152,
572         },
573 };
574
575 static struct tegra_dc_mode cardhu_panel_modes_55hz[] = {
576         {
577                 /* 1366x768p 55Hz */
578                 .pclk = 68000000,
579                 .h_ref_to_sync = 0,
580                 .v_ref_to_sync = 12,
581                 .h_sync_width = 30,
582                 .v_sync_width = 5,
583                 .h_back_porch = 52,
584                 .v_back_porch = 20,
585                 .h_active = 1366,
586                 .v_active = 768,
587                 .h_front_porch = 64,
588                 .v_front_porch = 25,
589         },
590 };
591 #endif
592
593 static struct tegra_dc_sd_settings cardhu_sd_settings = {
594         .enable = 1, /* enabled by default. */
595         .use_auto_pwm = false,
596         .hw_update_delay = 0,
597         .bin_width = -1,
598         .aggressiveness = 1,
599         .phase_in_adjustments = true,
600         .use_vid_luma = false,
601         /* Default video coefficients */
602         .coeff = {5, 9, 2},
603         .fc = {0, 0},
604         /* Immediate backlight changes */
605         .blp = {1024, 255},
606         /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
607         /* Default BL TF */
608         .bltf = {
609                         {
610                                 {57, 65, 74, 83},
611                                 {93, 103, 114, 126},
612                                 {138, 151, 165, 179},
613                                 {194, 209, 225, 242},
614                         },
615                         {
616                                 {58, 66, 75, 84},
617                                 {94, 105, 116, 127},
618                                 {140, 153, 166, 181},
619                                 {196, 211, 227, 244},
620                         },
621                         {
622                                 {60, 68, 77, 87},
623                                 {97, 107, 119, 130},
624                                 {143, 156, 170, 184},
625                                 {199, 215, 231, 248},
626                         },
627                         {
628                                 {64, 73, 82, 91},
629                                 {102, 113, 124, 137},
630                                 {149, 163, 177, 192},
631                                 {207, 223, 240, 255},
632                         },
633                 },
634         /* Default LUT */
635         .lut = {
636                         {
637                                 {250, 250, 250},
638                                 {194, 194, 194},
639                                 {149, 149, 149},
640                                 {113, 113, 113},
641                                 {82, 82, 82},
642                                 {56, 56, 56},
643                                 {34, 34, 34},
644                                 {15, 15, 15},
645                                 {0, 0, 0},
646                         },
647                         {
648                                 {246, 246, 246},
649                                 {191, 191, 191},
650                                 {147, 147, 147},
651                                 {111, 111, 111},
652                                 {80, 80, 80},
653                                 {55, 55, 55},
654                                 {33, 33, 33},
655                                 {14, 14, 14},
656                                 {0, 0, 0},
657                         },
658                         {
659                                 {239, 239, 239},
660                                 {185, 185, 185},
661                                 {142, 142, 142},
662                                 {107, 107, 107},
663                                 {77, 77, 77},
664                                 {52, 52, 52},
665                                 {30, 30, 30},
666                                 {12, 12, 12},
667                                 {0, 0, 0},
668                         },
669                         {
670                                 {224, 224, 224},
671                                 {173, 173, 173},
672                                 {133, 133, 133},
673                                 {99, 99, 99},
674                                 {70, 70, 70},
675                                 {46, 46, 46},
676                                 {25, 25, 25},
677                                 {7, 7, 7},
678                                 {0, 0, 0},
679                         },
680                 },
681         .sd_brightness = &sd_brightness,
682         .bl_device = &cardhu_backlight_device,
683 };
684
685 #ifdef CONFIG_TEGRA_DC
686 #ifndef CONFIG_TEGRA_CARDHU_DSI
687 static struct tegra_fb_data cardhu_fb_data = {
688         .win            = 0,
689         .xres           = 1366,
690         .yres           = 768,
691         .bits_per_pixel = 32,
692         .flags          = TEGRA_FB_FLIP_ON_PROBE,
693 };
694 #endif
695
696 static struct tegra_fb_data cardhu_hdmi_fb_data = {
697         .win            = 0,
698         .xres           = 640,
699         .yres           = 480,
700         .bits_per_pixel = 32,
701         .flags          = TEGRA_FB_FLIP_ON_PROBE,
702 };
703
704 static struct tegra_dc_out cardhu_disp2_out = {
705         .type           = TEGRA_DC_OUT_HDMI,
706         .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
707         .parent_clk     = "pll_d2_out0",
708
709         .dcc_bus        = 3,
710         .hotplug_gpio   = cardhu_hdmi_hpd,
711
712         .max_pixclock   = KHZ2PICOS(148500),
713
714         .align          = TEGRA_DC_ALIGN_MSB,
715         .order          = TEGRA_DC_ORDER_RED_BLUE,
716
717         .enable         = cardhu_hdmi_enable,
718         .disable        = cardhu_hdmi_disable,
719
720         .postsuspend    = cardhu_hdmi_vddio_disable,
721         .hotplug_init   = cardhu_hdmi_vddio_enable,
722 };
723
724 static struct tegra_dc_platform_data cardhu_disp2_pdata = {
725         .flags          = TEGRA_DC_FLAG_ENABLED,
726         .default_out    = &cardhu_disp2_out,
727         .fb             = &cardhu_hdmi_fb_data,
728         .emc_clk_rate   = 300000000,
729 };
730 #endif
731
732 #ifdef CONFIG_TEGRA_CARDHU_DSI
733 static int cardhu_dsi_panel_enable(void)
734 {
735         int ret;
736
737         if (cardhu_dsi_reg == NULL) {
738                 cardhu_dsi_reg = regulator_get(NULL, "avdd_dsi_csi");
739                 if (IS_ERR_OR_NULL(cardhu_dsi_reg)) {
740                         pr_err("dsi: Could not get regulator avdd_dsi_csi\n");
741                         cardhu_dsi_reg = NULL;
742                         return PTR_ERR(cardhu_dsi_reg);
743                 }
744         }
745         regulator_enable(cardhu_dsi_reg);
746
747         ret = gpio_request(AVDD_LCD, "avdd_lcd");
748         if (ret < 0)
749                 gpio_free(AVDD_LCD);
750         ret = gpio_direction_output(AVDD_LCD, 1);
751         if (ret < 0)
752                 gpio_free(AVDD_LCD);
753
754 #if DSI_PANEL_219
755
756         ret = gpio_request(cardhu_bl_pwm, "bl_pwm");
757         if (ret < 0)
758                 return ret;
759         ret = gpio_direction_output(cardhu_bl_pwm, 0);
760         if (ret < 0) {
761                 gpio_free(cardhu_bl_pwm);
762                 return ret;
763         }
764
765         ret = gpio_request(cardhu_bl_enb, "bl_enb");
766         if (ret < 0)
767                 return ret;
768         ret = gpio_direction_output(cardhu_bl_enb, 0);
769         if (ret < 0) {
770                 gpio_free(cardhu_bl_enb);
771                 return ret;
772         }
773
774         gpio_set_value(cardhu_lvds_shutdown, 1);
775         mdelay(20);
776         gpio_set_value(cardhu_bl_pwm, 1);
777         mdelay(10);
778         gpio_set_value(cardhu_bl_enb, 1);
779         mdelay(15);
780 #endif
781
782 #if DSI_PANEL_RESET
783 #if DSI_PANEL_218
784         ret = gpio_request(cardhu_dsi_218_panel_reset, "dsi_panel_reset");
785         if (ret < 0) {
786                 return ret;
787         }
788         ret = gpio_direction_output(cardhu_dsi_218_panel_reset, 0);
789         if (ret < 0) {
790                 gpio_free(cardhu_dsi_218_panel_reset);
791                 return ret;
792         }
793
794         gpio_set_value(cardhu_dsi_218_panel_reset, 1);
795         gpio_set_value(cardhu_dsi_218_panel_reset, 0);
796         mdelay(2);
797         gpio_set_value(cardhu_dsi_218_panel_reset, 1);
798         mdelay(2);
799 #endif
800
801 #if DSI_PANEL_219
802         ret = gpio_request(cardhu_dsi_219_panel_reset, "dsi_panel_reset");
803         if (ret < 0)
804                 return ret;
805         ret = gpio_direction_output(cardhu_dsi_219_panel_reset, 0);
806         if (ret < 0) {
807                 gpio_free(cardhu_dsi_219_panel_reset);
808                 return ret;
809         }
810
811         gpio_set_value(cardhu_dsi_219_panel_reset, 0);
812         gpio_set_value(cardhu_dsi_219_panel_reset, 1);
813         mdelay(10);
814         gpio_set_value(cardhu_dsi_219_panel_reset, 0);
815         mdelay(10);
816         gpio_set_value(cardhu_dsi_219_panel_reset, 1);
817         mdelay(15);
818 #endif
819 #endif
820
821         return 0;
822 }
823
824 static int cardhu_dsi_panel_disable(void)
825 {
826         int err;
827
828         err = 0;
829         printk(KERN_INFO "DSI panel disable\n");
830
831 #if DSI_PANEL_219
832         gpio_free(cardhu_dsi_219_panel_reset);
833         gpio_free(cardhu_bl_enb);
834         gpio_free(cardhu_bl_pwm);
835         gpio_free(cardhu_lvds_shutdown);
836 #endif
837
838 #if DSI_PANEL_218
839         gpio_free(cardhu_dsi_218_panel_reset);
840 #endif
841
842         return err;
843 }
844
845 static int cardhu_dsi_panel_postsuspend(void)
846 {
847         int err;
848
849         err = 0;
850         printk(KERN_INFO "DSI panel postsuspend\n");
851
852         if (cardhu_dsi_reg) {
853                 err = regulator_disable(cardhu_dsi_reg);
854                 if (err < 0)
855                         printk(KERN_ERR
856                         "DSI regulator avdd_dsi_csi disable failed\n");
857                 regulator_put(cardhu_dsi_reg);
858                 cardhu_dsi_reg = NULL;
859         }
860
861 #if DSI_PANEL_218
862         gpio_free(AVDD_LCD);
863 #endif
864
865         return err;
866 }
867
868 static struct tegra_dsi_cmd dsi_init_cmd[] = {
869         DSI_CMD_SHORT(0x05, 0x11, 0x00),
870         DSI_DLY_MS(150),
871         DSI_CMD_SHORT(0x05, 0x29, 0x00),
872         DSI_DLY_MS(20),
873 };
874
875 static struct tegra_dsi_cmd dsi_suspend_cmd[] = {
876         DSI_CMD_SHORT(0x05, 0x28, 0x00),
877         DSI_DLY_MS(20),
878         DSI_CMD_SHORT(0x05, 0x10, 0x00),
879         DSI_DLY_MS(5),
880 };
881
882 struct tegra_dsi_out cardhu_dsi = {
883         .n_data_lanes = 2,
884         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
885         .refresh_rate = 60,
886         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
887
888         .panel_has_frame_buffer = true,
889 #ifdef CONFIG_TEGRA_DSI_INSTANCE_1
890         .dsi_instance = 1,
891 #else
892         .dsi_instance = 0,
893 #endif
894         .panel_reset = DSI_PANEL_RESET,
895         .power_saving_suspend = true,
896
897         .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
898         .dsi_init_cmd = dsi_init_cmd,
899
900         .n_suspend_cmd = ARRAY_SIZE(dsi_suspend_cmd),
901         .dsi_suspend_cmd = dsi_suspend_cmd,
902
903         .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
904         .lp_cmd_mode_freq_khz = 430000,
905 };
906
907 static struct tegra_dc_mode cardhu_dsi_modes[] = {
908 #if DSI_PANEL_219
909         {
910                 .pclk = 10000000,
911                 .h_ref_to_sync = 4,
912                 .v_ref_to_sync = 1,
913                 .h_sync_width = 16,
914                 .v_sync_width = 1,
915                 .h_back_porch = 32,
916                 .v_back_porch = 1,
917                 .h_active = 540,
918                 .v_active = 960,
919                 .h_front_porch = 32,
920                 .v_front_porch = 2,
921         },
922 #endif
923
924 #if DSI_PANEL_218
925         {
926                 .pclk = 323000000,
927                 .h_ref_to_sync = 11,
928                 .v_ref_to_sync = 1,
929                 .h_sync_width = 16,
930                 .v_sync_width = 4,
931                 .h_back_porch = 16,
932                 .v_back_porch = 4,
933                 .h_active = 864,
934                 .v_active = 480,
935                 .h_front_porch = 16,
936                 .v_front_porch = 4,
937         },
938 #endif
939
940 };
941
942
943 static struct tegra_fb_data cardhu_dsi_fb_data = {
944 #if DSI_PANEL_219
945         .win            = 0,
946         .xres           = 540,
947         .yres           = 960,
948         .bits_per_pixel = 32,
949 #endif
950
951 #if DSI_PANEL_218
952         .win            = 0,
953         .xres           = 864,
954         .yres           = 480,
955         .bits_per_pixel = 32,
956 #endif
957         .flags          = TEGRA_FB_FLIP_ON_PROBE,
958 };
959 #endif
960
961 static struct tegra_dc_out cardhu_disp1_out = {
962         .align          = TEGRA_DC_ALIGN_MSB,
963         .order          = TEGRA_DC_ORDER_RED_BLUE,
964         .sd_settings    = &cardhu_sd_settings,
965         .parent_clk     = "pll_d_out0",
966
967 #ifndef CONFIG_TEGRA_CARDHU_DSI
968         .parent_clk_backup = "pll_d2_out0",
969
970         .type           = TEGRA_DC_OUT_RGB,
971         .depth          = 18,
972         .dither         = TEGRA_DC_ORDERED_DITHER,
973
974         .modes          = cardhu_panel_modes,
975         .n_modes        = ARRAY_SIZE(cardhu_panel_modes),
976
977         .enable         = cardhu_panel_enable,
978         .disable        = cardhu_panel_disable,
979 #else
980         .type           = TEGRA_DC_OUT_DSI,
981
982         .modes          = cardhu_dsi_modes,
983         .n_modes        = ARRAY_SIZE(cardhu_dsi_modes),
984
985         .dsi            = &cardhu_dsi,
986
987         .enable         = cardhu_dsi_panel_enable,
988         .disable        = cardhu_dsi_panel_disable,
989         .postsuspend    = cardhu_dsi_panel_postsuspend,
990 #endif
991 };
992
993 #ifdef CONFIG_TEGRA_DC
994 static struct tegra_dc_platform_data cardhu_disp1_pdata = {
995         .flags          = TEGRA_DC_FLAG_ENABLED,
996         .default_out    = &cardhu_disp1_out,
997         .emc_clk_rate   = 300000000,
998 #ifndef CONFIG_TEGRA_CARDHU_DSI
999         .fb             = &cardhu_fb_data,
1000 #else
1001         .fb             = &cardhu_dsi_fb_data,
1002 #endif
1003 };
1004
1005 static struct nvhost_device cardhu_disp1_device = {
1006         .name           = "tegradc",
1007         .id             = 0,
1008         .resource       = cardhu_disp1_resources,
1009         .num_resources  = ARRAY_SIZE(cardhu_disp1_resources),
1010         .dev = {
1011                 .platform_data = &cardhu_disp1_pdata,
1012         },
1013 };
1014
1015 static int cardhu_disp1_check_fb(struct device *dev, struct fb_info *info)
1016 {
1017         return info->device == &cardhu_disp1_device.dev;
1018 }
1019
1020 static struct nvhost_device cardhu_disp2_device = {
1021         .name           = "tegradc",
1022         .id             = 1,
1023         .resource       = cardhu_disp2_resources,
1024         .num_resources  = ARRAY_SIZE(cardhu_disp2_resources),
1025         .dev = {
1026                 .platform_data = &cardhu_disp2_pdata,
1027         },
1028 };
1029 #else
1030 static int cardhu_disp1_check_fb(struct device *dev, struct fb_info *info)
1031 {
1032         return 0;
1033 }
1034 #endif
1035
1036 #if defined(CONFIG_TEGRA_NVMAP)
1037 static struct nvmap_platform_carveout cardhu_carveouts[] = {
1038         [0] = NVMAP_HEAP_CARVEOUT_IRAM_INIT,
1039         [1] = {
1040                 .name           = "generic-0",
1041                 .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
1042                 .base           = 0,    /* Filled in by cardhu_panel_init() */
1043                 .size           = 0,    /* Filled in by cardhu_panel_init() */
1044                 .buddy_size     = SZ_32K,
1045         },
1046 };
1047
1048 static struct nvmap_platform_data cardhu_nvmap_data = {
1049         .carveouts      = cardhu_carveouts,
1050         .nr_carveouts   = ARRAY_SIZE(cardhu_carveouts),
1051 };
1052
1053 static struct platform_device cardhu_nvmap_device = {
1054         .name   = "tegra-nvmap",
1055         .id     = -1,
1056         .dev    = {
1057                 .platform_data = &cardhu_nvmap_data,
1058         },
1059 };
1060 #endif
1061
1062 #if defined(CONFIG_ION_TEGRA)
1063
1064 static struct platform_device tegra_iommu_device = {
1065         .name = "tegra_iommu_device",
1066         .id = -1,
1067         .dev = {
1068                 .platform_data = (void *)((1 << HWGRP_COUNT) - 1),
1069         },
1070 };
1071
1072 static struct ion_platform_data tegra_ion_data = {
1073         .nr = 4,
1074         .heaps = {
1075                 {
1076                         .type = ION_HEAP_TYPE_CARVEOUT,
1077                         .id = TEGRA_ION_HEAP_CARVEOUT,
1078                         .name = "carveout",
1079                         .base = 0,
1080                         .size = 0,
1081                 },
1082                 {
1083                         .type = ION_HEAP_TYPE_CARVEOUT,
1084                         .id = TEGRA_ION_HEAP_IRAM,
1085                         .name = "iram",
1086                         .base = TEGRA_IRAM_BASE + TEGRA_RESET_HANDLER_SIZE,
1087                         .size = TEGRA_IRAM_SIZE - TEGRA_RESET_HANDLER_SIZE,
1088                 },
1089                 {
1090                         .type = ION_HEAP_TYPE_CARVEOUT,
1091                         .id = TEGRA_ION_HEAP_VPR,
1092                         .name = "vpr",
1093                         .base = 0,
1094                         .size = 0,
1095                 },
1096                 {
1097                         .type = ION_HEAP_TYPE_IOMMU,
1098                         .id = TEGRA_ION_HEAP_IOMMU,
1099                         .name = "iommu",
1100                         .base = TEGRA_SMMU_BASE,
1101                         .size = TEGRA_SMMU_SIZE,
1102                         .priv = &tegra_iommu_device.dev,
1103                 },
1104         },
1105 };
1106
1107 static struct platform_device tegra_ion_device = {
1108         .name = "ion-tegra",
1109         .id = -1,
1110         .dev = {
1111                 .platform_data = &tegra_ion_data,
1112         },
1113 };
1114 #endif
1115
1116 static struct platform_device *cardhu_gfx_devices[] __initdata = {
1117 #if defined(CONFIG_TEGRA_NVMAP)
1118         &cardhu_nvmap_device,
1119 #endif
1120 #if defined(CONFIG_ION_TEGRA)
1121         &tegra_ion_device,
1122 #endif
1123         &tegra_pwfm0_device,
1124         &cardhu_backlight_device,
1125 };
1126
1127
1128 #ifdef CONFIG_HAS_EARLYSUSPEND
1129 /* put early_suspend/late_resume handlers here for the display in order
1130  * to keep the code out of the display driver, keeping it closer to upstream
1131  */
1132 struct early_suspend cardhu_panel_early_suspender;
1133
1134 static void cardhu_panel_early_suspend(struct early_suspend *h)
1135 {
1136         /* power down LCD, add use a black screen for HDMI */
1137         if (num_registered_fb > 0)
1138                 fb_blank(registered_fb[0], FB_BLANK_POWERDOWN);
1139         if (num_registered_fb > 1)
1140                 fb_blank(registered_fb[1], FB_BLANK_NORMAL);
1141 }
1142
1143 static void cardhu_panel_late_resume(struct early_suspend *h)
1144 {
1145         unsigned i;
1146         for (i = 0; i < num_registered_fb; i++)
1147                 fb_blank(registered_fb[i], FB_BLANK_UNBLANK);
1148 }
1149 #endif
1150
1151 int __init cardhu_panel_init(void)
1152 {
1153         int err;
1154         struct resource __maybe_unused *res;
1155
1156         tegra_get_board_info(&board_info);
1157         tegra_get_display_board_info(&display_board_info);
1158
1159 #if defined(CONFIG_TEGRA_NVMAP)
1160         cardhu_carveouts[1].base = tegra_carveout_start;
1161         cardhu_carveouts[1].size = tegra_carveout_size;
1162 #endif
1163
1164 #if defined(CONFIG_ION_TEGRA)
1165         tegra_ion_data.heaps[0].base = tegra_carveout_start;
1166         tegra_ion_data.heaps[0].size = tegra_carveout_size;
1167 #endif
1168
1169 #if defined(CONFIG_TEGRA_DC) && !defined(CONFIG_TEGRA_CARDHU_DSI)
1170         if (WARN_ON(board_info.board_id == BOARD_E1291 &&
1171                 ((board_info.sku & SKU_TOUCHSCREEN_MECH_FIX) == 0))) {
1172                 /* use 55Hz panel timings to reduce noise on sensitive touch */
1173                 printk("Using cardhu_panel_modes_55hz\n");
1174                 cardhu_disp1_out.parent_clk = "pll_p";
1175                 cardhu_disp1_out.modes = cardhu_panel_modes_55hz;
1176                 cardhu_disp1_out.n_modes = ARRAY_SIZE(cardhu_panel_modes_55hz);
1177         }
1178
1179         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1180                 /* initialize the values */
1181 #if defined(PM313_LVDS_PANEL_19X12)
1182                 cardhu_disp1_out.modes = panel_19X12_modes;
1183                 cardhu_disp1_out.n_modes = ARRAY_SIZE(panel_19X12_modes);
1184                 cardhu_disp1_out.parent_clk = "pll_d_out0";
1185 #if (PM313_LVDS_PANEL_BPP == 1)
1186                 cardhu_disp1_out.depth = 18;
1187 #else
1188                 cardhu_disp1_out.depth = 24;
1189 #endif
1190                 cardhu_fb_data.xres = 1920;
1191                 cardhu_fb_data.yres = 1200;
1192
1193                 cardhu_disp2_out.parent_clk = "pll_d2_out0";
1194                 cardhu_hdmi_fb_data.xres = 1920;
1195                 cardhu_hdmi_fb_data.yres = 1200;
1196 #endif
1197
1198                 /* lvds configuration */
1199                 err = gpio_request(pm313_R_FDE, "R_FDE");
1200                 err |= gpio_direction_output(pm313_R_FDE, 1);
1201
1202                 err |= gpio_request(pm313_R_FB, "R_FB");
1203                 err |= gpio_direction_output(pm313_R_FB, 1);
1204
1205                 err |= gpio_request(pm313_MODE0, "MODE0");
1206                 err |= gpio_direction_output(pm313_MODE0, 1);
1207
1208                 err |= gpio_request(pm313_MODE1, "MODE1");
1209                 err |= gpio_direction_output(pm313_MODE1, 0);
1210
1211                 err |= gpio_request(pm313_BPP, "BPP");
1212                 err |= gpio_direction_output(pm313_BPP, PM313_LVDS_PANEL_BPP);
1213
1214                 err = gpio_request(pm313_lvds_shutdown, "lvds_shutdown");
1215                 /* free ride provided by bootloader */
1216                 err |= gpio_direction_output(pm313_lvds_shutdown, 1);
1217
1218                 if (err)
1219                         printk(KERN_ERR "ERROR(s) in LVDS configuration\n");
1220         } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
1221                                 board_info.board_id == BOARD_PM269) ||
1222                                 (board_info.board_id == BOARD_E1257) ||
1223                                 (board_info.board_id == BOARD_PM305) ||
1224                                 (board_info.board_id == BOARD_PM311)) {
1225                 gpio_request(e1247_pm269_lvds_shutdown, "lvds_shutdown");
1226                 gpio_direction_output(e1247_pm269_lvds_shutdown, 1);
1227         } else {
1228                 gpio_request(cardhu_lvds_shutdown, "lvds_shutdown");
1229                 gpio_direction_output(cardhu_lvds_shutdown, 1);
1230         }
1231 #endif
1232
1233         gpio_request(cardhu_hdmi_hpd, "hdmi_hpd");
1234         gpio_direction_input(cardhu_hdmi_hpd);
1235
1236 #ifdef CONFIG_HAS_EARLYSUSPEND
1237         cardhu_panel_early_suspender.suspend = cardhu_panel_early_suspend;
1238         cardhu_panel_early_suspender.resume = cardhu_panel_late_resume;
1239         cardhu_panel_early_suspender.level = EARLY_SUSPEND_LEVEL_DISABLE_FB;
1240         register_early_suspend(&cardhu_panel_early_suspender);
1241 #endif
1242
1243 #ifdef CONFIG_TEGRA_GRHOST
1244         err = nvhost_device_register(&tegra_grhost_device);
1245         if (err)
1246                 return err;
1247 #endif
1248
1249         err = platform_add_devices(cardhu_gfx_devices,
1250                                 ARRAY_SIZE(cardhu_gfx_devices));
1251
1252 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
1253         res = nvhost_get_resource_byname(&cardhu_disp1_device,
1254                                          IORESOURCE_MEM, "fbmem");
1255         res->start = tegra_fb_start;
1256         res->end = tegra_fb_start + tegra_fb_size - 1;
1257 #endif
1258
1259         /* Copy the bootloader fb to the fb. */
1260         tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start,
1261                                 min(tegra_fb_size, tegra_bootloader_fb_size));
1262
1263 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
1264         if (!err)
1265                 err = nvhost_device_register(&cardhu_disp1_device);
1266
1267         res = nvhost_get_resource_byname(&cardhu_disp2_device,
1268                                          IORESOURCE_MEM, "fbmem");
1269         res->start = tegra_fb2_start;
1270         res->end = tegra_fb2_start + tegra_fb2_size - 1;
1271
1272         /* Copy the bootloader fb to the fb2. */
1273         tegra_move_framebuffer(tegra_fb2_start, tegra_bootloader_fb_start,
1274                                 min(tegra_fb2_size, tegra_bootloader_fb_size));
1275
1276         if (!err)
1277                 err = nvhost_device_register(&cardhu_disp2_device);
1278 #endif
1279
1280 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_NVAVP)
1281         if (!err)
1282                 err = nvhost_device_register(&nvavp_device);
1283 #endif
1284         return err;
1285 }