Arm: Tegra3: clocks: Disabled SSCCENTER bit for plle
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-panel.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-panel.c
3  *
4  * Copyright (c) 2010-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/ion.h>
23 #include <linux/tegra_ion.h>
24 #include <linux/gpio.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/resource.h>
27 #include <asm/mach-types.h>
28 #include <linux/platform_device.h>
29 #include <linux/earlysuspend.h>
30 #include <linux/pwm_backlight.h>
31 #include <asm/atomic.h>
32 #include <linux/nvhost.h>
33 #include <linux/nvmap.h>
34 #include <mach/irqs.h>
35 #include <mach/iomap.h>
36 #include <mach/dc.h>
37 #include <mach/fb.h>
38 #include <mach/smmu.h>
39
40 #include "board.h"
41 #include "board-cardhu.h"
42 #include "devices.h"
43 #include "gpio-names.h"
44
45 /* Select panel to be used. */
46 #define DSI_PANEL_219 1
47 #define DSI_PANEL_218 0
48 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
49 #define DSI_PANEL_RESET 1
50
51 /* Select LVDS panel resolution. 13X7 is default */
52 #define PM313_LVDS_PANEL_19X12                  1
53 #define PM313_LVDS_PANEL_BPP                    0 /* 0:24bpp, 1:18bpp */
54
55 /* PM313 display board specific pins */
56 #define pm313_R_FDE                     TEGRA_GPIO_PW0
57 #define pm313_R_FB                      TEGRA_GPIO_PN4
58 #define pm313_MODE0                     TEGRA_GPIO_PZ4
59 #define pm313_MODE1                     TEGRA_GPIO_PW1
60 #define pm313_BPP                       TEGRA_GPIO_PN6 /* 0:24bpp, 1:18bpp */
61 #define pm313_lvds_shutdown             TEGRA_GPIO_PH1
62
63 /* E1247 reworked for pm269 pins */
64 #define e1247_pm269_lvds_shutdown       TEGRA_GPIO_PN6
65
66 /* E1247 cardhu default display board pins */
67 #define cardhu_lvds_shutdown            TEGRA_GPIO_PL2
68
69 /* common pins( backlight ) for all display boards */
70 #define cardhu_bl_enb                   TEGRA_GPIO_PH2
71 #define cardhu_bl_pwm                   TEGRA_GPIO_PH0
72 #define cardhu_hdmi_hpd                 TEGRA_GPIO_PN7
73
74 #if defined(DSI_PANEL_219) || defined(DSI_PANEL_218)
75 #define cardhu_dsia_bl_enb              TEGRA_GPIO_PW1
76 #define cardhu_dsib_bl_enb              TEGRA_GPIO_PW0
77 #define cardhu_dsi_218_panel_reset      TEGRA_GPIO_PD2
78 #define cardhu_dsi_219_panel_reset      TEGRA_GPIO_PW0
79 #endif
80
81 #ifdef CONFIG_TEGRA_DC
82 static struct regulator *cardhu_hdmi_reg = NULL;
83 static struct regulator *cardhu_hdmi_pll = NULL;
84 static struct regulator *cardhu_hdmi_vddio = NULL;
85 #endif
86
87 static atomic_t sd_brightness = ATOMIC_INIT(255);
88
89 #ifdef CONFIG_TEGRA_CARDHU_DSI
90 static struct regulator *cardhu_dsi_reg = NULL;
91 #else
92 static struct regulator *cardhu_lvds_reg = NULL;
93 static struct regulator *cardhu_lvds_vdd_bl = NULL;
94 static struct regulator *cardhu_lvds_vdd_panel = NULL;
95 #endif
96
97 static struct board_info board_info;
98 static struct board_info display_board_info;
99
100 static tegra_dc_bl_output cardhu_bl_output_measured = {
101         0, 1, 2, 3, 4, 5, 6, 7,
102         8, 9, 10, 11, 12, 13, 14, 15,
103         16, 17, 18, 19, 20, 21, 22, 23,
104         24, 25, 26, 27, 28, 29, 30, 31,
105         32, 33, 34, 35, 36, 37, 38, 39,
106         40, 41, 42, 43, 44, 45, 46, 47,
107         48, 49, 49, 50, 51, 52, 53, 54,
108         55, 56, 57, 58, 59, 60, 61, 62,
109         63, 64, 65, 66, 67, 68, 69, 70,
110         70, 72, 73, 74, 75, 76, 77, 78,
111         79, 80, 81, 82, 83, 84, 85, 86,
112         87, 88, 89, 90, 91, 92, 93, 94,
113         95, 96, 97, 98, 99, 100, 101, 102,
114         103, 104, 105, 106, 107, 108, 110, 111,
115         112, 113, 114, 115, 116, 117, 118, 119,
116         120, 121, 122, 123, 124, 124, 125, 126,
117         127, 128, 129, 130, 131, 132, 133, 133,
118         134, 135, 136, 137, 138, 139, 140, 141,
119         142, 143, 144, 145, 146, 147, 148, 148,
120         149, 150, 151, 152, 153, 154, 155, 156,
121         157, 158, 159, 160, 161, 162, 163, 164,
122         165, 166, 167, 168, 169, 170, 171, 172,
123         173, 174, 175, 176, 177, 179, 180, 181,
124         182, 184, 185, 186, 187, 188, 189, 190,
125         191, 192, 193, 194, 195, 196, 197, 198,
126         199, 200, 201, 202, 203, 204, 205, 206,
127         207, 208, 209, 211, 212, 213, 214, 215,
128         216, 217, 218, 219, 220, 221, 222, 223,
129         224, 225, 226, 227, 228, 229, 230, 231,
130         232, 233, 234, 235, 236, 237, 238, 239,
131         240, 241, 242, 243, 244, 245, 246, 247,
132         248, 249, 250, 251, 252, 253, 254, 255
133 };
134
135 static p_tegra_dc_bl_output bl_output;
136
137 static int cardhu_backlight_init(struct device *dev)
138 {
139         int ret;
140
141         bl_output = cardhu_bl_output_measured;
142
143         if (WARN_ON(ARRAY_SIZE(cardhu_bl_output_measured) != 256))
144                 pr_err("bl_output array does not have 256 elements\n");
145
146 #ifndef CONFIG_TEGRA_CARDHU_DSI
147         tegra_gpio_disable(cardhu_bl_pwm);
148
149         ret = gpio_request(cardhu_bl_enb, "backlight_enb");
150         if (ret < 0)
151                 return ret;
152
153         ret = gpio_direction_output(cardhu_bl_enb, 1);
154         if (ret < 0)
155                 gpio_free(cardhu_bl_enb);
156         else
157                 tegra_gpio_enable(cardhu_bl_enb);
158
159         return ret;
160 #endif
161
162 #if DSI_PANEL_218
163         /* Enable back light for DSIa panel */
164         ret = gpio_request(cardhu_dsia_bl_enb, "dsia_bl_enable");
165         if (ret < 0)
166                 return ret;
167
168         ret = gpio_direction_output(cardhu_dsia_bl_enb, 1);
169         if (ret < 0)
170                 gpio_free(cardhu_dsia_bl_enb);
171         else
172                 tegra_gpio_enable(cardhu_dsia_bl_enb);
173
174         /* Enable back light for DSIb panel */
175         ret = gpio_request(cardhu_dsib_bl_enb, "dsib_bl_enable");
176         if (ret < 0)
177                 return ret;
178
179         ret = gpio_direction_output(cardhu_dsib_bl_enb, 1);
180         if (ret < 0)
181                 gpio_free(cardhu_dsib_bl_enb);
182         else
183                 tegra_gpio_enable(cardhu_dsib_bl_enb);
184 #endif
185
186 #if DSI_PANEL_219
187         /* Enable back light for DSIa panel */
188         ret = gpio_request(cardhu_dsia_bl_enb, "dsia_bl_enable");
189         if (ret < 0)
190                 return ret;
191
192         ret = gpio_direction_output(cardhu_dsia_bl_enb, 1);
193         if (ret < 0)
194                 gpio_free(cardhu_dsia_bl_enb);
195         else
196                 tegra_gpio_enable(cardhu_dsia_bl_enb);
197 #endif
198
199         return ret;
200 };
201
202 static void cardhu_backlight_exit(struct device *dev)
203 {
204 #ifndef CONFIG_TEGRA_CARDHU_DSI
205         /* int ret; */
206         /*ret = gpio_request(cardhu_bl_enb, "backlight_enb");*/
207         gpio_set_value(cardhu_bl_enb, 0);
208         gpio_free(cardhu_bl_enb);
209         tegra_gpio_disable(cardhu_bl_enb);
210         return;
211 #endif
212
213 #if DSI_PANEL_218
214         /* Disable back light for DSIa panel */
215         gpio_set_value(cardhu_dsia_bl_enb, 0);
216         gpio_free(cardhu_dsia_bl_enb);
217         tegra_gpio_disable(cardhu_dsia_bl_enb);
218
219         /* Disable back light for DSIb panel */
220         gpio_set_value(cardhu_dsib_bl_enb, 0);
221         gpio_free(cardhu_dsib_bl_enb);
222         tegra_gpio_disable(cardhu_dsib_bl_enb);
223
224         gpio_set_value(cardhu_lvds_shutdown, 1);
225         mdelay(20);
226 #endif
227
228 #if DSI_PANEL_219
229         /* Disable back light for DSIa panel */
230         gpio_set_value(cardhu_dsia_bl_enb, 0);
231         gpio_free(cardhu_dsia_bl_enb);
232         tegra_gpio_disable(cardhu_dsia_bl_enb);
233
234         gpio_set_value(cardhu_lvds_shutdown, 1);
235         mdelay(20);
236 #endif
237 }
238
239 static int cardhu_backlight_notify(struct device *unused, int brightness)
240 {
241         int cur_sd_brightness = atomic_read(&sd_brightness);
242
243 #ifndef CONFIG_TEGRA_CARDHU_DSI
244         /* Set the backlight GPIO pin mode to 'backlight_enable' */
245         gpio_set_value(cardhu_bl_enb, !!brightness);
246 #elif DSI_PANEL_218
247         /* DSIa */
248         gpio_set_value(cardhu_dsia_bl_enb, !!brightness);
249
250         /* DSIb */
251         gpio_set_value(cardhu_dsib_bl_enb, !!brightness);
252 #elif DSI_PANEL_219
253         /* DSIa */
254         gpio_set_value(cardhu_dsia_bl_enb, !!brightness);
255 #endif
256
257         /* SD brightness is a percentage, 8-bit value. */
258         brightness = (brightness * cur_sd_brightness) / 255;
259
260         /* Apply any backlight response curve */
261         if (brightness > 255) {
262                 pr_info("Error: Brightness > 255!\n");
263         } else {
264                 /* This value depends on the panel.
265                   Current 19X12 panel with PM313 gets
266                   full brightness when the output is 0. */
267                 if (display_board_info.board_id == BOARD_DISPLAY_PM313)
268                         brightness = 255 - bl_output[brightness];
269                 else
270                         brightness = bl_output[brightness];
271         }
272
273         return brightness;
274 }
275
276 static int cardhu_disp1_check_fb(struct device *dev, struct fb_info *info);
277
278 static struct platform_pwm_backlight_data cardhu_backlight_data = {
279         .pwm_id         = 0,
280         .max_brightness = 255,
281         .dft_brightness = 224,
282         .pwm_period_ns  = 1000000,
283         .init           = cardhu_backlight_init,
284         .exit           = cardhu_backlight_exit,
285         .notify         = cardhu_backlight_notify,
286         /* Only toggle backlight on fb blank notifications for disp1 */
287         .check_fb       = cardhu_disp1_check_fb,
288 };
289
290 static struct platform_device cardhu_backlight_device = {
291         .name   = "pwm-backlight",
292         .id     = -1,
293         .dev    = {
294                 .platform_data = &cardhu_backlight_data,
295         },
296 };
297
298 #ifndef CONFIG_TEGRA_CARDHU_DSI
299 static int cardhu_panel_enable(void)
300 {
301         if (cardhu_lvds_reg == NULL) {
302                 cardhu_lvds_reg = regulator_get(NULL, "vdd_lvds");
303                 if (WARN_ON(IS_ERR(cardhu_lvds_reg)))
304                         pr_err("%s: couldn't get regulator vdd_lvds: %ld\n",
305                                 __func__, PTR_ERR(cardhu_lvds_reg));
306                 else
307                         regulator_enable(cardhu_lvds_reg);
308         }
309
310         if (cardhu_lvds_vdd_bl == NULL) {
311                 cardhu_lvds_vdd_bl = regulator_get(NULL, "vdd_backlight");
312                 if (WARN_ON(IS_ERR(cardhu_lvds_vdd_bl)))
313                         pr_err("%s: couldn't get regulator vdd_backlight: %ld\n",
314                                 __func__, PTR_ERR(cardhu_lvds_vdd_bl));
315                 else
316                         regulator_enable(cardhu_lvds_vdd_bl);
317         }
318
319         if (cardhu_lvds_vdd_panel == NULL) {
320                 cardhu_lvds_vdd_panel = regulator_get(NULL, "vdd_lcd_panel");
321                 if (WARN_ON(IS_ERR(cardhu_lvds_vdd_panel)))
322                         pr_err("%s: couldn't get regulator vdd_lcd_panel: %ld\n",
323                                 __func__, PTR_ERR(cardhu_lvds_vdd_panel));
324                 else
325                         regulator_enable(cardhu_lvds_vdd_panel);
326         }
327
328         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
329                 /* lvds configuration */
330                 gpio_set_value(pm313_R_FDE, 1);
331                 gpio_set_value(pm313_R_FB, 1);
332                 gpio_set_value(pm313_MODE0, 1);
333                 gpio_set_value(pm313_MODE1, 0);
334                 gpio_set_value(pm313_BPP, PM313_LVDS_PANEL_BPP);
335
336                 /* FIXME : it may require more or less delay for latching
337                   values correctly before enabling RGB2LVDS */
338                 mdelay(100);
339                 gpio_set_value(pm313_lvds_shutdown, 1);
340         } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
341                         board_info.board_id == BOARD_PM269) ||
342                         (board_info.board_id == BOARD_E1257) ||
343                         (board_info.board_id == BOARD_PM305) ||
344                         (board_info.board_id == BOARD_PM311))
345                 gpio_set_value(e1247_pm269_lvds_shutdown, 1);
346         else
347                 gpio_set_value(cardhu_lvds_shutdown, 1);
348
349         return 0;
350 }
351
352 static int cardhu_panel_disable(void)
353 {
354         regulator_disable(cardhu_lvds_reg);
355         regulator_put(cardhu_lvds_reg);
356         cardhu_lvds_reg = NULL;
357
358         regulator_disable(cardhu_lvds_vdd_bl);
359         regulator_put(cardhu_lvds_vdd_bl);
360         cardhu_lvds_vdd_bl = NULL;
361
362         regulator_disable(cardhu_lvds_vdd_panel);
363         regulator_put(cardhu_lvds_vdd_panel);
364
365         cardhu_lvds_vdd_panel= NULL;
366
367         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
368                 gpio_set_value(pm313_lvds_shutdown, 0);
369         } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
370                         board_info.board_id == BOARD_PM269) ||
371                         (board_info.board_id == BOARD_E1257) ||
372                         (board_info.board_id == BOARD_PM305) ||
373                         (board_info.board_id == BOARD_PM311)) {
374                 gpio_set_value(e1247_pm269_lvds_shutdown, 0);
375         } else {
376                 gpio_set_value(cardhu_lvds_shutdown, 0);
377         }
378         return 0;
379 }
380 #endif
381
382 #ifdef CONFIG_TEGRA_DC
383 static int cardhu_hdmi_vddio_enable(void)
384 {
385         int ret;
386         if (!cardhu_hdmi_vddio) {
387                 cardhu_hdmi_vddio = regulator_get(NULL, "vdd_hdmi_con");
388                 if (IS_ERR_OR_NULL(cardhu_hdmi_vddio)) {
389                         ret = PTR_ERR(cardhu_hdmi_vddio);
390                         pr_err("hdmi: couldn't get regulator vdd_hdmi_con\n");
391                         cardhu_hdmi_vddio = NULL;
392                         return ret;
393                 }
394         }
395         ret = regulator_enable(cardhu_hdmi_vddio);
396         if (ret < 0) {
397                 pr_err("hdmi: couldn't enable regulator vdd_hdmi_con\n");
398                 regulator_put(cardhu_hdmi_vddio);
399                 cardhu_hdmi_vddio = NULL;
400                 return ret;
401         }
402         return ret;
403 }
404
405 static int cardhu_hdmi_vddio_disable(void)
406 {
407         if (cardhu_hdmi_vddio) {
408                 regulator_disable(cardhu_hdmi_vddio);
409                 regulator_put(cardhu_hdmi_vddio);
410                 cardhu_hdmi_vddio = NULL;
411         }
412         return 0;
413 }
414
415 static int cardhu_hdmi_enable(void)
416 {
417         int ret;
418         if (!cardhu_hdmi_reg) {
419                 cardhu_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
420                 if (IS_ERR_OR_NULL(cardhu_hdmi_reg)) {
421                         pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
422                         cardhu_hdmi_reg = NULL;
423                         return PTR_ERR(cardhu_hdmi_reg);
424                 }
425         }
426         ret = regulator_enable(cardhu_hdmi_reg);
427         if (ret < 0) {
428                 pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
429                 return ret;
430         }
431         if (!cardhu_hdmi_pll) {
432                 cardhu_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
433                 if (IS_ERR_OR_NULL(cardhu_hdmi_pll)) {
434                         pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
435                         cardhu_hdmi_pll = NULL;
436                         regulator_put(cardhu_hdmi_reg);
437                         cardhu_hdmi_reg = NULL;
438                         return PTR_ERR(cardhu_hdmi_pll);
439                 }
440         }
441         ret = regulator_enable(cardhu_hdmi_pll);
442         if (ret < 0) {
443                 pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
444                 return ret;
445         }
446         return 0;
447 }
448
449 static int cardhu_hdmi_disable(void)
450 {
451         regulator_disable(cardhu_hdmi_reg);
452         regulator_put(cardhu_hdmi_reg);
453         cardhu_hdmi_reg = NULL;
454
455         regulator_disable(cardhu_hdmi_pll);
456         regulator_put(cardhu_hdmi_pll);
457         cardhu_hdmi_pll = NULL;
458         return 0;
459 }
460
461 static struct resource cardhu_disp1_resources[] = {
462         {
463                 .name   = "irq",
464                 .start  = INT_DISPLAY_GENERAL,
465                 .end    = INT_DISPLAY_GENERAL,
466                 .flags  = IORESOURCE_IRQ,
467         },
468         {
469                 .name   = "regs",
470                 .start  = TEGRA_DISPLAY_BASE,
471                 .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
472                 .flags  = IORESOURCE_MEM,
473         },
474         {
475                 .name   = "fbmem",
476                 .start  = 0,    /* Filled in by cardhu_panel_init() */
477                 .end    = 0,    /* Filled in by cardhu_panel_init() */
478                 .flags  = IORESOURCE_MEM,
479         },
480 #ifdef CONFIG_TEGRA_DSI_INSTANCE_1
481         {
482                 .name   = "dsi_regs",
483                 .start  = TEGRA_DSIB_BASE,
484                 .end    = TEGRA_DSIB_BASE + TEGRA_DSIB_SIZE - 1,
485                 .flags  = IORESOURCE_MEM,
486         },
487 #else
488         {
489                 .name   = "dsi_regs",
490                 .start  = TEGRA_DSI_BASE,
491                 .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
492                 .flags  = IORESOURCE_MEM,
493         },
494 #endif
495 };
496
497 static struct resource cardhu_disp2_resources[] = {
498         {
499                 .name   = "irq",
500                 .start  = INT_DISPLAY_B_GENERAL,
501                 .end    = INT_DISPLAY_B_GENERAL,
502                 .flags  = IORESOURCE_IRQ,
503         },
504         {
505                 .name   = "regs",
506                 .start  = TEGRA_DISPLAY2_BASE,
507                 .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
508                 .flags  = IORESOURCE_MEM,
509         },
510         {
511                 .name   = "fbmem",
512                 .flags  = IORESOURCE_MEM,
513                 .start  = 0,
514                 .end    = 0,
515         },
516         {
517                 .name   = "hdmi_regs",
518                 .start  = TEGRA_HDMI_BASE,
519                 .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
520                 .flags  = IORESOURCE_MEM,
521         },
522 };
523 #endif
524
525 #ifndef CONFIG_TEGRA_CARDHU_DSI
526 static struct tegra_dc_mode panel_19X12_modes[] = {
527         {
528                 .pclk = 154000000,
529                 .h_ref_to_sync = 11,
530                 .v_ref_to_sync = 1,
531                 .h_sync_width = 32,
532                 .v_sync_width = 6,
533                 .h_back_porch = 80,
534                 .v_back_porch = 26,
535                 .h_active = 1920,
536                 .v_active = 1200,
537                 .h_front_porch = 48,
538                 .v_front_porch = 3,
539         },
540 };
541
542 static struct tegra_dc_mode cardhu_panel_modes[] = {
543         {
544                 /* 1366x768@60Hz */
545                 .pclk = 74180000,
546                 .h_ref_to_sync = 1,
547                 .v_ref_to_sync = 1,
548                 .h_sync_width = 30,
549                 .v_sync_width = 5,
550                 .h_back_porch = 52,
551                 .v_back_porch = 20,
552                 .h_active = 1366,
553                 .v_active = 768,
554                 .h_front_porch = 64,
555                 .v_front_porch = 25,
556         },
557         {
558                 /* 1366x768@50Hz */
559                 .pclk = 74180000,
560                 .h_ref_to_sync = 1,
561                 .v_ref_to_sync = 1,
562                 .h_sync_width = 30,
563                 .v_sync_width = 5,
564                 .h_back_porch = 56,
565                 .v_back_porch = 80,
566                 .h_active = 1366,
567                 .v_active = 768,
568                 .h_front_porch = 64,
569                 .v_front_porch = 125,
570         },
571         {
572                 /* 1366x768@48 */
573                 .pclk = 74180000,
574                 .h_ref_to_sync = 1,
575                 .v_ref_to_sync = 1,
576                 .h_sync_width = 30,
577                 .v_sync_width = 5,
578                 .h_back_porch = 52,
579                 .v_back_porch = 98,
580                 .h_active = 1366,
581                 .v_active = 768,
582                 .h_front_porch = 64,
583                 .v_front_porch = 152,
584         },
585 };
586
587 static struct tegra_dc_mode cardhu_panel_modes_55hz[] = {
588         {
589                 /* 1366x768p 55Hz */
590                 .pclk = 68000000,
591                 .h_ref_to_sync = 0,
592                 .v_ref_to_sync = 12,
593                 .h_sync_width = 30,
594                 .v_sync_width = 5,
595                 .h_back_porch = 52,
596                 .v_back_porch = 20,
597                 .h_active = 1366,
598                 .v_active = 768,
599                 .h_front_porch = 64,
600                 .v_front_porch = 25,
601         },
602 };
603 #endif
604
605 static struct tegra_dc_sd_settings cardhu_sd_settings = {
606         .enable = 1, /* enabled by default. */
607         .use_auto_pwm = false,
608         .hw_update_delay = 0,
609         .bin_width = -1,
610         .aggressiveness = 1,
611         .phase_in_adjustments = true,
612         .use_vid_luma = false,
613         /* Default video coefficients */
614         .coeff = {5, 9, 2},
615         .fc = {0, 0},
616         /* Immediate backlight changes */
617         .blp = {1024, 255},
618         /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
619         /* Default BL TF */
620         .bltf = {
621                         {
622                                 {57, 65, 74, 83},
623                                 {93, 103, 114, 126},
624                                 {138, 151, 165, 179},
625                                 {194, 209, 225, 242},
626                         },
627                         {
628                                 {58, 66, 75, 84},
629                                 {94, 105, 116, 127},
630                                 {140, 153, 166, 181},
631                                 {196, 211, 227, 244},
632                         },
633                         {
634                                 {60, 68, 77, 87},
635                                 {97, 107, 119, 130},
636                                 {143, 156, 170, 184},
637                                 {199, 215, 231, 248},
638                         },
639                         {
640                                 {64, 73, 82, 91},
641                                 {102, 113, 124, 137},
642                                 {149, 163, 177, 192},
643                                 {207, 223, 240, 255},
644                         },
645                 },
646         /* Default LUT */
647         .lut = {
648                         {
649                                 {250, 250, 250},
650                                 {194, 194, 194},
651                                 {149, 149, 149},
652                                 {113, 113, 113},
653                                 {82, 82, 82},
654                                 {56, 56, 56},
655                                 {34, 34, 34},
656                                 {15, 15, 15},
657                                 {0, 0, 0},
658                         },
659                         {
660                                 {246, 246, 246},
661                                 {191, 191, 191},
662                                 {147, 147, 147},
663                                 {111, 111, 111},
664                                 {80, 80, 80},
665                                 {55, 55, 55},
666                                 {33, 33, 33},
667                                 {14, 14, 14},
668                                 {0, 0, 0},
669                         },
670                         {
671                                 {239, 239, 239},
672                                 {185, 185, 185},
673                                 {142, 142, 142},
674                                 {107, 107, 107},
675                                 {77, 77, 77},
676                                 {52, 52, 52},
677                                 {30, 30, 30},
678                                 {12, 12, 12},
679                                 {0, 0, 0},
680                         },
681                         {
682                                 {224, 224, 224},
683                                 {173, 173, 173},
684                                 {133, 133, 133},
685                                 {99, 99, 99},
686                                 {70, 70, 70},
687                                 {46, 46, 46},
688                                 {25, 25, 25},
689                                 {7, 7, 7},
690                                 {0, 0, 0},
691                         },
692                 },
693         .sd_brightness = &sd_brightness,
694         .bl_device = &cardhu_backlight_device,
695 };
696
697 #ifdef CONFIG_TEGRA_DC
698 #ifndef CONFIG_TEGRA_CARDHU_DSI
699 static struct tegra_fb_data cardhu_fb_data = {
700         .win            = 0,
701         .xres           = 1366,
702         .yres           = 768,
703         .bits_per_pixel = 32,
704         .flags          = TEGRA_FB_FLIP_ON_PROBE,
705 };
706 #endif
707
708 static struct tegra_fb_data cardhu_hdmi_fb_data = {
709         .win            = 0,
710         .xres           = 640,
711         .yres           = 480,
712         .bits_per_pixel = 32,
713         .flags          = TEGRA_FB_FLIP_ON_PROBE,
714 };
715
716 static struct tegra_dc_out cardhu_disp2_out = {
717         .type           = TEGRA_DC_OUT_HDMI,
718         .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
719         .parent_clk     = "pll_d2_out0",
720
721         .dcc_bus        = 3,
722         .hotplug_gpio   = cardhu_hdmi_hpd,
723
724         .max_pixclock   = KHZ2PICOS(148500),
725
726         .align          = TEGRA_DC_ALIGN_MSB,
727         .order          = TEGRA_DC_ORDER_RED_BLUE,
728
729         .enable         = cardhu_hdmi_enable,
730         .disable        = cardhu_hdmi_disable,
731
732         .postsuspend    = cardhu_hdmi_vddio_disable,
733         .hotplug_init   = cardhu_hdmi_vddio_enable,
734 };
735
736 static struct tegra_dc_platform_data cardhu_disp2_pdata = {
737         .flags          = TEGRA_DC_FLAG_ENABLED,
738         .default_out    = &cardhu_disp2_out,
739         .fb             = &cardhu_hdmi_fb_data,
740         .emc_clk_rate   = 300000000,
741 };
742 #endif
743
744 #ifdef CONFIG_TEGRA_CARDHU_DSI
745 static int cardhu_dsi_panel_enable(void)
746 {
747         int ret;
748
749         if (cardhu_dsi_reg == NULL) {
750                 cardhu_dsi_reg = regulator_get(NULL, "avdd_dsi_csi");
751                 if (IS_ERR_OR_NULL(cardhu_dsi_reg)) {
752                         pr_err("dsi: Could not get regulator avdd_dsi_csi\n");
753                         cardhu_dsi_reg = NULL;
754                         return PTR_ERR(cardhu_dsi_reg);
755                 }
756         }
757         regulator_enable(cardhu_dsi_reg);
758
759         ret = gpio_request(AVDD_LCD, "avdd_lcd");
760         if (ret < 0)
761                 gpio_free(AVDD_LCD);
762         ret = gpio_direction_output(AVDD_LCD, 1);
763         if (ret < 0)
764                 gpio_free(AVDD_LCD);
765         else
766                 tegra_gpio_enable(AVDD_LCD);
767
768 #if DSI_PANEL_219
769
770         ret = gpio_request(cardhu_bl_pwm, "bl_pwm");
771         if (ret < 0)
772                 return ret;
773         ret = gpio_direction_output(cardhu_bl_pwm, 0);
774         if (ret < 0) {
775                 gpio_free(cardhu_bl_pwm);
776                 return ret;
777         } else
778                 tegra_gpio_enable(cardhu_bl_pwm);
779
780         ret = gpio_request(cardhu_bl_enb, "bl_enb");
781         if (ret < 0)
782                 return ret;
783         ret = gpio_direction_output(cardhu_bl_enb, 0);
784         if (ret < 0) {
785                 gpio_free(cardhu_bl_enb);
786                 return ret;
787         } else
788                 tegra_gpio_enable(cardhu_bl_enb);
789
790         gpio_set_value(cardhu_lvds_shutdown, 1);
791         mdelay(20);
792         gpio_set_value(cardhu_bl_pwm, 1);
793         mdelay(10);
794         gpio_set_value(cardhu_bl_enb, 1);
795         mdelay(15);
796 #endif
797
798 #if DSI_PANEL_RESET
799 #if DSI_PANEL_218
800         ret = gpio_request(cardhu_dsi_218_panel_reset, "dsi_panel_reset");
801         if (ret < 0) {
802                 return ret;
803         }
804         ret = gpio_direction_output(cardhu_dsi_218_panel_reset, 0);
805         if (ret < 0) {
806                 gpio_free(cardhu_dsi_218_panel_reset);
807                 return ret;
808         } else
809                 tegra_gpio_enable(cardhu_dsi_218_panel_reset);
810
811         gpio_set_value(cardhu_dsi_218_panel_reset, 1);
812         gpio_set_value(cardhu_dsi_218_panel_reset, 0);
813         mdelay(2);
814         gpio_set_value(cardhu_dsi_218_panel_reset, 1);
815         mdelay(2);
816 #endif
817
818 #if DSI_PANEL_219
819         ret = gpio_request(cardhu_dsi_219_panel_reset, "dsi_panel_reset");
820         if (ret < 0)
821                 return ret;
822         ret = gpio_direction_output(cardhu_dsi_219_panel_reset, 0);
823         if (ret < 0) {
824                 gpio_free(cardhu_dsi_219_panel_reset);
825                 return ret;
826         } else
827                 tegra_gpio_enable(cardhu_dsi_219_panel_reset);
828
829         gpio_set_value(cardhu_dsi_219_panel_reset, 0);
830         gpio_set_value(cardhu_dsi_219_panel_reset, 1);
831         mdelay(10);
832         gpio_set_value(cardhu_dsi_219_panel_reset, 0);
833         mdelay(10);
834         gpio_set_value(cardhu_dsi_219_panel_reset, 1);
835         mdelay(15);
836 #endif
837 #endif
838
839         return 0;
840 }
841
842 static int cardhu_dsi_panel_disable(void)
843 {
844         int err;
845
846         err = 0;
847         printk(KERN_INFO "DSI panel disable\n");
848
849 #if DSI_PANEL_219
850         tegra_gpio_disable(cardhu_dsi_219_panel_reset);
851         gpio_free(cardhu_dsi_219_panel_reset);
852         tegra_gpio_disable(cardhu_bl_enb);
853         gpio_free(cardhu_bl_enb);
854         tegra_gpio_disable(cardhu_bl_pwm);
855         gpio_free(cardhu_bl_pwm);
856         tegra_gpio_disable(cardhu_lvds_shutdown);
857         gpio_free(cardhu_lvds_shutdown);
858 #endif
859
860 #if DSI_PANEL_218
861         tegra_gpio_disable(cardhu_dsi_218_panel_reset);
862         gpio_free(cardhu_dsi_218_panel_reset);
863 #endif
864
865         return err;
866 }
867
868 static int cardhu_dsi_panel_postsuspend(void)
869 {
870         int err;
871
872         err = 0;
873         printk(KERN_INFO "DSI panel postsuspend\n");
874
875         if (cardhu_dsi_reg) {
876                 err = regulator_disable(cardhu_dsi_reg);
877                 if (err < 0)
878                         printk(KERN_ERR
879                         "DSI regulator avdd_dsi_csi disable failed\n");
880                 regulator_put(cardhu_dsi_reg);
881                 cardhu_dsi_reg = NULL;
882         }
883
884 #if DSI_PANEL_218
885         tegra_gpio_disable(AVDD_LCD);
886         gpio_free(AVDD_LCD);
887 #endif
888
889         return err;
890 }
891
892 static struct tegra_dsi_cmd dsi_init_cmd[] = {
893         DSI_CMD_SHORT(0x05, 0x11, 0x00),
894         DSI_DLY_MS(150),
895         DSI_CMD_SHORT(0x05, 0x29, 0x00),
896         DSI_DLY_MS(20),
897 };
898
899 static struct tegra_dsi_cmd dsi_suspend_cmd[] = {
900         DSI_CMD_SHORT(0x05, 0x28, 0x00),
901         DSI_DLY_MS(20),
902         DSI_CMD_SHORT(0x05, 0x10, 0x00),
903         DSI_DLY_MS(5),
904 };
905
906 struct tegra_dsi_out cardhu_dsi = {
907         .n_data_lanes = 2,
908         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
909         .refresh_rate = 60,
910         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
911
912         .panel_has_frame_buffer = true,
913 #ifdef CONFIG_TEGRA_DSI_INSTANCE_1
914         .dsi_instance = 1,
915 #else
916         .dsi_instance = 0,
917 #endif
918         .panel_reset = DSI_PANEL_RESET,
919         .power_saving_suspend = true,
920
921         .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
922         .dsi_init_cmd = dsi_init_cmd,
923
924         .n_suspend_cmd = ARRAY_SIZE(dsi_suspend_cmd),
925         .dsi_suspend_cmd = dsi_suspend_cmd,
926
927         .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
928         .lp_cmd_mode_freq_khz = 430000,
929 };
930
931 static struct tegra_dc_mode cardhu_dsi_modes[] = {
932 #if DSI_PANEL_219
933         {
934                 .pclk = 10000000,
935                 .h_ref_to_sync = 4,
936                 .v_ref_to_sync = 1,
937                 .h_sync_width = 16,
938                 .v_sync_width = 1,
939                 .h_back_porch = 32,
940                 .v_back_porch = 1,
941                 .h_active = 540,
942                 .v_active = 960,
943                 .h_front_porch = 32,
944                 .v_front_porch = 2,
945         },
946 #endif
947
948 #if DSI_PANEL_218
949         {
950                 .pclk = 323000000,
951                 .h_ref_to_sync = 11,
952                 .v_ref_to_sync = 1,
953                 .h_sync_width = 16,
954                 .v_sync_width = 4,
955                 .h_back_porch = 16,
956                 .v_back_porch = 4,
957                 .h_active = 864,
958                 .v_active = 480,
959                 .h_front_porch = 16,
960                 .v_front_porch = 4,
961         },
962 #endif
963
964 };
965
966
967 static struct tegra_fb_data cardhu_dsi_fb_data = {
968 #if DSI_PANEL_219
969         .win            = 0,
970         .xres           = 540,
971         .yres           = 960,
972         .bits_per_pixel = 32,
973 #endif
974
975 #if DSI_PANEL_218
976         .win            = 0,
977         .xres           = 864,
978         .yres           = 480,
979         .bits_per_pixel = 32,
980 #endif
981         .flags          = TEGRA_FB_FLIP_ON_PROBE,
982 };
983 #endif
984
985 static struct tegra_dc_out cardhu_disp1_out = {
986         .align          = TEGRA_DC_ALIGN_MSB,
987         .order          = TEGRA_DC_ORDER_RED_BLUE,
988         .sd_settings    = &cardhu_sd_settings,
989         .parent_clk     = "pll_d_out0",
990
991 #ifndef CONFIG_TEGRA_CARDHU_DSI
992         .parent_clk_backup = "pll_d2_out0",
993
994         .type           = TEGRA_DC_OUT_RGB,
995         .depth          = 18,
996         .dither         = TEGRA_DC_ORDERED_DITHER,
997
998         .modes          = cardhu_panel_modes,
999         .n_modes        = ARRAY_SIZE(cardhu_panel_modes),
1000
1001         .enable         = cardhu_panel_enable,
1002         .disable        = cardhu_panel_disable,
1003 #else
1004         .type           = TEGRA_DC_OUT_DSI,
1005
1006         .modes          = cardhu_dsi_modes,
1007         .n_modes        = ARRAY_SIZE(cardhu_dsi_modes),
1008
1009         .dsi            = &cardhu_dsi,
1010
1011         .enable         = cardhu_dsi_panel_enable,
1012         .disable        = cardhu_dsi_panel_disable,
1013         .postsuspend    = cardhu_dsi_panel_postsuspend,
1014 #endif
1015 };
1016
1017 #ifdef CONFIG_TEGRA_DC
1018 static struct tegra_dc_platform_data cardhu_disp1_pdata = {
1019         .flags          = TEGRA_DC_FLAG_ENABLED,
1020         .default_out    = &cardhu_disp1_out,
1021         .emc_clk_rate   = 300000000,
1022 #ifndef CONFIG_TEGRA_CARDHU_DSI
1023         .fb             = &cardhu_fb_data,
1024 #else
1025         .fb             = &cardhu_dsi_fb_data,
1026 #endif
1027 };
1028
1029 static struct nvhost_device cardhu_disp1_device = {
1030         .name           = "tegradc",
1031         .id             = 0,
1032         .resource       = cardhu_disp1_resources,
1033         .num_resources  = ARRAY_SIZE(cardhu_disp1_resources),
1034         .dev = {
1035                 .platform_data = &cardhu_disp1_pdata,
1036         },
1037 };
1038
1039 static int cardhu_disp1_check_fb(struct device *dev, struct fb_info *info)
1040 {
1041         return info->device == &cardhu_disp1_device.dev;
1042 }
1043
1044 static struct nvhost_device cardhu_disp2_device = {
1045         .name           = "tegradc",
1046         .id             = 1,
1047         .resource       = cardhu_disp2_resources,
1048         .num_resources  = ARRAY_SIZE(cardhu_disp2_resources),
1049         .dev = {
1050                 .platform_data = &cardhu_disp2_pdata,
1051         },
1052 };
1053 #else
1054 static int cardhu_disp1_check_fb(struct device *dev, struct fb_info *info)
1055 {
1056         return 0;
1057 }
1058 #endif
1059
1060 #if defined(CONFIG_TEGRA_NVMAP)
1061 static struct nvmap_platform_carveout cardhu_carveouts[] = {
1062         [0] = NVMAP_HEAP_CARVEOUT_IRAM_INIT,
1063         [1] = {
1064                 .name           = "generic-0",
1065                 .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
1066                 .base           = 0,    /* Filled in by cardhu_panel_init() */
1067                 .size           = 0,    /* Filled in by cardhu_panel_init() */
1068                 .buddy_size     = SZ_32K,
1069         },
1070 };
1071
1072 static struct nvmap_platform_data cardhu_nvmap_data = {
1073         .carveouts      = cardhu_carveouts,
1074         .nr_carveouts   = ARRAY_SIZE(cardhu_carveouts),
1075 };
1076
1077 static struct platform_device cardhu_nvmap_device = {
1078         .name   = "tegra-nvmap",
1079         .id     = -1,
1080         .dev    = {
1081                 .platform_data = &cardhu_nvmap_data,
1082         },
1083 };
1084 #endif
1085
1086 #if defined(CONFIG_ION_TEGRA)
1087
1088 static struct platform_device tegra_iommu_device = {
1089         .name = "tegra_iommu_device",
1090         .id = -1,
1091         .dev = {
1092                 .platform_data = (void *)((1 << HWGRP_COUNT) - 1),
1093         },
1094 };
1095
1096 static struct ion_platform_data tegra_ion_data = {
1097         .nr = 4,
1098         .heaps = {
1099                 {
1100                         .type = ION_HEAP_TYPE_CARVEOUT,
1101                         .id = TEGRA_ION_HEAP_CARVEOUT,
1102                         .name = "carveout",
1103                         .base = 0,
1104                         .size = 0,
1105                 },
1106                 {
1107                         .type = ION_HEAP_TYPE_CARVEOUT,
1108                         .id = TEGRA_ION_HEAP_IRAM,
1109                         .name = "iram",
1110                         .base = TEGRA_IRAM_BASE + TEGRA_RESET_HANDLER_SIZE,
1111                         .size = TEGRA_IRAM_SIZE - TEGRA_RESET_HANDLER_SIZE,
1112                 },
1113                 {
1114                         .type = ION_HEAP_TYPE_CARVEOUT,
1115                         .id = TEGRA_ION_HEAP_VPR,
1116                         .name = "vpr",
1117                         .base = 0,
1118                         .size = 0,
1119                 },
1120                 {
1121                         .type = ION_HEAP_TYPE_IOMMU,
1122                         .id = TEGRA_ION_HEAP_IOMMU,
1123                         .name = "iommu",
1124                         .base = TEGRA_SMMU_BASE,
1125                         .size = TEGRA_SMMU_SIZE,
1126                         .priv = &tegra_iommu_device.dev,
1127                 },
1128         },
1129 };
1130
1131 static struct platform_device tegra_ion_device = {
1132         .name = "ion-tegra",
1133         .id = -1,
1134         .dev = {
1135                 .platform_data = &tegra_ion_data,
1136         },
1137 };
1138 #endif
1139
1140 static struct platform_device *cardhu_gfx_devices[] __initdata = {
1141 #if defined(CONFIG_TEGRA_NVMAP)
1142         &cardhu_nvmap_device,
1143 #endif
1144 #if defined(CONFIG_ION_TEGRA)
1145         &tegra_ion_device,
1146 #endif
1147         &tegra_pwfm0_device,
1148         &cardhu_backlight_device,
1149 };
1150
1151
1152 #ifdef CONFIG_HAS_EARLYSUSPEND
1153 /* put early_suspend/late_resume handlers here for the display in order
1154  * to keep the code out of the display driver, keeping it closer to upstream
1155  */
1156 struct early_suspend cardhu_panel_early_suspender;
1157
1158 static void cardhu_panel_early_suspend(struct early_suspend *h)
1159 {
1160         /* power down LCD, add use a black screen for HDMI */
1161         if (num_registered_fb > 0)
1162                 fb_blank(registered_fb[0], FB_BLANK_POWERDOWN);
1163         if (num_registered_fb > 1)
1164                 fb_blank(registered_fb[1], FB_BLANK_NORMAL);
1165 }
1166
1167 static void cardhu_panel_late_resume(struct early_suspend *h)
1168 {
1169         unsigned i;
1170         for (i = 0; i < num_registered_fb; i++)
1171                 fb_blank(registered_fb[i], FB_BLANK_UNBLANK);
1172 }
1173 #endif
1174
1175 int __init cardhu_panel_init(void)
1176 {
1177         int err;
1178         struct resource __maybe_unused *res;
1179
1180         tegra_get_board_info(&board_info);
1181         tegra_get_display_board_info(&display_board_info);
1182
1183 #if defined(CONFIG_TEGRA_NVMAP)
1184         cardhu_carveouts[1].base = tegra_carveout_start;
1185         cardhu_carveouts[1].size = tegra_carveout_size;
1186 #endif
1187
1188 #if defined(CONFIG_ION_TEGRA)
1189         tegra_ion_data.heaps[0].base = tegra_carveout_start;
1190         tegra_ion_data.heaps[0].size = tegra_carveout_size;
1191 #endif
1192
1193 #if defined(CONFIG_TEGRA_DC) && !defined(CONFIG_TEGRA_CARDHU_DSI)
1194         if (WARN_ON(board_info.board_id == BOARD_E1291 &&
1195                 ((board_info.sku & SKU_TOUCHSCREEN_MECH_FIX) == 0))) {
1196                 /* use 55Hz panel timings to reduce noise on sensitive touch */
1197                 printk("Using cardhu_panel_modes_55hz\n");
1198                 cardhu_disp1_out.parent_clk = "pll_p";
1199                 cardhu_disp1_out.modes = cardhu_panel_modes_55hz;
1200                 cardhu_disp1_out.n_modes = ARRAY_SIZE(cardhu_panel_modes_55hz);
1201         }
1202
1203         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1204                 /* initialize the values */
1205 #if defined(PM313_LVDS_PANEL_19X12)
1206                 cardhu_disp1_out.modes = panel_19X12_modes;
1207                 cardhu_disp1_out.n_modes = ARRAY_SIZE(panel_19X12_modes);
1208                 cardhu_disp1_out.parent_clk = "pll_d_out0";
1209 #if (PM313_LVDS_PANEL_BPP == 1)
1210                 cardhu_disp1_out.depth = 18;
1211 #else
1212                 cardhu_disp1_out.depth = 24;
1213 #endif
1214                 cardhu_fb_data.xres = 1920;
1215                 cardhu_fb_data.yres = 1200;
1216
1217                 cardhu_disp2_out.parent_clk = "pll_d2_out0";
1218                 cardhu_hdmi_fb_data.xres = 1920;
1219                 cardhu_hdmi_fb_data.yres = 1200;
1220 #endif
1221
1222                 /* lvds configuration */
1223                 err = gpio_request(pm313_R_FDE, "R_FDE");
1224                 err |= gpio_direction_output(pm313_R_FDE, 1);
1225                 tegra_gpio_enable(pm313_R_FDE);
1226
1227                 err |= gpio_request(pm313_R_FB, "R_FB");
1228                 err |= gpio_direction_output(pm313_R_FB, 1);
1229                 tegra_gpio_enable(pm313_R_FB);
1230
1231                 err |= gpio_request(pm313_MODE0, "MODE0");
1232                 err |= gpio_direction_output(pm313_MODE0, 1);
1233                 tegra_gpio_enable(pm313_MODE0);
1234
1235                 err |= gpio_request(pm313_MODE1, "MODE1");
1236                 err |= gpio_direction_output(pm313_MODE1, 0);
1237                 tegra_gpio_enable(pm313_MODE1);
1238
1239                 err |= gpio_request(pm313_BPP, "BPP");
1240                 err |= gpio_direction_output(pm313_BPP, PM313_LVDS_PANEL_BPP);
1241                 tegra_gpio_enable(pm313_BPP);
1242
1243                 err = gpio_request(pm313_lvds_shutdown, "lvds_shutdown");
1244                 /* free ride provided by bootloader */
1245                 err |= gpio_direction_output(pm313_lvds_shutdown, 1);
1246                 tegra_gpio_enable(pm313_lvds_shutdown);
1247
1248                 if (err)
1249                         printk(KERN_ERR "ERROR(s) in LVDS configuration\n");
1250         } else if ((display_board_info.board_id == BOARD_DISPLAY_E1247 &&
1251                                 board_info.board_id == BOARD_PM269) ||
1252                                 (board_info.board_id == BOARD_E1257) ||
1253                                 (board_info.board_id == BOARD_PM305) ||
1254                                 (board_info.board_id == BOARD_PM311)) {
1255                 gpio_request(e1247_pm269_lvds_shutdown, "lvds_shutdown");
1256                 gpio_direction_output(e1247_pm269_lvds_shutdown, 1);
1257                 tegra_gpio_enable(e1247_pm269_lvds_shutdown);
1258         } else {
1259                 gpio_request(cardhu_lvds_shutdown, "lvds_shutdown");
1260                 gpio_direction_output(cardhu_lvds_shutdown, 1);
1261                 tegra_gpio_enable(cardhu_lvds_shutdown);
1262         }
1263 #endif
1264
1265         tegra_gpio_enable(cardhu_hdmi_hpd);
1266         gpio_request(cardhu_hdmi_hpd, "hdmi_hpd");
1267         gpio_direction_input(cardhu_hdmi_hpd);
1268
1269 #ifdef CONFIG_HAS_EARLYSUSPEND
1270         cardhu_panel_early_suspender.suspend = cardhu_panel_early_suspend;
1271         cardhu_panel_early_suspender.resume = cardhu_panel_late_resume;
1272         cardhu_panel_early_suspender.level = EARLY_SUSPEND_LEVEL_DISABLE_FB;
1273         register_early_suspend(&cardhu_panel_early_suspender);
1274 #endif
1275
1276 #ifdef CONFIG_TEGRA_GRHOST
1277         err = nvhost_device_register(&tegra_grhost_device);
1278         if (err)
1279                 return err;
1280 #endif
1281
1282         err = platform_add_devices(cardhu_gfx_devices,
1283                                 ARRAY_SIZE(cardhu_gfx_devices));
1284
1285 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
1286         res = nvhost_get_resource_byname(&cardhu_disp1_device,
1287                                          IORESOURCE_MEM, "fbmem");
1288         res->start = tegra_fb_start;
1289         res->end = tegra_fb_start + tegra_fb_size - 1;
1290 #endif
1291
1292         /* Copy the bootloader fb to the fb. */
1293         tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start,
1294                                 min(tegra_fb_size, tegra_bootloader_fb_size));
1295
1296 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
1297         if (!err)
1298                 err = nvhost_device_register(&cardhu_disp1_device);
1299
1300         res = nvhost_get_resource_byname(&cardhu_disp2_device,
1301                                          IORESOURCE_MEM, "fbmem");
1302         res->start = tegra_fb2_start;
1303         res->end = tegra_fb2_start + tegra_fb2_size - 1;
1304
1305         /* Copy the bootloader fb to the fb2. */
1306         tegra_move_framebuffer(tegra_fb2_start, tegra_bootloader_fb_start,
1307                                 min(tegra_fb2_size, tegra_bootloader_fb_size));
1308
1309         if (!err)
1310                 err = nvhost_device_register(&cardhu_disp2_device);
1311 #endif
1312
1313 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_NVAVP)
1314         if (!err)
1315                 err = nvhost_device_register(&nvavp_device);
1316 #endif
1317         return err;
1318 }