arm: tegra: Increase pwm frequency.
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-panel.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-panel.c
3  *
4  * Copyright (c) 2010-2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/gpio.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/resource.h>
25 #include <asm/mach-types.h>
26 #include <linux/platform_device.h>
27 #include <linux/pwm_backlight.h>
28 #include <asm/atomic.h>
29 #include <linux/nvhost.h>
30 #include <mach/nvmap.h>
31 #include <mach/irqs.h>
32 #include <mach/iomap.h>
33 #include <mach/dc.h>
34 #include <mach/fb.h>
35
36 #include "board.h"
37 #include "board-cardhu.h"
38 #include "devices.h"
39 #include "gpio-names.h"
40
41 /* Select panel to be used. */
42 #define DSI_PANEL_219 0
43 #define DSI_PANEL_218 1
44 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
45 #define DSI_PANEL_RESET 0
46
47 #define pm269_lvds_shutdown     TEGRA_GPIO_PN6
48 #define cardhu_lvds_shutdown    TEGRA_GPIO_PL2
49 #define cardhu_bl_enb           TEGRA_GPIO_PH2
50 #define cardhu_bl_pwm           TEGRA_GPIO_PH0
51 #define cardhu_hdmi_hpd         TEGRA_GPIO_PN7
52
53 #if defined(DSI_PANEL_219) || defined(DSI_PANEL_218)
54 #define cardhu_dsia_bl_enb      TEGRA_GPIO_PW1
55 #define cardhu_dsib_bl_enb      TEGRA_GPIO_PW0
56 #define cardhu_dsi_panel_reset  TEGRA_GPIO_PD2
57 #endif
58
59 static struct regulator *cardhu_hdmi_reg = NULL;
60 static struct regulator *cardhu_hdmi_pll = NULL;
61 static struct regulator *cardhu_hdmi_vddio = NULL;
62
63 static atomic_t sd_brightness = ATOMIC_INIT(255);
64
65 #ifdef CONFIG_TEGRA_CARDHU_DSI
66 static struct regulator *cardhu_dsi_reg = NULL;
67 #else
68 static struct regulator *cardhu_lvds_reg = NULL;
69 static struct regulator *cardhu_lvds_vdd_bl = NULL;
70 static struct regulator *cardhu_lvds_vdd_panel = NULL;
71 #endif
72
73 static struct board_info board_info;
74
75 static tegra_dc_bl_output cardhu_bl_output_measured = {
76         0, 1, 2, 3, 4, 5, 6, 7,
77         8, 9, 10, 11, 12, 13, 14, 15,
78         16, 17, 18, 19, 20, 21, 22, 23,
79         24, 25, 26, 27, 28, 29, 30, 31,
80         32, 33, 34, 35, 36, 37, 38, 39,
81         40, 41, 42, 43, 44, 45, 46, 47,
82         48, 49, 49, 50, 51, 52, 53, 54,
83         55, 56, 57, 58, 59, 60, 61, 62,
84         63, 64, 65, 66, 67, 68, 69, 70,
85         70, 72, 73, 74, 75, 76, 77, 78,
86         79, 80, 81, 82, 83, 84, 85, 86,
87         87, 88, 89, 90, 91, 92, 93, 94,
88         95, 96, 97, 98, 99, 100, 101, 102,
89         103, 104, 105, 106, 107, 108, 110, 111,
90         112, 113, 114, 115, 116, 117, 118, 119,
91         120, 121, 122, 123, 124, 124, 125, 126,
92         127, 128, 129, 130, 131, 132, 133, 133,
93         134, 135, 136, 137, 138, 139, 140, 141,
94         142, 143, 144, 145, 146, 147, 148, 148,
95         149, 150, 151, 152, 153, 154, 155, 156,
96         157, 158, 159, 160, 161, 162, 163, 164,
97         165, 166, 167, 168, 169, 170, 171, 172,
98         173, 174, 175, 176, 177, 179, 180, 181,
99         182, 184, 185, 186, 187, 188, 189, 190,
100         191, 192, 193, 194, 195, 196, 197, 198,
101         199, 200, 201, 202, 203, 204, 205, 206,
102         207, 208, 209, 211, 212, 213, 214, 215,
103         216, 217, 218, 219, 220, 221, 222, 223,
104         224, 225, 226, 227, 228, 229, 230, 231,
105         232, 233, 234, 235, 236, 237, 238, 239,
106         240, 241, 242, 243, 244, 245, 246, 247,
107         248, 249, 250, 251, 252, 253, 254, 255
108 };
109
110 static p_tegra_dc_bl_output bl_output;
111
112 static int cardhu_backlight_init(struct device *dev) {
113         int ret;
114
115         bl_output = cardhu_bl_output_measured;
116
117         if (WARN_ON(ARRAY_SIZE(cardhu_bl_output_measured) != 256))
118                 pr_err("bl_output array does not have 256 elements\n");
119
120 #ifndef CONFIG_TEGRA_CARDHU_DSI
121         tegra_gpio_disable(cardhu_bl_pwm);
122
123         ret = gpio_request(cardhu_bl_enb, "backlight_enb");
124         if (ret < 0)
125                 return ret;
126
127         ret = gpio_direction_output(cardhu_bl_enb, 1);
128         if (ret < 0)
129                 gpio_free(cardhu_bl_enb);
130         else
131                 tegra_gpio_enable(cardhu_bl_enb);
132
133         return ret;
134 #endif
135
136 #if DSI_PANEL_219 || DSI_PANEL_218
137         /* Enable back light for DSIa panel */
138         printk("cardhu_dsi_backlight_init\n");
139         ret = gpio_request(cardhu_dsia_bl_enb, "dsia_bl_enable");
140         if (ret < 0)
141                 return ret;
142
143         ret = gpio_direction_output(cardhu_dsia_bl_enb, 1);
144         if (ret < 0)
145                 gpio_free(cardhu_dsia_bl_enb);
146         else
147                 tegra_gpio_enable(cardhu_dsia_bl_enb);
148
149         /* Enable back light for DSIb panel */
150         ret = gpio_request(cardhu_dsib_bl_enb, "dsib_bl_enable");
151         if (ret < 0)
152                 return ret;
153
154         ret = gpio_direction_output(cardhu_dsib_bl_enb, 1);
155         if (ret < 0)
156                 gpio_free(cardhu_dsib_bl_enb);
157         else
158                 tegra_gpio_enable(cardhu_dsib_bl_enb);
159 #endif
160
161         return ret;
162 };
163
164 static void cardhu_backlight_exit(struct device *dev) {
165 #ifndef CONFIG_TEGRA_CARDHU_DSI
166         /* int ret; */
167         /*ret = gpio_request(cardhu_bl_enb, "backlight_enb");*/
168         gpio_set_value(cardhu_bl_enb, 0);
169         gpio_free(cardhu_bl_enb);
170         tegra_gpio_disable(cardhu_bl_enb);
171         return;
172 #endif
173 #if DSI_PANEL_219 || DSI_PANEL_218
174         /* Disable back light for DSIa panel */
175         gpio_set_value(cardhu_dsia_bl_enb, 0);
176         gpio_free(cardhu_dsia_bl_enb);
177         tegra_gpio_disable(cardhu_dsia_bl_enb);
178
179         /* Disable back light for DSIb panel */
180         gpio_set_value(cardhu_dsib_bl_enb, 0);
181         gpio_free(cardhu_dsib_bl_enb);
182         tegra_gpio_disable(cardhu_dsib_bl_enb);
183
184         gpio_set_value(cardhu_lvds_shutdown, 1);
185         mdelay(20);
186 #endif
187 }
188
189 static int cardhu_backlight_notify(struct device *unused, int brightness)
190 {
191         int cur_sd_brightness = atomic_read(&sd_brightness);
192         int orig_brightness = brightness;
193
194 #ifndef CONFIG_TEGRA_CARDHU_DSI
195         /* Set the backlight GPIO pin mode to 'backlight_enable' */
196         gpio_request(cardhu_bl_enb, "backlight_enb");
197         gpio_set_value(cardhu_bl_enb, !!brightness);
198 #elif DSI_PANEL_219 || DSI_PANEL_218
199         /* DSIa */
200         gpio_set_value(cardhu_dsia_bl_enb, !!brightness);
201
202         /* DSIb */
203         gpio_set_value(cardhu_dsib_bl_enb, !!brightness);
204 #endif
205
206         /* SD brightness is a percentage, 8-bit value. */
207         brightness = (brightness * cur_sd_brightness) / 255;
208
209         /* Apply any backlight response curve */
210         if (brightness > 255) {
211                 pr_info("Error: Brightness > 255!\n");
212         } else {
213                 brightness = bl_output[brightness];
214         }
215
216         return brightness;
217 }
218
219 static struct platform_pwm_backlight_data cardhu_backlight_data = {
220         .pwm_id         = 0,
221         .max_brightness = 255,
222         .dft_brightness = 224,
223         .pwm_period_ns  = 1000000,
224         .init           = cardhu_backlight_init,
225         .exit           = cardhu_backlight_exit,
226         .notify         = cardhu_backlight_notify,
227 };
228
229 static struct platform_device cardhu_backlight_device = {
230         .name   = "pwm-backlight",
231         .id     = -1,
232         .dev    = {
233                 .platform_data = &cardhu_backlight_data,
234         },
235 };
236
237 #ifndef CONFIG_TEGRA_CARDHU_DSI
238 static int cardhu_panel_enable(void)
239 {
240         if (cardhu_lvds_reg == NULL) {
241                 cardhu_lvds_reg = regulator_get(NULL, "vdd_lvds");
242                 if (WARN_ON(IS_ERR(cardhu_lvds_reg)))
243                         pr_err("%s: couldn't get regulator vdd_lvds: %ld\n",
244                                __func__, PTR_ERR(cardhu_lvds_reg));
245                 else
246                         regulator_enable(cardhu_lvds_reg);
247         }
248
249         if (cardhu_lvds_vdd_bl == NULL) {
250                 cardhu_lvds_vdd_bl = regulator_get(NULL, "vdd_backlight");
251                 if (WARN_ON(IS_ERR(cardhu_lvds_vdd_bl)))
252                         pr_err("%s: couldn't get regulator vdd_backlight: %ld\n",
253                                __func__, PTR_ERR(cardhu_lvds_vdd_bl));
254                 else
255                         regulator_enable(cardhu_lvds_vdd_bl);
256         }
257
258         if (cardhu_lvds_vdd_panel == NULL) {
259                 cardhu_lvds_vdd_panel = regulator_get(NULL, "vdd_lcd_panel");
260                 if (WARN_ON(IS_ERR(cardhu_lvds_vdd_panel)))
261                         pr_err("%s: couldn't get regulator vdd_lcd_panel: %ld\n",
262                                __func__, PTR_ERR(cardhu_lvds_vdd_panel));
263                 else
264                         regulator_enable(cardhu_lvds_vdd_panel);
265         }
266         if (board_info.board_id == BOARD_PM269)
267                 gpio_set_value(pm269_lvds_shutdown, 1);
268         else
269                 gpio_set_value(cardhu_lvds_shutdown, 1);
270
271         return 0;
272 }
273
274 static int cardhu_panel_disable(void)
275 {
276         regulator_disable(cardhu_lvds_reg);
277         regulator_put(cardhu_lvds_reg);
278         cardhu_lvds_reg = NULL;
279
280         regulator_disable(cardhu_lvds_vdd_bl);
281         regulator_put(cardhu_lvds_vdd_bl);
282         cardhu_lvds_vdd_bl = NULL;
283
284         regulator_disable(cardhu_lvds_vdd_panel);
285         regulator_put(cardhu_lvds_vdd_panel);
286         cardhu_lvds_vdd_panel= NULL;
287         if (board_info.board_id == BOARD_PM269)
288                 gpio_set_value(pm269_lvds_shutdown, 0);
289         else
290                 gpio_set_value(cardhu_lvds_shutdown, 0);
291         return 0;
292 }
293 #endif
294
295 static int cardhu_hdmi_vddio_enable(void)
296 {
297         int ret;
298         if (!cardhu_hdmi_vddio) {
299                 cardhu_hdmi_vddio = regulator_get(NULL, "vdd_hdmi_con");
300                 if (IS_ERR_OR_NULL(cardhu_hdmi_vddio)) {
301                         ret = PTR_ERR(cardhu_hdmi_vddio);
302                         pr_err("hdmi: couldn't get regulator vdd_hdmi_con\n");
303                         cardhu_hdmi_vddio = NULL;
304                         return ret;
305                 }
306         }
307         ret = regulator_enable(cardhu_hdmi_vddio);
308         if (ret < 0) {
309                 pr_err("hdmi: couldn't enable regulator vdd_hdmi_con\n");
310                 regulator_put(cardhu_hdmi_vddio);
311                 cardhu_hdmi_vddio = NULL;
312                 return ret;
313         }
314         return ret;
315 }
316
317 static int cardhu_hdmi_vddio_disable(void)
318 {
319         if (cardhu_hdmi_vddio) {
320                 regulator_disable(cardhu_hdmi_vddio);
321                 regulator_put(cardhu_hdmi_vddio);
322                 cardhu_hdmi_vddio = NULL;
323         }
324         return 0;
325 }
326
327 static int cardhu_hdmi_enable(void)
328 {
329         int ret;
330         if (!cardhu_hdmi_reg) {
331                 cardhu_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
332                 if (IS_ERR_OR_NULL(cardhu_hdmi_reg)) {
333                         pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
334                         cardhu_hdmi_reg = NULL;
335                         return PTR_ERR(cardhu_hdmi_reg);
336                 }
337         }
338         ret = regulator_enable(cardhu_hdmi_reg);
339         if (ret < 0) {
340                 pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
341                 return ret;
342         }
343         if (!cardhu_hdmi_pll) {
344                 cardhu_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
345                 if (IS_ERR_OR_NULL(cardhu_hdmi_pll)) {
346                         pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
347                         cardhu_hdmi_pll = NULL;
348                         regulator_put(cardhu_hdmi_reg);
349                         cardhu_hdmi_reg = NULL;
350                         return PTR_ERR(cardhu_hdmi_pll);
351                 }
352         }
353         ret = regulator_enable(cardhu_hdmi_pll);
354         if (ret < 0) {
355                 pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
356                 return ret;
357         }
358         return 0;
359 }
360
361 static int cardhu_hdmi_disable(void)
362 {
363         regulator_disable(cardhu_hdmi_reg);
364         regulator_put(cardhu_hdmi_reg);
365         cardhu_hdmi_reg = NULL;
366
367         regulator_disable(cardhu_hdmi_pll);
368         regulator_put(cardhu_hdmi_pll);
369         cardhu_hdmi_pll = NULL;
370         return 0;
371 }
372 static struct resource cardhu_disp1_resources[] = {
373         {
374                 .name   = "irq",
375                 .start  = INT_DISPLAY_GENERAL,
376                 .end    = INT_DISPLAY_GENERAL,
377                 .flags  = IORESOURCE_IRQ,
378         },
379         {
380                 .name   = "regs",
381                 .start  = TEGRA_DISPLAY_BASE,
382                 .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
383                 .flags  = IORESOURCE_MEM,
384         },
385         {
386                 .name   = "fbmem",
387                 .start  = 0,    /* Filled in by cardhu_panel_init() */
388                 .end    = 0,    /* Filled in by cardhu_panel_init() */
389                 .flags  = IORESOURCE_MEM,
390         },
391 #ifdef CONFIG_TEGRA_DSI_INSTANCE_1
392         {
393                 .name   = "dsi_regs",
394                 .start  = TEGRA_DSIB_BASE,
395                 .end    = TEGRA_DSIB_BASE + TEGRA_DSIB_SIZE - 1,
396                 .flags  = IORESOURCE_MEM,
397         },
398 #else
399         {
400                 .name   = "dsi_regs",
401                 .start  = TEGRA_DSI_BASE,
402                 .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
403                 .flags  = IORESOURCE_MEM,
404         },
405 #endif
406 };
407
408 static struct resource cardhu_disp2_resources[] = {
409         {
410                 .name   = "irq",
411                 .start  = INT_DISPLAY_B_GENERAL,
412                 .end    = INT_DISPLAY_B_GENERAL,
413                 .flags  = IORESOURCE_IRQ,
414         },
415         {
416                 .name   = "regs",
417                 .start  = TEGRA_DISPLAY2_BASE,
418                 .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
419                 .flags  = IORESOURCE_MEM,
420         },
421         {
422                 .name   = "fbmem",
423                 .flags  = IORESOURCE_MEM,
424                 .start  = 0,
425                 .end    = 0,
426         },
427         {
428                 .name   = "hdmi_regs",
429                 .start  = TEGRA_HDMI_BASE,
430                 .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
431                 .flags  = IORESOURCE_MEM,
432         },
433 };
434
435 #ifndef CONFIG_TEGRA_CARDHU_DSI
436 static struct tegra_dc_mode cardhu_panel_modes[] = {
437         {
438                 /* 1366x768@60Hz */
439                 .pclk = 74180000,
440                 .h_ref_to_sync = 1,
441                 .v_ref_to_sync = 1,
442                 .h_sync_width = 30,
443                 .v_sync_width = 5,
444                 .h_back_porch = 52,
445                 .v_back_porch = 20,
446                 .h_active = 1366,
447                 .v_active = 768,
448                 .h_front_porch = 64,
449                 .v_front_porch = 25,
450         },
451 };
452
453 static struct tegra_dc_mode cardhu_panel_modes_55hz[] = {
454         {
455                 /* 1366x768p 55Hz */
456                 .pclk = 68000000,
457                 .h_ref_to_sync = 0,
458                 .v_ref_to_sync = 12,
459                 .h_sync_width = 30,
460                 .v_sync_width = 5,
461                 .h_back_porch = 52,
462                 .v_back_porch = 20,
463                 .h_active = 1366,
464                 .v_active = 768,
465                 .h_front_porch = 64,
466                 .v_front_porch = 25,
467         },
468 };
469 #endif
470
471 static struct tegra_dc_sd_settings cardhu_sd_settings = {
472         .enable = 1, /* enabled by default. */
473         .use_auto_pwm = false,
474         .hw_update_delay = 0,
475         .bin_width = -1,
476         .aggressiveness = 1,
477         .use_vid_luma = false,
478         /* Default video coefficients */
479         .coeff = {5, 9, 2},
480         .fc = {0, 0},
481         /* Immediate backlight changes */
482         .blp = {1024, 255},
483         /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
484         /* Default BL TF */
485         .bltf = {
486                         {
487                                 {57, 65, 74, 83},
488                                 {93, 103, 114, 126},
489                                 {138, 151, 165, 179},
490                                 {194, 209, 225, 242},
491                         },
492                         {
493                                 {58, 66, 75, 84},
494                                 {94, 105, 116, 127},
495                                 {140, 153, 166, 181},
496                                 {196, 211, 227, 244},
497                         },
498                         {
499                                 {60, 68, 77, 87},
500                                 {97, 107, 119, 130},
501                                 {143, 156, 170, 184},
502                                 {199, 215, 231, 248},
503                         },
504                         {
505                                 {64, 73, 82, 91},
506                                 {102, 113, 124, 137},
507                                 {149, 163, 177, 192},
508                                 {207, 223, 240, 255},
509                         },
510                 },
511         /* Default LUT */
512         .lut = {
513                         {
514                                 {250, 250, 250},
515                                 {194, 194, 194},
516                                 {149, 149, 149},
517                                 {113, 113, 113},
518                                 {82, 82, 82},
519                                 {56, 56, 56},
520                                 {34, 34, 34},
521                                 {15, 15, 15},
522                                 {0, 0, 0},
523                         },
524                         {
525                                 {246, 246, 246},
526                                 {191, 191, 191},
527                                 {147, 147, 147},
528                                 {111, 111, 111},
529                                 {80, 80, 80},
530                                 {55, 55, 55},
531                                 {33, 33, 33},
532                                 {14, 14, 14},
533                                 {0, 0, 0},
534                         },
535                         {
536                                 {239, 239, 239},
537                                 {185, 185, 185},
538                                 {142, 142, 142},
539                                 {107, 107, 107},
540                                 {77, 77, 77},
541                                 {52, 52, 52},
542                                 {30, 30, 30},
543                                 {12, 12, 12},
544                                 {0, 0, 0},
545                         },
546                         {
547                                 {224, 224, 224},
548                                 {173, 173, 173},
549                                 {133, 133, 133},
550                                 {99, 99, 99},
551                                 {70, 70, 70},
552                                 {46, 46, 46},
553                                 {25, 25, 25},
554                                 {7, 7, 7},
555                                 {0, 0, 0},
556                         },
557                 },
558         .sd_brightness = &sd_brightness,
559         .bl_device = &cardhu_backlight_device,
560 };
561
562 #ifndef CONFIG_TEGRA_CARDHU_DSI
563 static struct tegra_fb_data cardhu_fb_data = {
564         .win            = 0,
565         .xres           = 1366,
566         .yres           = 768,
567         .bits_per_pixel = 32,
568         .flags          = TEGRA_FB_FLIP_ON_PROBE,
569 };
570 #endif
571
572 static struct tegra_fb_data cardhu_hdmi_fb_data = {
573         .win            = 0,
574         .xres           = 1366,
575         .yres           = 768,
576         .bits_per_pixel = 32,
577         .flags          = TEGRA_FB_FLIP_ON_PROBE,
578 };
579
580 static struct tegra_dc_out cardhu_disp2_out = {
581         .type           = TEGRA_DC_OUT_HDMI,
582         .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
583
584         .dcc_bus        = 3,
585         .hotplug_gpio   = cardhu_hdmi_hpd,
586
587         .max_pixclock   = KHZ2PICOS(148500),
588
589         .align          = TEGRA_DC_ALIGN_MSB,
590         .order          = TEGRA_DC_ORDER_RED_BLUE,
591
592         .enable         = cardhu_hdmi_enable,
593         .disable        = cardhu_hdmi_disable,
594
595         .postsuspend    = cardhu_hdmi_vddio_disable,
596         .hotplug_init   = cardhu_hdmi_vddio_enable,
597 };
598
599 static struct tegra_dc_platform_data cardhu_disp2_pdata = {
600         .flags          = 0,
601         .default_out    = &cardhu_disp2_out,
602         .fb             = &cardhu_hdmi_fb_data,
603         .emc_clk_rate   = 300000000,
604 };
605
606 #ifdef CONFIG_TEGRA_CARDHU_DSI
607 static int cardhu_dsi_panel_enable(void)
608 {
609         int ret;
610
611         if (cardhu_dsi_reg == NULL) {
612                 cardhu_dsi_reg = regulator_get(NULL, "avdd_dsi_csi");
613                 if (IS_ERR_OR_NULL(cardhu_dsi_reg)) {
614                 pr_err("dsi: Could not get regulator avdd_dsi_csi\n");
615                         cardhu_dsi_reg = NULL;
616                         return PTR_ERR(cardhu_dsi_reg);
617                 }
618         }
619         regulator_enable(cardhu_dsi_reg);
620
621         ret = gpio_request(TEGRA_GPIO_PJ1, "DSI TE");
622         if (ret < 0)
623                 return ret;
624
625         ret = gpio_direction_input(TEGRA_GPIO_PJ1);
626         if (ret < 0) {
627                 gpio_free(TEGRA_GPIO_PJ1);
628                 return ret;
629         }
630         tegra_gpio_enable(TEGRA_GPIO_PJ1);
631
632 #if DSI_PANEL_219
633
634         ret = gpio_request(TEGRA_GPIO_PH0, "ph0");
635         if (ret < 0)
636                 return ret;
637         ret = gpio_direction_output(TEGRA_GPIO_PH0, 0);
638         if (ret < 0) {
639                 gpio_free(TEGRA_GPIO_PH0);
640                 return ret;
641         }
642         else
643                 tegra_gpio_enable(TEGRA_GPIO_PH0);
644
645         ret = gpio_request(TEGRA_GPIO_PH2, "ph2");
646         if (ret < 0)
647                 return ret;
648         ret = gpio_direction_output(TEGRA_GPIO_PH2, 0);
649         if (ret < 0) {
650                 gpio_free(TEGRA_GPIO_PH2);
651                 return ret;
652         }
653         else
654                 tegra_gpio_enable(TEGRA_GPIO_PH2);
655
656         ret = gpio_request(TEGRA_GPIO_PU2, "pu2");
657         if (ret < 0)
658                 return ret;
659         ret = gpio_direction_output(TEGRA_GPIO_PU2, 0);
660         if (ret < 0) {
661                 gpio_free(TEGRA_GPIO_PU2);
662                 return ret;
663         }
664         else
665                 tegra_gpio_enable(TEGRA_GPIO_PU2);
666
667         gpio_set_value(cardhu_lvds_shutdown, 1);
668         mdelay(20);
669         gpio_set_value(TEGRA_GPIO_PH0, 1);
670         mdelay(10);
671         gpio_set_value(TEGRA_GPIO_PH2, 1);
672         mdelay(15);
673         gpio_set_value(TEGRA_GPIO_PU2, 0);
674         gpio_set_value(TEGRA_GPIO_PU2, 1);
675         mdelay(10);
676         gpio_set_value(TEGRA_GPIO_PU2, 0);
677         mdelay(10);
678         gpio_set_value(TEGRA_GPIO_PU2, 1);
679         mdelay(15);
680 #endif
681
682 #if DSI_PANEL_218
683         printk("DSI_PANEL_218 is enabled\n");
684         ret = gpio_request(AVDD_LCD, "avdd_lcd");
685         if(ret < 0)
686                 gpio_free(AVDD_LCD);
687         ret = gpio_direction_output(AVDD_LCD, 1);
688         if(ret < 0)
689                 gpio_free(AVDD_LCD);
690         else
691                 tegra_gpio_enable(AVDD_LCD);
692
693 #if DSI_PANEL_RESET
694         ret = gpio_request(TEGRA_GPIO_PD2, "pd2");
695         if (ret < 0){
696                 return ret;
697         }
698         ret = gpio_direction_output(TEGRA_GPIO_PD2, 0);
699         if (ret < 0) {
700                 gpio_free(TEGRA_GPIO_PD2);
701                 return ret;
702         }
703         else
704                 tegra_gpio_enable(TEGRA_GPIO_PD2);
705
706         gpio_set_value(TEGRA_GPIO_PD2, 1);
707         gpio_set_value(TEGRA_GPIO_PD2, 0);
708         mdelay(2);
709         gpio_set_value(TEGRA_GPIO_PD2, 1);
710         mdelay(2);
711 #endif
712 #endif
713
714         return 0;
715 }
716
717 static int cardhu_dsi_panel_disable(void)
718 {
719         int err;
720
721         err = 0;
722         printk(KERN_INFO "DSI panel disable\n");
723
724 #if DSI_PANEL_219
725         tegra_gpio_disable(TEGRA_GPIO_PU2);
726         gpio_free(TEGRA_GPIO_PU2);
727         tegra_gpio_disable(TEGRA_GPIO_PH2);
728         gpio_free(TEGRA_GPIO_PH2);
729         tegra_gpio_disable(TEGRA_GPIO_PH0);
730         gpio_free(TEGRA_GPIO_PH0);
731         tegra_gpio_disable(TEGRA_GPIO_PL2);
732         gpio_free(TEGRA_GPIO_PL2);
733 #endif
734
735 #if DSI_PANEL_218
736         tegra_gpio_disable(TEGRA_GPIO_PD2);
737         gpio_free(TEGRA_GPIO_PD2);
738 #endif
739
740         return err;
741 }
742
743 static int cardhu_dsi_panel_postsuspend(void)
744 {
745         int err;
746
747         err = 0;
748         printk(KERN_INFO "DSI panel postsuspend\n");
749
750         if (cardhu_dsi_reg) {
751                 err = regulator_disable(cardhu_dsi_reg);
752                 if (err < 0)
753                         printk(KERN_ERR
754                         "DSI regulator avdd_dsi_csi disable failed\n");
755                 regulator_put(cardhu_dsi_reg);
756                 cardhu_dsi_reg = NULL;
757         }
758
759 #if DSI_PANEL_218
760         tegra_gpio_disable(AVDD_LCD);
761         gpio_free(AVDD_LCD);
762 #endif
763
764         return err;
765 }
766
767 static struct tegra_dsi_cmd dsi_init_cmd[]= {
768         DSI_CMD_SHORT(0x05, 0x11, 0x00),
769         DSI_DLY_MS(150),
770         DSI_CMD_SHORT(0x05, 0x29, 0x00),
771         DSI_DLY_MS(20),
772 };
773
774 static struct tegra_dsi_cmd dsi_suspend_cmd[] = {
775         DSI_CMD_SHORT(0x05, 0x28, 0x00),
776         DSI_DLY_MS(20),
777         DSI_CMD_SHORT(0x05, 0x10, 0x00),
778         DSI_DLY_MS(5),
779 };
780
781 struct tegra_dsi_out cardhu_dsi = {
782         .n_data_lanes = 2,
783         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
784         .refresh_rate = 60,
785         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
786
787         .panel_has_frame_buffer = true,
788 #ifdef CONFIG_TEGRA_DSI_INSTANCE_1
789         .dsi_instance = 1,
790 #else
791         .dsi_instance = 0,
792 #endif
793         .panel_reset = DSI_PANEL_RESET,
794
795         .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
796         .dsi_init_cmd = dsi_init_cmd,
797
798         .n_suspend_cmd = ARRAY_SIZE(dsi_suspend_cmd),
799         .dsi_suspend_cmd = dsi_suspend_cmd,
800
801         .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
802         .lp_cmd_mode_freq_khz = 430000,
803 };
804
805 static struct tegra_dc_mode cardhu_dsi_modes[] = {
806 #if DSI_PANEL_219
807         {
808                 .pclk = 10000000,
809                 .h_ref_to_sync = 4,
810                 .v_ref_to_sync = 1,
811                 .h_sync_width = 16,
812                 .v_sync_width = 1,
813                 .h_back_porch = 32,
814                 .v_back_porch = 1,
815                 .h_active = 540,
816                 .v_active = 960,
817                 .h_front_porch = 32,
818                 .v_front_porch = 2,
819         },
820 #endif
821
822 #if DSI_PANEL_218
823         {
824                 .pclk = 323000000,
825                 .h_ref_to_sync = 11,
826                 .v_ref_to_sync = 1,
827                 .h_sync_width = 16,
828                 .v_sync_width = 4,
829                 .h_back_porch = 16,
830                 .v_back_porch = 4,
831                 .h_active = 864,
832                 .v_active = 480,
833                 .h_front_porch = 16,
834                 .v_front_porch = 4,
835         },
836 #endif
837
838 };
839
840
841 static struct tegra_fb_data cardhu_dsi_fb_data = {
842 #if DSI_PANEL_219
843         .win            = 0,
844         .xres           = 540,
845         .yres           = 960,
846         .bits_per_pixel = 32,
847 #endif
848
849 #if DSI_PANEL_218
850         .win            = 0,
851         .xres           = 864,
852         .yres           = 480,
853         .bits_per_pixel = 32,
854 #endif
855         .flags          = TEGRA_FB_FLIP_ON_PROBE,
856 };
857 #endif
858
859 static struct tegra_dc_out cardhu_disp1_out = {
860         .align          = TEGRA_DC_ALIGN_MSB,
861         .order          = TEGRA_DC_ORDER_RED_BLUE,
862         .sd_settings    = &cardhu_sd_settings,
863         .parent_clk     = "pll_p",
864
865 #ifndef CONFIG_TEGRA_CARDHU_DSI
866         .type           = TEGRA_DC_OUT_RGB,
867
868         .modes          = cardhu_panel_modes,
869         .n_modes        = ARRAY_SIZE(cardhu_panel_modes),
870
871         .enable         = cardhu_panel_enable,
872         .disable        = cardhu_panel_disable,
873 #else
874         .type           = TEGRA_DC_OUT_DSI,
875
876         .modes          = cardhu_dsi_modes,
877         .n_modes        = ARRAY_SIZE(cardhu_dsi_modes),
878
879         .dsi            = &cardhu_dsi,
880
881         .enable         = cardhu_dsi_panel_enable,
882         .disable        = cardhu_dsi_panel_disable,
883         .postsuspend    = cardhu_dsi_panel_postsuspend,
884 #endif
885 };
886 static struct tegra_dc_platform_data cardhu_disp1_pdata = {
887         .flags          = TEGRA_DC_FLAG_ENABLED,
888         .default_out    = &cardhu_disp1_out,
889         .emc_clk_rate   = 300000000,
890 #ifndef CONFIG_TEGRA_CARDHU_DSI
891         .fb             = &cardhu_fb_data,
892 #else
893         .fb             = &cardhu_dsi_fb_data,
894 #endif
895 };
896 static struct nvhost_device cardhu_disp1_device = {
897         .name           = "tegradc",
898         .id             = 0,
899         .resource       = cardhu_disp1_resources,
900         .num_resources  = ARRAY_SIZE(cardhu_disp1_resources),
901         .dev = {
902                 .platform_data = &cardhu_disp1_pdata,
903         },
904 };
905
906 static struct nvhost_device cardhu_disp2_device = {
907         .name           = "tegradc",
908         .id             = 1,
909         .resource       = cardhu_disp2_resources,
910         .num_resources  = ARRAY_SIZE(cardhu_disp2_resources),
911         .dev = {
912                 .platform_data = &cardhu_disp2_pdata,
913         },
914 };
915
916 static struct nvmap_platform_carveout cardhu_carveouts[] = {
917         [0] = NVMAP_HEAP_CARVEOUT_IRAM_INIT,
918         [1] = {
919                 .name           = "generic-0",
920                 .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
921                 .base           = 0,    /* Filled in by cardhu_panel_init() */
922                 .size           = 0,    /* Filled in by cardhu_panel_init() */
923                 .buddy_size     = SZ_32K,
924         },
925 };
926
927 static struct nvmap_platform_data cardhu_nvmap_data = {
928         .carveouts      = cardhu_carveouts,
929         .nr_carveouts   = ARRAY_SIZE(cardhu_carveouts),
930 };
931
932 static struct platform_device cardhu_nvmap_device = {
933         .name   = "tegra-nvmap",
934         .id     = -1,
935         .dev    = {
936                 .platform_data = &cardhu_nvmap_data,
937         },
938 };
939
940
941 #if defined(CONFIG_TEGRA_NVAVP)
942 static struct resource tegra_nvavp_resources[] = {
943         [0] = {
944                 .start  = INT_SHR_SEM_INBOX_IBF,
945                 .end    = INT_SHR_SEM_INBOX_IBF,
946                 .flags  = IORESOURCE_IRQ,
947                 .name   = "mbox_from_avp_pending",
948         },
949 };
950
951 static struct nvhost_device cardhu_nvavp_device = {
952         .name           = "tegra-avp",
953         .id             = -1,
954         .resource       = tegra_nvavp_resources,
955         .num_resources  = ARRAY_SIZE(tegra_nvavp_resources),
956 };
957 #endif
958
959 static struct platform_device *cardhu_gfx_devices[] __initdata = {
960         &cardhu_nvmap_device,
961         &tegra_grhost_device,
962         &tegra_pwfm0_device,
963         &cardhu_backlight_device,
964 };
965
966
967 int __init cardhu_panel_init(void)
968 {
969         int err;
970         struct resource *res;
971
972         tegra_get_board_info(&board_info);
973
974         cardhu_carveouts[1].base = tegra_carveout_start;
975         cardhu_carveouts[1].size = tegra_carveout_size;
976
977         if (board_info.board_id == BOARD_E1291 &&
978                 ((board_info.sku & SKU_TOUCHSCREEN_MECH_FIX) == 0)) {
979                 /* use 55Hz panel timings to reduce noise on sensitive touch */
980                 printk("Using cardhu_panel_modes_55hz\n");
981                 cardhu_disp1_out.modes = cardhu_panel_modes_55hz;
982                 cardhu_disp1_out.n_modes = ARRAY_SIZE(cardhu_panel_modes_55hz);
983         }
984
985         if (board_info.board_id == BOARD_PM269) {
986                 gpio_request(pm269_lvds_shutdown, "lvds_shutdown");
987                 gpio_direction_output(pm269_lvds_shutdown, 1);
988                 tegra_gpio_enable(pm269_lvds_shutdown);
989         } else {
990                 gpio_request(cardhu_lvds_shutdown, "lvds_shutdown");
991                 gpio_direction_output(cardhu_lvds_shutdown, 1);
992                 tegra_gpio_enable(cardhu_lvds_shutdown);
993         }
994
995         tegra_gpio_enable(cardhu_hdmi_hpd);
996         gpio_request(cardhu_hdmi_hpd, "hdmi_hpd");
997         gpio_direction_input(cardhu_hdmi_hpd);
998         err = platform_add_devices(cardhu_gfx_devices,
999                                 ARRAY_SIZE(cardhu_gfx_devices));
1000
1001         res = nvhost_get_resource_byname(&cardhu_disp1_device,
1002                                          IORESOURCE_MEM, "fbmem");
1003         res->start = tegra_fb_start;
1004         res->end = tegra_fb_start + tegra_fb_size - 1;
1005
1006         /* Copy the bootloader fb to the fb. */
1007         tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start,
1008                                 min(tegra_fb_size, tegra_bootloader_fb_size));
1009
1010         if (!err)
1011                 err = nvhost_device_register(&cardhu_disp1_device);
1012
1013         res = nvhost_get_resource_byname(&cardhu_disp2_device,
1014                                          IORESOURCE_MEM, "fbmem");
1015         res->start = tegra_fb2_start;
1016         res->end = tegra_fb2_start + tegra_fb2_size - 1;
1017         if (!err)
1018                 err = nvhost_device_register(&cardhu_disp2_device);
1019
1020 #if defined(CONFIG_TEGRA_NVAVP)
1021         if (!err)
1022                 err = nvhost_device_register(&cardhu_nvavp_device);
1023 #endif
1024         return err;
1025 }