Ventana: KBC: Removing the KBC usage on ventana
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-memory.c
1 /*
2  * Copyright (C) 2011 NVIDIA, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program; if not, write to the Free Software
15  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
16  * 02111-1307, USA
17  */
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21
22 #include "board.h"
23 #include "board-cardhu.h"
24 #include "tegra3_emc.h"
25 #include "fuse.h"
26
27
28 static const struct tegra_emc_table cardhu_emc_tables_h5tc2g[] = {
29         {
30                 0x30,           /* Rev 3.0 */
31                 27000,          /* SDRAM frquency */
32                 {
33                         0x00000001,   /* EMC_RC */
34                         0x00000004,   /* EMC_RFC */
35                         0x00000000,   /* EMC_RAS */
36                         0x00000000,   /* EMC_RP */
37                         0x00000002,   /* EMC_R2W */
38                         0x0000000a,   /* EMC_W2R */
39                         0x00000003,   /* EMC_R2P */
40                         0x0000000b,   /* EMC_W2P */
41                         0x00000000,   /* EMC_RD_RCD */
42                         0x00000000,   /* EMC_WR_RCD */
43                         0x00000003,   /* EMC_RRD */
44                         0x00000001,   /* EMC_REXT */
45                         0x00000000,   /* EMC_WEXT */
46                         0x00000005,   /* EMC_WDV */
47                         0x00000005,   /* EMC_QUSE */
48                         0x00000004,   /* EMC_QRST */
49                         0x00000007,   /* EMC_QSAFE */
50                         0x0000000d,   /* EMC_RDV */
51                         0x000000cb,   /* EMC_REFRESH */
52                         0x00000000,   /* EMC_BURST_REFRESH_NUM */
53                         0x00000032,   /* EMC_PRE_REFRESH_REQ_CNT */
54                         0x00000002,   /* EMC_PDEX2WR */
55                         0x00000002,   /* EMC_PDEX2RD */
56                         0x00000001,   /* EMC_PCHG2PDEN */
57                         0x00000000,   /* EMC_ACT2PDEN */
58                         0x00000007,   /* EMC_AR2PDEN */
59                         0x0000000f,   /* EMC_RW2PDEN */
60                         0x00000005,   /* EMC_TXSR */
61                         0x00000005,   /* EMC_TXSRDLL */
62                         0x00000004,   /* EMC_TCKE */
63                         0x00000001,   /* EMC_TFAW */
64                         0x00000000,   /* EMC_TRPAB */
65                         0x00000004,   /* EMC_TCLKSTABLE */
66                         0x00000005,   /* EMC_TCLKSTOP */
67                         0x000000d3,   /* EMC_TREFBW */
68                         0x00000000,   /* EMC_QUSE_EXTRA */
69                         0x00000004,   /* EMC_FBIO_CFG6 */
70                         0x00000000,   /* EMC_ODT_WRITE */
71                         0x00000000,   /* EMC_ODT_READ */
72                         0x00006288,   /* EMC_FBIO_CFG5 */
73                         0xd0780421,   /* EMC_CFG_DIG_DLL */
74                         0x00008000,   /* EMC_CFG_DIG_DLL_PERIOD */
75                         0x00080000,   /* EMC_DLL_XFORM_DQS0 */
76                         0x00080000,   /* EMC_DLL_XFORM_DQS1 */
77                         0x00080000,   /* EMC_DLL_XFORM_DQS2 */
78                         0x00080000,   /* EMC_DLL_XFORM_DQS3 */
79                         0x00080000,   /* EMC_DLL_XFORM_DQS4 */
80                         0x00080000,   /* EMC_DLL_XFORM_DQS5 */
81                         0x00080000,   /* EMC_DLL_XFORM_DQS6 */
82                         0x00080000,   /* EMC_DLL_XFORM_DQS7 */
83                         0x00000000,   /* EMC_DLL_XFORM_QUSE0 */
84                         0x00000000,   /* EMC_DLL_XFORM_QUSE1 */
85                         0x00000000,   /* EMC_DLL_XFORM_QUSE2 */
86                         0x00000000,   /* EMC_DLL_XFORM_QUSE3 */
87                         0x00000000,   /* EMC_DLL_XFORM_QUSE4 */
88                         0x00000000,   /* EMC_DLL_XFORM_QUSE5 */
89                         0x00000000,   /* EMC_DLL_XFORM_QUSE6 */
90                         0x00000000,   /* EMC_DLL_XFORM_QUSE7 */
91                         0x00000000,   /* EMC_DLI_TRIM_TXDQS0 */
92                         0x00000000,   /* EMC_DLI_TRIM_TXDQS1 */
93                         0x00000000,   /* EMC_DLI_TRIM_TXDQS2 */
94                         0x00000000,   /* EMC_DLI_TRIM_TXDQS3 */
95                         0x00000000,   /* EMC_DLI_TRIM_TXDQS4 */
96                         0x00000000,   /* EMC_DLI_TRIM_TXDQS5 */
97                         0x00000000,   /* EMC_DLI_TRIM_TXDQS6 */
98                         0x00000000,   /* EMC_DLI_TRIM_TXDQS7 */
99                         0x00080000,   /* EMC_DLL_XFORM_DQ0 */
100                         0x00080000,   /* EMC_DLL_XFORM_DQ1 */
101                         0x00080000,   /* EMC_DLL_XFORM_DQ2 */
102                         0x00080000,   /* EMC_DLL_XFORM_DQ3 */
103                         0x000003e0,   /* EMC_XM2CMDPADCTRL */
104                         0x0800211d,   /* EMC_XM2DQSPADCTRL2 */
105                         0x00000000,   /* EMC_XM2DQPADCTRL2 */
106                         0x77ffc084,   /* EMC_XM2CLKPADCTRL */
107                         0x01f1f108,   /* EMC_XM2COMPPADCTRL */
108                         0x07075504,   /* EMC_XM2VTTGENPADCTRL */
109                         0x00000007,   /* EMC_XM2VTTGENPADCTRL2 */
110                         0x0800012d,   /* EMC_XM2QUSEPADCTRL */
111                         0x08000000,   /* EMC_XM2DQSPADCTRL3 */
112                         0x00000802,   /* EMC_CTT_TERM_CTRL */
113                         0x00000000,   /* EMC_ZCAL_INTERVAL */
114                         0x00000040,   /* EMC_ZCAL_WAIT_CNT */
115                         0x000c000c,   /* EMC_MRS_WAIT_CNT */
116                         0xa0f10000,   /* EMC_AUTO_CAL_CONFIG */
117                         0x00000000,   /* EMC_CTT */
118                         0x00000000,   /* EMC_CTT_DURATION */
119                         0x8000029e,   /* EMC_DYN_SELF_REF_CONTROL */
120                         0x00000001,   /* MC_EMEM_ARB_CFG */
121                         0x8000000d,   /* MC_EMEM_ARB_OUTSTANDING_REQ */
122                         0x00000001,   /* MC_EMEM_ARB_TIMING_RCD */
123                         0x00000004,   /* MC_EMEM_ARB_TIMING_RP */
124                         0x00000005,   /* MC_EMEM_ARB_TIMING_RC */
125                         0x00000001,   /* MC_EMEM_ARB_TIMING_RAS */
126                         0x00000001,   /* MC_EMEM_ARB_TIMING_FAW */
127                         0x00000003,   /* MC_EMEM_ARB_TIMING_RRD */
128                         0x00000004,   /* MC_EMEM_ARB_TIMING_RAP2PRE */
129                         0x0000000f,   /* MC_EMEM_ARB_TIMING_WAP2PRE */
130                         0x00000006,   /* MC_EMEM_ARB_TIMING_R2R */
131                         0x00000005,   /* MC_EMEM_ARB_TIMING_W2W */
132                         0x00000007,   /* MC_EMEM_ARB_TIMING_R2W */
133                         0x0000000f,   /* MC_EMEM_ARB_TIMING_W2R */
134                         0x0f070506,   /* MC_EMEM_ARB_DA_TURNS */
135                         0x00140905,   /* MC_EMEM_ARB_DA_COVERS */
136                         0x78430306,   /* MC_EMEM_ARB_MISC0 */
137                         0x001f0001,   /* MC_EMEM_ARB_RING1_THROTTLE */
138                 },
139                 0x00000040,     /* EMC_ZCAL_WAIT_CNT after clock change */
140                 0x001fffff,     /* EMC_AUTO_CAL_INTERVAL */
141                 0x00000000,     /* EMC_CFG.PERIODIC_QRST */
142                 0x00001221,     /* Mode Register 0 */
143                 0x00100003,     /* Mode Register 1 */
144                 0x00200008,     /* Mode Register 2 */
145         },
146         {
147                 0x30,           /* Rev 3.0 */
148                 54000,          /* SDRAM frquency */
149                 {
150                         0x00000002,   /* EMC_RC */
151                         0x00000008,   /* EMC_RFC */
152                         0x00000001,   /* EMC_RAS */
153                         0x00000000,   /* EMC_RP */
154                         0x00000002,   /* EMC_R2W */
155                         0x0000000a,   /* EMC_W2R */
156                         0x00000003,   /* EMC_R2P */
157                         0x0000000b,   /* EMC_W2P */
158                         0x00000000,   /* EMC_RD_RCD */
159                         0x00000000,   /* EMC_WR_RCD */
160                         0x00000003,   /* EMC_RRD */
161                         0x00000001,   /* EMC_REXT */
162                         0x00000000,   /* EMC_WEXT */
163                         0x00000005,   /* EMC_WDV */
164                         0x00000005,   /* EMC_QUSE */
165                         0x00000004,   /* EMC_QRST */
166                         0x00000007,   /* EMC_QSAFE */
167                         0x0000000d,   /* EMC_RDV */
168                         0x00000198,   /* EMC_REFRESH */
169                         0x00000000,   /* EMC_BURST_REFRESH_NUM */
170                         0x00000066,   /* EMC_PRE_REFRESH_REQ_CNT */
171                         0x00000002,   /* EMC_PDEX2WR */
172                         0x00000002,   /* EMC_PDEX2RD */
173                         0x00000001,   /* EMC_PCHG2PDEN */
174                         0x00000000,   /* EMC_ACT2PDEN */
175                         0x00000007,   /* EMC_AR2PDEN */
176                         0x0000000f,   /* EMC_RW2PDEN */
177                         0x0000000a,   /* EMC_TXSR */
178                         0x0000000a,   /* EMC_TXSRDLL */
179                         0x00000004,   /* EMC_TCKE */
180                         0x00000002,   /* EMC_TFAW */
181                         0x00000000,   /* EMC_TRPAB */
182                         0x00000004,   /* EMC_TCLKSTABLE */
183                         0x00000005,   /* EMC_TCLKSTOP */
184                         0x000001a6,   /* EMC_TREFBW */
185                         0x00000000,   /* EMC_QUSE_EXTRA */
186                         0x00000004,   /* EMC_FBIO_CFG6 */
187                         0x00000000,   /* EMC_ODT_WRITE */
188                         0x00000000,   /* EMC_ODT_READ */
189                         0x00006288,   /* EMC_FBIO_CFG5 */
190                         0xd0780421,   /* EMC_CFG_DIG_DLL */
191                         0x00008000,   /* EMC_CFG_DIG_DLL_PERIOD */
192                         0x00080000,   /* EMC_DLL_XFORM_DQS0 */
193                         0x00080000,   /* EMC_DLL_XFORM_DQS1 */
194                         0x00080000,   /* EMC_DLL_XFORM_DQS2 */
195                         0x00080000,   /* EMC_DLL_XFORM_DQS3 */
196                         0x00080000,   /* EMC_DLL_XFORM_DQS4 */
197                         0x00080000,   /* EMC_DLL_XFORM_DQS5 */
198                         0x00080000,   /* EMC_DLL_XFORM_DQS6 */
199                         0x00080000,   /* EMC_DLL_XFORM_DQS7 */
200                         0x00000000,   /* EMC_DLL_XFORM_QUSE0 */
201                         0x00000000,   /* EMC_DLL_XFORM_QUSE1 */
202                         0x00000000,   /* EMC_DLL_XFORM_QUSE2 */
203                         0x00000000,   /* EMC_DLL_XFORM_QUSE3 */
204                         0x00000000,   /* EMC_DLL_XFORM_QUSE4 */
205                         0x00000000,   /* EMC_DLL_XFORM_QUSE5 */
206                         0x00000000,   /* EMC_DLL_XFORM_QUSE6 */
207                         0x00000000,   /* EMC_DLL_XFORM_QUSE7 */
208                         0x00000000,   /* EMC_DLI_TRIM_TXDQS0 */
209                         0x00000000,   /* EMC_DLI_TRIM_TXDQS1 */
210                         0x00000000,   /* EMC_DLI_TRIM_TXDQS2 */
211                         0x00000000,   /* EMC_DLI_TRIM_TXDQS3 */
212                         0x00000000,   /* EMC_DLI_TRIM_TXDQS4 */
213                         0x00000000,   /* EMC_DLI_TRIM_TXDQS5 */
214                         0x00000000,   /* EMC_DLI_TRIM_TXDQS6 */
215                         0x00000000,   /* EMC_DLI_TRIM_TXDQS7 */
216                         0x00080000,   /* EMC_DLL_XFORM_DQ0 */
217                         0x00080000,   /* EMC_DLL_XFORM_DQ1 */
218                         0x00080000,   /* EMC_DLL_XFORM_DQ2 */
219                         0x00080000,   /* EMC_DLL_XFORM_DQ3 */
220                         0x000003e0,   /* EMC_XM2CMDPADCTRL */
221                         0x0800211d,   /* EMC_XM2DQSPADCTRL2 */
222                         0x00000000,   /* EMC_XM2DQPADCTRL2 */
223                         0x77ffc084,   /* EMC_XM2CLKPADCTRL */
224                         0x01f1f108,   /* EMC_XM2COMPPADCTRL */
225                         0x07075504,   /* EMC_XM2VTTGENPADCTRL */
226                         0x00000007,   /* EMC_XM2VTTGENPADCTRL2 */
227                         0x0800012d,   /* EMC_XM2QUSEPADCTRL */
228                         0x08000000,   /* EMC_XM2DQSPADCTRL3 */
229                         0x00000802,   /* EMC_CTT_TERM_CTRL */
230                         0x00000000,   /* EMC_ZCAL_INTERVAL */
231                         0x00000040,   /* EMC_ZCAL_WAIT_CNT */
232                         0x000c000c,   /* EMC_MRS_WAIT_CNT */
233                         0xa0f10000,   /* EMC_AUTO_CAL_CONFIG */
234                         0x00000000,   /* EMC_CTT */
235                         0x00000000,   /* EMC_CTT_DURATION */
236                         0x80000439,   /* EMC_DYN_SELF_REF_CONTROL */
237                         0x00000001,   /* MC_EMEM_ARB_CFG */
238                         0x80000014,   /* MC_EMEM_ARB_OUTSTANDING_REQ */
239                         0x00000001,   /* MC_EMEM_ARB_TIMING_RCD */
240                         0x00000004,   /* MC_EMEM_ARB_TIMING_RP */
241                         0x00000005,   /* MC_EMEM_ARB_TIMING_RC */
242                         0x00000001,   /* MC_EMEM_ARB_TIMING_RAS */
243                         0x00000001,   /* MC_EMEM_ARB_TIMING_FAW */
244                         0x00000003,   /* MC_EMEM_ARB_TIMING_RRD */
245                         0x00000004,   /* MC_EMEM_ARB_TIMING_RAP2PRE */
246                         0x0000000f,   /* MC_EMEM_ARB_TIMING_WAP2PRE */
247                         0x00000006,   /* MC_EMEM_ARB_TIMING_R2R */
248                         0x00000005,   /* MC_EMEM_ARB_TIMING_W2W */
249                         0x00000007,   /* MC_EMEM_ARB_TIMING_R2W */
250                         0x0000000f,   /* MC_EMEM_ARB_TIMING_W2R */
251                         0x0f070506,   /* MC_EMEM_ARB_DA_TURNS */
252                         0x00140905,   /* MC_EMEM_ARB_DA_COVERS */
253                         0x78430506,   /* MC_EMEM_ARB_MISC0 */
254                         0x001f0001,   /* MC_EMEM_ARB_RING1_THROTTLE */
255                 },
256                 0x00000040,     /* EMC_ZCAL_WAIT_CNT after clock change */
257                 0x001fffff,     /* EMC_AUTO_CAL_INTERVAL */
258                 0x00000000,     /* EMC_CFG.PERIODIC_QRST */
259                 0x00001221,     /* Mode Register 0 */
260                 0x00100003,     /* Mode Register 1 */
261                 0x00200008,     /* Mode Register 2 */
262         },
263         {
264                 0x30,           /* Rev 3.0 */
265                 108000,         /* SDRAM frquency */
266                 {
267                         0x00000005,   /* EMC_RC */
268                         0x00000011,   /* EMC_RFC */
269                         0x00000003,   /* EMC_RAS */
270                         0x00000001,   /* EMC_RP */
271                         0x00000002,   /* EMC_R2W */
272                         0x0000000a,   /* EMC_W2R */
273                         0x00000003,   /* EMC_R2P */
274                         0x0000000b,   /* EMC_W2P */
275                         0x00000001,   /* EMC_RD_RCD */
276                         0x00000001,   /* EMC_WR_RCD */
277                         0x00000003,   /* EMC_RRD */
278                         0x00000001,   /* EMC_REXT */
279                         0x00000000,   /* EMC_WEXT */
280                         0x00000005,   /* EMC_WDV */
281                         0x00000005,   /* EMC_QUSE */
282                         0x00000004,   /* EMC_QRST */
283                         0x00000007,   /* EMC_QSAFE */
284                         0x0000000d,   /* EMC_RDV */
285                         0x00000330,   /* EMC_REFRESH */
286                         0x00000000,   /* EMC_BURST_REFRESH_NUM */
287                         0x000000cc,   /* EMC_PRE_REFRESH_REQ_CNT */
288                         0x00000002,   /* EMC_PDEX2WR */
289                         0x00000002,   /* EMC_PDEX2RD */
290                         0x00000001,   /* EMC_PCHG2PDEN */
291                         0x00000000,   /* EMC_ACT2PDEN */
292                         0x00000007,   /* EMC_AR2PDEN */
293                         0x0000000f,   /* EMC_RW2PDEN */
294                         0x00000013,   /* EMC_TXSR */
295                         0x00000013,   /* EMC_TXSRDLL */
296                         0x00000004,   /* EMC_TCKE */
297                         0x00000004,   /* EMC_TFAW */
298                         0x00000000,   /* EMC_TRPAB */
299                         0x00000004,   /* EMC_TCLKSTABLE */
300                         0x00000005,   /* EMC_TCLKSTOP */
301                         0x0000034b,   /* EMC_TREFBW */
302                         0x00000000,   /* EMC_QUSE_EXTRA */
303                         0x00000004,   /* EMC_FBIO_CFG6 */
304                         0x00000000,   /* EMC_ODT_WRITE */
305                         0x00000000,   /* EMC_ODT_READ */
306                         0x00006288,   /* EMC_FBIO_CFG5 */
307                         0xd0780421,   /* EMC_CFG_DIG_DLL */
308                         0x00008000,   /* EMC_CFG_DIG_DLL_PERIOD */
309                         0x00080000,   /* EMC_DLL_XFORM_DQS0 */
310                         0x00080000,   /* EMC_DLL_XFORM_DQS1 */
311                         0x00080000,   /* EMC_DLL_XFORM_DQS2 */
312                         0x00080000,   /* EMC_DLL_XFORM_DQS3 */
313                         0x00080000,   /* EMC_DLL_XFORM_DQS4 */
314                         0x00080000,   /* EMC_DLL_XFORM_DQS5 */
315                         0x00080000,   /* EMC_DLL_XFORM_DQS6 */
316                         0x00080000,   /* EMC_DLL_XFORM_DQS7 */
317                         0x00000000,   /* EMC_DLL_XFORM_QUSE0 */
318                         0x00000000,   /* EMC_DLL_XFORM_QUSE1 */
319                         0x00000000,   /* EMC_DLL_XFORM_QUSE2 */
320                         0x00000000,   /* EMC_DLL_XFORM_QUSE3 */
321                         0x00000000,   /* EMC_DLL_XFORM_QUSE4 */
322                         0x00000000,   /* EMC_DLL_XFORM_QUSE5 */
323                         0x00000000,   /* EMC_DLL_XFORM_QUSE6 */
324                         0x00000000,   /* EMC_DLL_XFORM_QUSE7 */
325                         0x00000000,   /* EMC_DLI_TRIM_TXDQS0 */
326                         0x00000000,   /* EMC_DLI_TRIM_TXDQS1 */
327                         0x00000000,   /* EMC_DLI_TRIM_TXDQS2 */
328                         0x00000000,   /* EMC_DLI_TRIM_TXDQS3 */
329                         0x00000000,   /* EMC_DLI_TRIM_TXDQS4 */
330                         0x00000000,   /* EMC_DLI_TRIM_TXDQS5 */
331                         0x00000000,   /* EMC_DLI_TRIM_TXDQS6 */
332                         0x00000000,   /* EMC_DLI_TRIM_TXDQS7 */
333                         0x00080000,   /* EMC_DLL_XFORM_DQ0 */
334                         0x00080000,   /* EMC_DLL_XFORM_DQ1 */
335                         0x00080000,   /* EMC_DLL_XFORM_DQ2 */
336                         0x00080000,   /* EMC_DLL_XFORM_DQ3 */
337                         0x000003e0,   /* EMC_XM2CMDPADCTRL */
338                         0x0800211d,   /* EMC_XM2DQSPADCTRL2 */
339                         0x00000000,   /* EMC_XM2DQPADCTRL2 */
340                         0x77ffc084,   /* EMC_XM2CLKPADCTRL */
341                         0x01f1f108,   /* EMC_XM2COMPPADCTRL */
342                         0x07075504,   /* EMC_XM2VTTGENPADCTRL */
343                         0x00000007,   /* EMC_XM2VTTGENPADCTRL2 */
344                         0x0800012d,   /* EMC_XM2QUSEPADCTRL */
345                         0x08000000,   /* EMC_XM2DQSPADCTRL3 */
346                         0x00000802,   /* EMC_CTT_TERM_CTRL */
347                         0x00000000,   /* EMC_ZCAL_INTERVAL */
348                         0x00000040,   /* EMC_ZCAL_WAIT_CNT */
349                         0x000c000c,   /* EMC_MRS_WAIT_CNT */
350                         0xa0f10000,   /* EMC_AUTO_CAL_CONFIG */
351                         0x00000000,   /* EMC_CTT */
352                         0x00000000,   /* EMC_CTT_DURATION */
353                         0x8000076e,   /* EMC_DYN_SELF_REF_CONTROL */
354                         0x00000003,   /* MC_EMEM_ARB_CFG */
355                         0x80000027,   /* MC_EMEM_ARB_OUTSTANDING_REQ */
356                         0x00000001,   /* MC_EMEM_ARB_TIMING_RCD */
357                         0x00000004,   /* MC_EMEM_ARB_TIMING_RP */
358                         0x00000006,   /* MC_EMEM_ARB_TIMING_RC */
359                         0x00000002,   /* MC_EMEM_ARB_TIMING_RAS */
360                         0x00000003,   /* MC_EMEM_ARB_TIMING_FAW */
361                         0x00000003,   /* MC_EMEM_ARB_TIMING_RRD */
362                         0x00000004,   /* MC_EMEM_ARB_TIMING_RAP2PRE */
363                         0x0000000f,   /* MC_EMEM_ARB_TIMING_WAP2PRE */
364                         0x00000006,   /* MC_EMEM_ARB_TIMING_R2R */
365                         0x00000005,   /* MC_EMEM_ARB_TIMING_W2W */
366                         0x00000007,   /* MC_EMEM_ARB_TIMING_R2W */
367                         0x0000000f,   /* MC_EMEM_ARB_TIMING_W2R */
368                         0x0f070506,   /* MC_EMEM_ARB_DA_TURNS */
369                         0x00140906,   /* MC_EMEM_ARB_DA_COVERS */
370                         0x78440a07,   /* MC_EMEM_ARB_MISC0 */
371                         0x001f0001,   /* MC_EMEM_ARB_RING1_THROTTLE */
372                 },
373                 0x00000040,     /* EMC_ZCAL_WAIT_CNT after clock change */
374                 0x001fffff,     /* EMC_AUTO_CAL_INTERVAL */
375                 0x00000000,     /* EMC_CFG.PERIODIC_QRST */
376                 0x00001221,     /* Mode Register 0 */
377                 0x00100003,     /* Mode Register 1 */
378                 0x00200008,     /* Mode Register 2 */
379         },
380         {
381                 0x30,           /* Rev 3.0 */
382                 416000,         /* SDRAM frequency */
383                 {
384                         0x00000013,   /* EMC_RC */
385                         0x00000041,   /* EMC_RFC */
386                         0x0000000d,   /* EMC_RAS */
387                         0x00000004,   /* EMC_RP */
388                         0x00000002,   /* EMC_R2W */
389                         0x00000009,   /* EMC_W2R */
390                         0x00000002,   /* EMC_R2P */
391                         0x0000000c,   /* EMC_W2P */
392                         0x00000004,   /* EMC_RD_RCD */
393                         0x00000004,   /* EMC_WR_RCD */
394                         0x00000002,   /* EMC_RRD */
395                         0x00000001,   /* EMC_REXT */
396                         0x00000000,   /* EMC_WEXT */
397                         0x00000005,   /* EMC_WDV */
398                         0x00000008,   /* EMC_QUSE */
399                         0x00000006,   /* EMC_QRST */
400                         0x00000008,   /* EMC_QSAFE */
401                         0x00000010,   /* EMC_RDV */
402                         0x00000c6c,   /* EMC_REFRESH */
403                         0x00000000,   /* EMC_BURST_REFRESH_NUM */
404                         0x0000031b,   /* EMC_PRE_REFRESH_REQ_CNT */
405                         0x00000001,   /* EMC_PDEX2WR */
406                         0x00000001,   /* EMC_PDEX2RD */
407                         0x00000001,   /* EMC_PCHG2PDEN */
408                         0x00000000,   /* EMC_ACT2PDEN */
409                         0x00000008,   /* EMC_AR2PDEN */
410                         0x00000011,   /* EMC_RW2PDEN */
411                         0x00000047,   /* EMC_TXSR */
412                         0x00000200,   /* EMC_TXSRDLL */
413                         0x00000004,   /* EMC_TCKE */
414                         0x0000000d,   /* EMC_TFAW */
415                         0x00000000,   /* EMC_TRPAB */
416                         0x00000004,   /* EMC_TCLKSTABLE */
417                         0x00000005,   /* EMC_TCLKSTOP */
418                         0x00000cad,   /* EMC_TREFBW */
419                         0x00000000,   /* EMC_QUSE_EXTRA */
420                         0x00000006,   /* EMC_FBIO_CFG6 */
421                         0x00000000,   /* EMC_ODT_WRITE */
422                         0x00000000,   /* EMC_ODT_READ */
423                         0x00007088,   /* EMC_FBIO_CFG5 */
424                         0xf0120441,   /* EMC_CFG_DIG_DLL */
425                         0x00008000,   /* EMC_CFG_DIG_DLL_PERIOD */
426                         0x00010000,   /* EMC_DLL_XFORM_DQS0 */
427                         0x00010000,   /* EMC_DLL_XFORM_DQS1 */
428                         0x00010000,   /* EMC_DLL_XFORM_DQS2 */
429                         0x00010000,   /* EMC_DLL_XFORM_DQS3 */
430                         0x00010000,   /* EMC_DLL_XFORM_DQS4 */
431                         0x00010000,   /* EMC_DLL_XFORM_DQS5 */
432                         0x00010000,   /* EMC_DLL_XFORM_DQS6 */
433                         0x00010000,   /* EMC_DLL_XFORM_DQS7 */
434                         0x00000000,   /* EMC_DLL_XFORM_QUSE0 */
435                         0x00000000,   /* EMC_DLL_XFORM_QUSE1 */
436                         0x00000000,   /* EMC_DLL_XFORM_QUSE2 */
437                         0x00000000,   /* EMC_DLL_XFORM_QUSE3 */
438                         0x00000000,   /* EMC_DLL_XFORM_QUSE4 */
439                         0x00000000,   /* EMC_DLL_XFORM_QUSE5 */
440                         0x00000000,   /* EMC_DLL_XFORM_QUSE6 */
441                         0x00000000,   /* EMC_DLL_XFORM_QUSE7 */
442                         0x00000000,   /* EMC_DLI_TRIM_TXDQS0 */
443                         0x00000000,   /* EMC_DLI_TRIM_TXDQS1 */
444                         0x00000000,   /* EMC_DLI_TRIM_TXDQS2 */
445                         0x00000000,   /* EMC_DLI_TRIM_TXDQS3 */
446                         0x00000000,   /* EMC_DLI_TRIM_TXDQS4 */
447                         0x00000000,   /* EMC_DLI_TRIM_TXDQS5 */
448                         0x00000000,   /* EMC_DLI_TRIM_TXDQS6 */
449                         0x00000000,   /* EMC_DLI_TRIM_TXDQS7 */
450                         0x00020000,   /* EMC_DLL_XFORM_DQ0 */
451                         0x00020000,   /* EMC_DLL_XFORM_DQ1 */
452                         0x00020000,   /* EMC_DLL_XFORM_DQ2 */
453                         0x00020000,   /* EMC_DLL_XFORM_DQ3 */
454                         0x000006a0,   /* EMC_XM2CMDPADCTRL */
455                         0x0800013d,   /* EMC_XM2DQSPADCTRL2 */
456                         0x00000000,   /* EMC_XM2DQPADCTRL2 */
457                         0x77ffc084,   /* EMC_XM2CLKPADCTRL */
458                         0x01f1f50f,   /* EMC_XM2COMPPADCTRL */
459                         0x07077404,   /* EMC_XM2VTTGENPADCTRL */
460                         0x00000007,   /* EMC_XM2VTTGENPADCTRL2 */
461                         0x0800011d,   /* EMC_XM2QUSEPADCTRL */
462                         0x08000021,   /* EMC_XM2DQSPADCTRL3 */
463                         0x00000802,   /* EMC_CTT_TERM_CTRL */
464                         0x00000000,   /* EMC_ZCAL_INTERVAL */
465                         0x00000040,   /* EMC_ZCAL_WAIT_CNT */
466                         0x01be000c,   /* EMC_MRS_WAIT_CNT */
467                         0xa0f10404,   /* EMC_AUTO_CAL_CONFIG */
468                         0x00000000,   /* EMC_CTT */
469                         0x00000000,   /* EMC_CTT_DURATION */
470                         0x000020ae,   /* EMC_DYN_SELF_REF_CONTROL */
471                         0x00000006,   /* MC_EMEM_ARB_CFG */
472                         0x8000004b,   /* MC_EMEM_ARB_OUTSTANDING_REQ */
473                         0x00000001,   /* MC_EMEM_ARB_TIMING_RCD */
474                         0x00000002,   /* MC_EMEM_ARB_TIMING_RP */
475                         0x0000000a,   /* MC_EMEM_ARB_TIMING_RC */
476                         0x00000006,   /* MC_EMEM_ARB_TIMING_RAS */
477                         0x00000006,   /* MC_EMEM_ARB_TIMING_FAW */
478                         0x00000001,   /* MC_EMEM_ARB_TIMING_RRD */
479                         0x00000002,   /* MC_EMEM_ARB_TIMING_RAP2PRE */
480                         0x00000009,   /* MC_EMEM_ARB_TIMING_WAP2PRE */
481                         0x00000002,   /* MC_EMEM_ARB_TIMING_R2R */
482                         0x00000002,   /* MC_EMEM_ARB_TIMING_W2W */
483                         0x00000003,   /* MC_EMEM_ARB_TIMING_R2W */
484                         0x00000006,   /* MC_EMEM_ARB_TIMING_W2R */
485                         0x06030202,   /* MC_EMEM_ARB_DA_TURNS */
486                         0x000e070a,   /* MC_EMEM_ARB_DA_COVERS */
487                         0x7027130b,   /* MC_EMEM_ARB_MISC0 */
488                         0x001f0000,   /* MC_EMEM_ARB_RING1_THROTTLE */
489                 },
490                 0x00000040,     /* EMC_ZCAL_WAIT_CNT after clock change */
491                 0x00000010,     /* EMC_AUTO_CAL_INTERVAL */
492                 0x00000000,     /* EMC_CFG.PERIODIC_QRST */
493                 0x00001941,     /* Mode Register 0 */
494                 0x00100002,     /* Mode Register 1 */
495                 0x00200008,     /* Mode Register 2 */
496         },
497         {
498                 0x30,           /* Rev 3.0 */
499                 533000,         /* SDRAM frquency */
500                 {
501                         0x00000018,   /* EMC_RC */
502                         0x00000054,   /* EMC_RFC */
503                         0x00000011,   /* EMC_RAS */
504                         0x00000006,   /* EMC_RP */
505                         0x00000003,   /* EMC_R2W */
506                         0x00000009,   /* EMC_W2R */
507                         0x00000002,   /* EMC_R2P */
508                         0x0000000d,   /* EMC_W2P */
509                         0x00000006,   /* EMC_RD_RCD */
510                         0x00000006,   /* EMC_WR_RCD */
511                         0x00000002,   /* EMC_RRD */
512                         0x00000001,   /* EMC_REXT */
513                         0x00000000,   /* EMC_WEXT */
514                         0x00000005,   /* EMC_WDV */
515                         0x00000008,   /* EMC_QUSE */
516                         0x00000006,   /* EMC_QRST */
517                         0x00000008,   /* EMC_QSAFE */
518                         0x00000010,   /* EMC_RDV */
519                         0x00000ffd,   /* EMC_REFRESH */
520                         0x00000000,   /* EMC_BURST_REFRESH_NUM */
521                         0x000003ff,   /* EMC_PRE_REFRESH_REQ_CNT */
522                         0x00000002,   /* EMC_PDEX2WR */
523                         0x00000002,   /* EMC_PDEX2RD */
524                         0x00000001,   /* EMC_PCHG2PDEN */
525                         0x00000000,   /* EMC_ACT2PDEN */
526                         0x0000000a,   /* EMC_AR2PDEN */
527                         0x00000012,   /* EMC_RW2PDEN */
528                         0x0000005b,   /* EMC_TXSR */
529                         0x00000200,   /* EMC_TXSRDLL */
530                         0x00000004,   /* EMC_TCKE */
531                         0x00000010,   /* EMC_TFAW */
532                         0x00000000,   /* EMC_TRPAB */
533                         0x00000005,   /* EMC_TCLKSTABLE */
534                         0x00000006,   /* EMC_TCLKSTOP */
535                         0x0000103e,   /* EMC_TREFBW */
536                         0x00000000,   /* EMC_QUSE_EXTRA */
537                         0x00000006,   /* EMC_FBIO_CFG6 */
538                         0x00000000,   /* EMC_ODT_WRITE */
539                         0x00000000,   /* EMC_ODT_READ */
540                         0x00007088,   /* EMC_FBIO_CFG5 */
541                         0xf0120441,   /* EMC_CFG_DIG_DLL */
542                         0x00008000,   /* EMC_CFG_DIG_DLL_PERIOD */
543                         0x00010000,   /* EMC_DLL_XFORM_DQS0 */
544                         0x00010000,   /* EMC_DLL_XFORM_DQS1 */
545                         0x00010000,   /* EMC_DLL_XFORM_DQS2 */
546                         0x00010000,   /* EMC_DLL_XFORM_DQS3 */
547                         0x00010000,   /* EMC_DLL_XFORM_DQS4 */
548                         0x00010000,   /* EMC_DLL_XFORM_DQS5 */
549                         0x00010000,   /* EMC_DLL_XFORM_DQS6 */
550                         0x00010000,   /* EMC_DLL_XFORM_DQS7 */
551                         0x00000000,   /* EMC_DLL_XFORM_QUSE0 */
552                         0x00000000,   /* EMC_DLL_XFORM_QUSE1 */
553                         0x00000000,   /* EMC_DLL_XFORM_QUSE2 */
554                         0x00000000,   /* EMC_DLL_XFORM_QUSE3 */
555                         0x00000000,   /* EMC_DLL_XFORM_QUSE4 */
556                         0x00000000,   /* EMC_DLL_XFORM_QUSE5 */
557                         0x00000000,   /* EMC_DLL_XFORM_QUSE6 */
558                         0x00000000,   /* EMC_DLL_XFORM_QUSE7 */
559                         0x00000000,   /* EMC_DLI_TRIM_TXDQS0 */
560                         0x00000000,   /* EMC_DLI_TRIM_TXDQS1 */
561                         0x00000000,   /* EMC_DLI_TRIM_TXDQS2 */
562                         0x00000000,   /* EMC_DLI_TRIM_TXDQS3 */
563                         0x00000000,   /* EMC_DLI_TRIM_TXDQS4 */
564                         0x00000000,   /* EMC_DLI_TRIM_TXDQS5 */
565                         0x00000000,   /* EMC_DLI_TRIM_TXDQS6 */
566                         0x00000000,   /* EMC_DLI_TRIM_TXDQS7 */
567                         0x00020000,   /* EMC_DLL_XFORM_DQ0 */
568                         0x00020000,   /* EMC_DLL_XFORM_DQ1 */
569                         0x00020000,   /* EMC_DLL_XFORM_DQ2 */
570                         0x00020000,   /* EMC_DLL_XFORM_DQ3 */
571                         0x000006a0,   /* EMC_XM2CMDPADCTRL */
572                         0x0800013d,   /* EMC_XM2DQSPADCTRL2 */
573                         0x00000000,   /* EMC_XM2DQPADCTRL2 */
574                         0x77ffc084,   /* EMC_XM2CLKPADCTRL */
575                         0x01f1f50f,   /* EMC_XM2COMPPADCTRL */
576                         0x07077404,   /* EMC_XM2VTTGENPADCTRL */
577                         0x00000007,   /* EMC_XM2VTTGENPADCTRL2 */
578                         0x0800011d,   /* EMC_XM2QUSEPADCTRL */
579                         0x08000021,   /* EMC_XM2DQSPADCTRL3 */
580                         0x00000802,   /* EMC_CTT_TERM_CTRL */
581                         0x00000000,   /* EMC_ZCAL_INTERVAL */
582                         0x00000040,   /* EMC_ZCAL_WAIT_CNT */
583                         0x01ab000c,   /* EMC_MRS_WAIT_CNT */
584                         0xa0f10404,   /* EMC_AUTO_CAL_CONFIG */
585                         0x00000000,   /* EMC_CTT */
586                         0x00000000,   /* EMC_CTT_DURATION */
587                         0x000020ae,   /* EMC_DYN_SELF_REF_CONTROL */
588                         0x00000008,   /* MC_EMEM_ARB_CFG */
589                         0x80000060,   /* MC_EMEM_ARB_OUTSTANDING_REQ */
590                         0x00000002,   /* MC_EMEM_ARB_TIMING_RCD */
591                         0x00000003,   /* MC_EMEM_ARB_TIMING_RP */
592                         0x0000000d,   /* MC_EMEM_ARB_TIMING_RC */
593                         0x00000008,   /* MC_EMEM_ARB_TIMING_RAS */
594                         0x00000007,   /* MC_EMEM_ARB_TIMING_FAW */
595                         0x00000001,   /* MC_EMEM_ARB_TIMING_RRD */
596                         0x00000002,   /* MC_EMEM_ARB_TIMING_RAP2PRE */
597                         0x00000009,   /* MC_EMEM_ARB_TIMING_WAP2PRE */
598                         0x00000002,   /* MC_EMEM_ARB_TIMING_R2R */
599                         0x00000002,   /* MC_EMEM_ARB_TIMING_W2W */
600                         0x00000003,   /* MC_EMEM_ARB_TIMING_R2W */
601                         0x00000006,   /* MC_EMEM_ARB_TIMING_W2R */
602                         0x06030202,   /* MC_EMEM_ARB_DA_TURNS */
603                         0x0010090d,   /* MC_EMEM_ARB_DA_COVERS */
604                         0x7028180e,   /* MC_EMEM_ARB_MISC0 */
605                         0x001f0000,   /* MC_EMEM_ARB_RING1_THROTTLE */
606                 },
607                 0x00000040,     /* EMC_ZCAL_WAIT_CNT after clock change */
608                 0x00000010,     /* EMC_AUTO_CAL_INTERVAL */
609                 0x00000000,     /* EMC_CFG.PERIODIC_QRST */
610                 0x00001941,     /* Mode Register 0 */
611                 0x00100002,     /* Mode Register 1 */
612                 0x00200008,     /* Mode Register 2 */
613         },
614 };
615
616 static const struct tegra_emc_table cardhu_emc_tables_h5tc2g_a2[] = {
617         {
618                 0x31,       /* Rev 3.1 */
619                 25500,      /* SDRAM frequency */
620                 {
621                         0x00000001, /* EMC_RC */
622                         0x00000003, /* EMC_RFC */
623                         0x00000000, /* EMC_RAS */
624                         0x00000000, /* EMC_RP */
625                         0x00000002, /* EMC_R2W */
626                         0x0000000a, /* EMC_W2R */
627                         0x00000003, /* EMC_R2P */
628                         0x0000000b, /* EMC_W2P */
629                         0x00000000, /* EMC_RD_RCD */
630                         0x00000000, /* EMC_WR_RCD */
631                         0x00000003, /* EMC_RRD */
632                         0x00000001, /* EMC_REXT */
633                         0x00000000, /* EMC_WEXT */
634                         0x00000005, /* EMC_WDV */
635                         0x00000005, /* EMC_QUSE */
636                         0x00000004, /* EMC_QRST */
637                         0x00000007, /* EMC_QSAFE */
638                         0x0000000c, /* EMC_RDV */
639                         0x000000bd, /* EMC_REFRESH */
640                         0x00000000, /* EMC_BURST_REFRESH_NUM */
641                         0x0000002f, /* EMC_PRE_REFRESH_REQ_CNT */
642                         0x00000002, /* EMC_PDEX2WR */
643                         0x00000002, /* EMC_PDEX2RD */
644                         0x00000001, /* EMC_PCHG2PDEN */
645                         0x00000000, /* EMC_ACT2PDEN */
646                         0x00000007, /* EMC_AR2PDEN */
647                         0x0000000f, /* EMC_RW2PDEN */
648                         0x00000005, /* EMC_TXSR */
649                         0x00000005, /* EMC_TXSRDLL */
650                         0x00000004, /* EMC_TCKE */
651                         0x00000001, /* EMC_TFAW */
652                         0x00000000, /* EMC_TRPAB */
653                         0x00000004, /* EMC_TCLKSTABLE */
654                         0x00000005, /* EMC_TCLKSTOP */
655                         0x000000c3, /* EMC_TREFBW */
656                         0x00000000, /* EMC_QUSE_EXTRA */
657                         0x00000004, /* EMC_FBIO_CFG6 */
658                         0x00000000, /* EMC_ODT_WRITE */
659                         0x00000000, /* EMC_ODT_READ */
660                         0x00006288, /* EMC_FBIO_CFG5 */
661                         0x007800a4, /* EMC_CFG_DIG_DLL */
662                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
663                         0x00080000, /* EMC_DLL_XFORM_DQS0 */
664                         0x00080000, /* EMC_DLL_XFORM_DQS1 */
665                         0x00080000, /* EMC_DLL_XFORM_DQS2 */
666                         0x00080000, /* EMC_DLL_XFORM_DQS3 */
667                         0x00080000, /* EMC_DLL_XFORM_DQS4 */
668                         0x00080000, /* EMC_DLL_XFORM_DQS5 */
669                         0x00080000, /* EMC_DLL_XFORM_DQS6 */
670                         0x00080000, /* EMC_DLL_XFORM_DQS7 */
671                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
672                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
673                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
674                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
675                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
676                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
677                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
678                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
679                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
680                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
681                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
682                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
683                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
684                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
685                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
686                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
687                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
688                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
689                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
690                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
691                         0x000002a0, /* EMC_XM2CMDPADCTRL */
692                         0x0800211c, /* EMC_XM2DQSPADCTRL2 */
693                         0x00000000, /* EMC_XM2DQPADCTRL2 */
694                         0x77ffc084, /* EMC_XM2CLKPADCTRL */
695                         0x01f1f108, /* EMC_XM2COMPPADCTRL */
696                         0x03037404, /* EMC_XM2VTTGENPADCTRL */
697                         0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
698                         0x08000168, /* EMC_XM2QUSEPADCTRL */
699                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
700                         0x00000802, /* EMC_CTT_TERM_CTRL */
701                         0x00000000, /* EMC_ZCAL_INTERVAL */
702                         0x00000040, /* EMC_ZCAL_WAIT_CNT */
703                         0x000c000c, /* EMC_MRS_WAIT_CNT */
704                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
705                         0x00000000, /* EMC_CTT */
706                         0x00000000, /* EMC_CTT_DURATION */
707                         0x80000280, /* EMC_DYN_SELF_REF_CONTROL */
708                         0x00020001, /* MC_EMEM_ARB_CFG */
709                         0x80000008, /* MC_EMEM_ARB_OUTSTANDING_REQ */
710                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
711                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
712                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
713                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
714                         0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
715                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
716                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
717                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
718                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
719                         0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
720                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
721                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
722                         0x06020102, /* MC_EMEM_ARB_DA_TURNS */
723                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
724                         0x74430303, /* MC_EMEM_ARB_MISC0 */
725                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
726                         0xd8000000, /* EMC_FBIO_SPARE */
727                         0xff00ff00, /* EMC_CFG_RSV */
728                 },
729                 0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
730                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
731                 0x00000000, /* EMC_CFG.PERIODIC_QRST */
732                 0x80001221, /* Mode Register 0 */
733                 0x80100003, /* Mode Register 1 */
734                 0x80200008, /* Mode Register 2 */
735         },
736         {
737                 0x31,       /* Rev 3.1 */
738                 51000,      /* SDRAM frequency */
739                 {
740                         0x00000002, /* EMC_RC */
741                         0x00000008, /* EMC_RFC */
742                         0x00000001, /* EMC_RAS */
743                         0x00000000, /* EMC_RP */
744                         0x00000002, /* EMC_R2W */
745                         0x0000000a, /* EMC_W2R */
746                         0x00000003, /* EMC_R2P */
747                         0x0000000b, /* EMC_W2P */
748                         0x00000000, /* EMC_RD_RCD */
749                         0x00000000, /* EMC_WR_RCD */
750                         0x00000003, /* EMC_RRD */
751                         0x00000001, /* EMC_REXT */
752                         0x00000000, /* EMC_WEXT */
753                         0x00000005, /* EMC_WDV */
754                         0x00000005, /* EMC_QUSE */
755                         0x00000004, /* EMC_QRST */
756                         0x00000007, /* EMC_QSAFE */
757                         0x0000000c, /* EMC_RDV */
758                         0x00000181, /* EMC_REFRESH */
759                         0x00000000, /* EMC_BURST_REFRESH_NUM */
760                         0x00000060, /* EMC_PRE_REFRESH_REQ_CNT */
761                         0x00000002, /* EMC_PDEX2WR */
762                         0x00000002, /* EMC_PDEX2RD */
763                         0x00000001, /* EMC_PCHG2PDEN */
764                         0x00000000, /* EMC_ACT2PDEN */
765                         0x00000007, /* EMC_AR2PDEN */
766                         0x0000000f, /* EMC_RW2PDEN */
767                         0x00000009, /* EMC_TXSR */
768                         0x00000009, /* EMC_TXSRDLL */
769                         0x00000004, /* EMC_TCKE */
770                         0x00000002, /* EMC_TFAW */
771                         0x00000000, /* EMC_TRPAB */
772                         0x00000004, /* EMC_TCLKSTABLE */
773                         0x00000005, /* EMC_TCLKSTOP */
774                         0x0000018e, /* EMC_TREFBW */
775                         0x00000000, /* EMC_QUSE_EXTRA */
776                         0x00000004, /* EMC_FBIO_CFG6 */
777                         0x00000000, /* EMC_ODT_WRITE */
778                         0x00000000, /* EMC_ODT_READ */
779                         0x00006288, /* EMC_FBIO_CFG5 */
780                         0x007800a4, /* EMC_CFG_DIG_DLL */
781                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
782                         0x00080000, /* EMC_DLL_XFORM_DQS0 */
783                         0x00080000, /* EMC_DLL_XFORM_DQS1 */
784                         0x00080000, /* EMC_DLL_XFORM_DQS2 */
785                         0x00080000, /* EMC_DLL_XFORM_DQS3 */
786                         0x00080000, /* EMC_DLL_XFORM_DQS4 */
787                         0x00080000, /* EMC_DLL_XFORM_DQS5 */
788                         0x00080000, /* EMC_DLL_XFORM_DQS6 */
789                         0x00080000, /* EMC_DLL_XFORM_DQS7 */
790                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
791                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
792                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
793                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
794                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
795                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
796                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
797                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
798                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
799                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
800                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
801                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
802                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
803                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
804                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
805                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
806                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
807                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
808                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
809                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
810                         0x000002a0, /* EMC_XM2CMDPADCTRL */
811                         0x0800211c, /* EMC_XM2DQSPADCTRL2 */
812                         0x00000000, /* EMC_XM2DQPADCTRL2 */
813                         0x77ffc084, /* EMC_XM2CLKPADCTRL */
814                         0x01f1f108, /* EMC_XM2COMPPADCTRL */
815                         0x03037404, /* EMC_XM2VTTGENPADCTRL */
816                         0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
817                         0x08000168, /* EMC_XM2QUSEPADCTRL */
818                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
819                         0x00000802, /* EMC_CTT_TERM_CTRL */
820                         0x00000000, /* EMC_ZCAL_INTERVAL */
821                         0x00000040, /* EMC_ZCAL_WAIT_CNT */
822                         0x000c000c, /* EMC_MRS_WAIT_CNT */
823                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
824                         0x00000000, /* EMC_CTT */
825                         0x00000000, /* EMC_CTT_DURATION */
826                         0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
827                         0x00000001, /* MC_EMEM_ARB_CFG */
828                         0x8000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
829                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
830                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
831                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
832                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
833                         0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
834                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
835                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
836                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
837                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
838                         0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
839                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
840                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
841                         0x06020102, /* MC_EMEM_ARB_DA_TURNS */
842                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
843                         0x73430303, /* MC_EMEM_ARB_MISC0 */
844                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
845                         0xd8000000, /* EMC_FBIO_SPARE */
846                         0xff00ff00, /* EMC_CFG_RSV */
847                 },
848                 0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
849                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
850                 0x00000000, /* EMC_CFG.PERIODIC_QRST */
851                 0x80001221, /* Mode Register 0 */
852                 0x80100003, /* Mode Register 1 */
853                 0x80200008, /* Mode Register 2 */
854         },
855         {
856                 0x31,       /* Rev 3.1 */
857                 102000,     /* SDRAM frequency */
858                 {
859                         0x00000004, /* EMC_RC */
860                         0x00000010, /* EMC_RFC */
861                         0x00000003, /* EMC_RAS */
862                         0x00000001, /* EMC_RP */
863                         0x00000002, /* EMC_R2W */
864                         0x0000000a, /* EMC_W2R */
865                         0x00000003, /* EMC_R2P */
866                         0x0000000b, /* EMC_W2P */
867                         0x00000001, /* EMC_RD_RCD */
868                         0x00000001, /* EMC_WR_RCD */
869                         0x00000003, /* EMC_RRD */
870                         0x00000001, /* EMC_REXT */
871                         0x00000000, /* EMC_WEXT */
872                         0x00000005, /* EMC_WDV */
873                         0x00000005, /* EMC_QUSE */
874                         0x00000004, /* EMC_QRST */
875                         0x00000007, /* EMC_QSAFE */
876                         0x0000000c, /* EMC_RDV */
877                         0x00000303, /* EMC_REFRESH */
878                         0x00000000, /* EMC_BURST_REFRESH_NUM */
879                         0x000000c0, /* EMC_PRE_REFRESH_REQ_CNT */
880                         0x00000002, /* EMC_PDEX2WR */
881                         0x00000002, /* EMC_PDEX2RD */
882                         0x00000001, /* EMC_PCHG2PDEN */
883                         0x00000000, /* EMC_ACT2PDEN */
884                         0x00000007, /* EMC_AR2PDEN */
885                         0x0000000f, /* EMC_RW2PDEN */
886                         0x00000012, /* EMC_TXSR */
887                         0x00000012, /* EMC_TXSRDLL */
888                         0x00000004, /* EMC_TCKE */
889                         0x00000004, /* EMC_TFAW */
890                         0x00000000, /* EMC_TRPAB */
891                         0x00000004, /* EMC_TCLKSTABLE */
892                         0x00000005, /* EMC_TCLKSTOP */
893                         0x0000031c, /* EMC_TREFBW */
894                         0x00000000, /* EMC_QUSE_EXTRA */
895                         0x00000004, /* EMC_FBIO_CFG6 */
896                         0x00000000, /* EMC_ODT_WRITE */
897                         0x00000000, /* EMC_ODT_READ */
898                         0x00006288, /* EMC_FBIO_CFG5 */
899                         0x007800a4, /* EMC_CFG_DIG_DLL */
900                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
901                         0x00080000, /* EMC_DLL_XFORM_DQS0 */
902                         0x00080000, /* EMC_DLL_XFORM_DQS1 */
903                         0x00080000, /* EMC_DLL_XFORM_DQS2 */
904                         0x00080000, /* EMC_DLL_XFORM_DQS3 */
905                         0x00080000, /* EMC_DLL_XFORM_DQS4 */
906                         0x00080000, /* EMC_DLL_XFORM_DQS5 */
907                         0x00080000, /* EMC_DLL_XFORM_DQS6 */
908                         0x00080000, /* EMC_DLL_XFORM_DQS7 */
909                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
910                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
911                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
912                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
913                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
914                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
915                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
916                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
917                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
918                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
919                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
920                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
921                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
922                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
923                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
924                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
925                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
926                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
927                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
928                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
929                         0x000002a0, /* EMC_XM2CMDPADCTRL */
930                         0x0800211c, /* EMC_XM2DQSPADCTRL2 */
931                         0x00000000, /* EMC_XM2DQPADCTRL2 */
932                         0x77ffc084, /* EMC_XM2CLKPADCTRL */
933                         0x01f1f108, /* EMC_XM2COMPPADCTRL */
934                         0x03037404, /* EMC_XM2VTTGENPADCTRL */
935                         0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
936                         0x08000168, /* EMC_XM2QUSEPADCTRL */
937                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
938                         0x00000802, /* EMC_CTT_TERM_CTRL */
939                         0x00000000, /* EMC_ZCAL_INTERVAL */
940                         0x00000040, /* EMC_ZCAL_WAIT_CNT */
941                         0x000c000c, /* EMC_MRS_WAIT_CNT */
942                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
943                         0x00000000, /* EMC_CTT */
944                         0x00000000, /* EMC_CTT_DURATION */
945                         0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
946                         0x00000001, /* MC_EMEM_ARB_CFG */
947                         0x80000013, /* MC_EMEM_ARB_OUTSTANDING_REQ */
948                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
949                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
950                         0x00000003, /* MC_EMEM_ARB_TIMING_RC */
951                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
952                         0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
953                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
954                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
955                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
956                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
957                         0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
958                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
959                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
960                         0x06020102, /* MC_EMEM_ARB_DA_TURNS */
961                         0x000a0403, /* MC_EMEM_ARB_DA_COVERS */
962                         0x72830504, /* MC_EMEM_ARB_MISC0 */
963                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
964                         0xd8000000, /* EMC_FBIO_SPARE */
965                         0xff00ff00, /* EMC_CFG_RSV */
966                 },
967                 0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
968                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
969                 0x00000000, /* EMC_CFG.PERIODIC_QRST */
970                 0x80001221, /* Mode Register 0 */
971                 0x80100003, /* Mode Register 1 */
972                 0x80200008, /* Mode Register 2 */
973         },
974         {
975                 0x31,       /* Rev 3.1 */
976                 408000,     /* SDRAM frequency */
977                 {
978                         0x00000012, /* EMC_RC */
979                         0x00000040, /* EMC_RFC */
980                         0x0000000d, /* EMC_RAS */
981                         0x00000004, /* EMC_RP */
982                         0x00000002, /* EMC_R2W */
983                         0x00000009, /* EMC_W2R */
984                         0x00000002, /* EMC_R2P */
985                         0x0000000c, /* EMC_W2P */
986                         0x00000004, /* EMC_RD_RCD */
987                         0x00000004, /* EMC_WR_RCD */
988                         0x00000002, /* EMC_RRD */
989                         0x00000001, /* EMC_REXT */
990                         0x00000000, /* EMC_WEXT */
991                         0x00000005, /* EMC_WDV */
992                         0x00000007, /* EMC_QUSE */
993                         0x00000005, /* EMC_QRST */
994                         0x00000008, /* EMC_QSAFE */
995                         0x0000000e, /* EMC_RDV */
996                         0x00000c2e, /* EMC_REFRESH */
997                         0x00000000, /* EMC_BURST_REFRESH_NUM */
998                         0x0000030b, /* EMC_PRE_REFRESH_REQ_CNT */
999                         0x00000008, /* EMC_PDEX2WR */
1000                         0x00000008, /* EMC_PDEX2RD */
1001                         0x00000001, /* EMC_PCHG2PDEN */
1002                         0x00000000, /* EMC_ACT2PDEN */
1003                         0x00000008, /* EMC_AR2PDEN */
1004                         0x00000011, /* EMC_RW2PDEN */
1005                         0x00000046, /* EMC_TXSR */
1006                         0x00000200, /* EMC_TXSRDLL */
1007                         0x0000000a, /* EMC_TCKE */
1008                         0x0000000d, /* EMC_TFAW */
1009                         0x00000000, /* EMC_TRPAB */
1010                         0x00000004, /* EMC_TCLKSTABLE */
1011                         0x00000005, /* EMC_TCLKSTOP */
1012                         0x00000c6f, /* EMC_TREFBW */
1013                         0x00000000, /* EMC_QUSE_EXTRA */
1014                         0x00000006, /* EMC_FBIO_CFG6 */
1015                         0x00000000, /* EMC_ODT_WRITE */
1016                         0x00000000, /* EMC_ODT_READ */
1017                         0x00007088, /* EMC_FBIO_CFG5 */
1018                         0x001c0084, /* EMC_CFG_DIG_DLL */
1019                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1020                         0x00014000, /* EMC_DLL_XFORM_DQS0 */
1021                         0x00014000, /* EMC_DLL_XFORM_DQS1 */
1022                         0x00014000, /* EMC_DLL_XFORM_DQS2 */
1023                         0x00014000, /* EMC_DLL_XFORM_DQS3 */
1024                         0x00014000, /* EMC_DLL_XFORM_DQS4 */
1025                         0x00014000, /* EMC_DLL_XFORM_DQS5 */
1026                         0x00014000, /* EMC_DLL_XFORM_DQS6 */
1027                         0x00014000, /* EMC_DLL_XFORM_DQS7 */
1028                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1029                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1030                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1031                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1032                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1033                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1034                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1035                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1036                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1037                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1038                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1039                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1040                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1041                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1042                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1043                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1044                         0x00020000, /* EMC_DLL_XFORM_DQ0 */
1045                         0x00020000, /* EMC_DLL_XFORM_DQ1 */
1046                         0x00020000, /* EMC_DLL_XFORM_DQ2 */
1047                         0x00020000, /* EMC_DLL_XFORM_DQ3 */
1048                         0x000002a0, /* EMC_XM2CMDPADCTRL */
1049                         0x0800013d, /* EMC_XM2DQSPADCTRL2 */
1050                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1051                         0x77fff884, /* EMC_XM2CLKPADCTRL */
1052                         0x01f1f508, /* EMC_XM2COMPPADCTRL */
1053                         0x03037404, /* EMC_XM2VTTGENPADCTRL */
1054                         0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
1055                         0x080001e8, /* EMC_XM2QUSEPADCTRL */
1056                         0x08000021, /* EMC_XM2DQSPADCTRL3 */
1057                         0x00000802, /* EMC_CTT_TERM_CTRL */
1058                         0x00020000, /* EMC_ZCAL_INTERVAL */
1059                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1060                         0x017f000c, /* EMC_MRS_WAIT_CNT */
1061                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
1062                         0x00000000, /* EMC_CTT */
1063                         0x00000000, /* EMC_CTT_DURATION */
1064                         0x80001941, /* EMC_DYN_SELF_REF_CONTROL */
1065                         0x00000006, /* MC_EMEM_ARB_CFG */
1066                         0x8000004a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1067                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1068                         0x00000002, /* MC_EMEM_ARB_TIMING_RP */
1069                         0x0000000a, /* MC_EMEM_ARB_TIMING_RC */
1070                         0x00000006, /* MC_EMEM_ARB_TIMING_RAS */
1071                         0x00000006, /* MC_EMEM_ARB_TIMING_FAW */
1072                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1073                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1074                         0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1075                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1076                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1077                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1078                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1079                         0x06030202, /* MC_EMEM_ARB_DA_TURNS */
1080                         0x000e070a, /* MC_EMEM_ARB_DA_COVERS */
1081                         0x7547130b, /* MC_EMEM_ARB_MISC0 */
1082                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1083                         0x58000000, /* EMC_FBIO_SPARE */
1084                         0xff00ff88, /* EMC_CFG_RSV */
1085                 },
1086                 0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
1087                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1088                 0x00000000, /* EMC_CFG.PERIODIC_QRST */
1089                 0x80000731, /* Mode Register 0 */
1090                 0x80100002, /* Mode Register 1 */
1091                 0x80200008, /* Mode Register 2 */
1092         },
1093         {
1094                 0x31,       /* Rev 3.1 */
1095                 533000,     /* SDRAM frequency */
1096                 {
1097                         0x00000018, /* EMC_RC */
1098                         0x00000054, /* EMC_RFC */
1099                         0x00000011, /* EMC_RAS */
1100                         0x00000006, /* EMC_RP */
1101                         0x00000003, /* EMC_R2W */
1102                         0x00000009, /* EMC_W2R */
1103                         0x00000002, /* EMC_R2P */
1104                         0x0000000d, /* EMC_W2P */
1105                         0x00000006, /* EMC_RD_RCD */
1106                         0x00000006, /* EMC_WR_RCD */
1107                         0x00000002, /* EMC_RRD */
1108                         0x00000001, /* EMC_REXT */
1109                         0x00000000, /* EMC_WEXT */
1110                         0x00000005, /* EMC_WDV */
1111                         0x00000008, /* EMC_QUSE */
1112                         0x00000006, /* EMC_QRST */
1113                         0x00000008, /* EMC_QSAFE */
1114                         0x00000010, /* EMC_RDV */
1115                         0x00000ffd, /* EMC_REFRESH */
1116                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1117                         0x000003ff, /* EMC_PRE_REFRESH_REQ_CNT */
1118                         0x0000000b, /* EMC_PDEX2WR */
1119                         0x0000000b, /* EMC_PDEX2RD */
1120                         0x00000001, /* EMC_PCHG2PDEN */
1121                         0x00000000, /* EMC_ACT2PDEN */
1122                         0x0000000a, /* EMC_AR2PDEN */
1123                         0x00000012, /* EMC_RW2PDEN */
1124                         0x0000005b, /* EMC_TXSR */
1125                         0x00000200, /* EMC_TXSRDLL */
1126                         0x0000000d, /* EMC_TCKE */
1127                         0x00000010, /* EMC_TFAW */
1128                         0x00000000, /* EMC_TRPAB */
1129                         0x00000005, /* EMC_TCLKSTABLE */
1130                         0x00000006, /* EMC_TCLKSTOP */
1131                         0x0000103e, /* EMC_TREFBW */
1132                         0x00000000, /* EMC_QUSE_EXTRA */
1133                         0x00000006, /* EMC_FBIO_CFG6 */
1134                         0x00000000, /* EMC_ODT_WRITE */
1135                         0x00000000, /* EMC_ODT_READ */
1136                         0x00007088, /* EMC_FBIO_CFG5 */
1137                         0x00120084, /* EMC_CFG_DIG_DLL */
1138                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1139                         0x00010000, /* EMC_DLL_XFORM_DQS0 */
1140                         0x00010000, /* EMC_DLL_XFORM_DQS1 */
1141                         0x00010000, /* EMC_DLL_XFORM_DQS2 */
1142                         0x00010000, /* EMC_DLL_XFORM_DQS3 */
1143                         0x00010000, /* EMC_DLL_XFORM_DQS4 */
1144                         0x00010000, /* EMC_DLL_XFORM_DQS5 */
1145                         0x00010000, /* EMC_DLL_XFORM_DQS6 */
1146                         0x00010000, /* EMC_DLL_XFORM_DQS7 */
1147                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1148                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1149                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1150                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1151                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1152                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1153                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1154                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1155                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1156                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1157                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1158                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1159                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1160                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1161                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1162                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1163                         0x00020000, /* EMC_DLL_XFORM_DQ0 */
1164                         0x00020000, /* EMC_DLL_XFORM_DQ1 */
1165                         0x00020000, /* EMC_DLL_XFORM_DQ2 */
1166                         0x00020000, /* EMC_DLL_XFORM_DQ3 */
1167                         0x000006a0, /* EMC_XM2CMDPADCTRL */
1168                         0x0800013d, /* EMC_XM2DQSPADCTRL2 */
1169                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1170                         0x77ffc084, /* EMC_XM2CLKPADCTRL */
1171                         0x01f1f508, /* EMC_XM2COMPPADCTRL */
1172                         0x03037404, /* EMC_XM2VTTGENPADCTRL */
1173                         0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
1174                         0x08000168, /* EMC_XM2QUSEPADCTRL */
1175                         0x08000021, /* EMC_XM2DQSPADCTRL3 */
1176                         0x00000802, /* EMC_CTT_TERM_CTRL */
1177                         0x00000000, /* EMC_ZCAL_INTERVAL */
1178                         0x00000040, /* EMC_ZCAL_WAIT_CNT */
1179                         0x01ab000c, /* EMC_MRS_WAIT_CNT */
1180                         0xa0f10404, /* EMC_AUTO_CAL_CONFIG */
1181                         0x00000000, /* EMC_CTT */
1182                         0x00000000, /* EMC_CTT_DURATION */
1183                         0x800020ae, /* EMC_DYN_SELF_REF_CONTROL */
1184                         0x00000008, /* MC_EMEM_ARB_CFG */
1185                         0x80000060, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1186                         0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
1187                         0x00000003, /* MC_EMEM_ARB_TIMING_RP */
1188                         0x0000000d, /* MC_EMEM_ARB_TIMING_RC */
1189                         0x00000008, /* MC_EMEM_ARB_TIMING_RAS */
1190                         0x00000007, /* MC_EMEM_ARB_TIMING_FAW */
1191                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1192                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1193                         0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1194                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1195                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1196                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1197                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1198                         0x06030202, /* MC_EMEM_ARB_DA_TURNS */
1199                         0x0010090d, /* MC_EMEM_ARB_DA_COVERS */
1200                         0x7028180e, /* MC_EMEM_ARB_MISC0 */
1201                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1202                         0x00000000, /* EMC_FBIO_SPARE */
1203                         0xff00ff00, /* EMC_CFG_RSV */
1204                 },
1205                 0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
1206                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1207                 0x00000000, /* EMC_CFG.PERIODIC_QRST */
1208                 0x80000941, /* Mode Register 0 */
1209                 0x80100002, /* Mode Register 1 */
1210                 0x80200008, /* Mode Register 2 */
1211         },
1212         {
1213                 0x31,       /* Rev 3.1 */
1214                 750000,     /* SDRAM frequency */
1215                 {
1216                         0x00000025, /* EMC_RC */
1217                         0x0000007e, /* EMC_RFC */
1218                         0x0000001a, /* EMC_RAS */
1219                         0x00000009, /* EMC_RP */
1220                         0x00000004, /* EMC_R2W */
1221                         0x0000000d, /* EMC_W2R */
1222                         0x00000004, /* EMC_R2P */
1223                         0x00000013, /* EMC_W2P */
1224                         0x00000009, /* EMC_RD_RCD */
1225                         0x00000009, /* EMC_WR_RCD */
1226                         0x00000003, /* EMC_RRD */
1227                         0x00000001, /* EMC_REXT */
1228                         0x00000000, /* EMC_WEXT */
1229                         0x00000007, /* EMC_WDV */
1230                         0x0000000b, /* EMC_QUSE */
1231                         0x00000009, /* EMC_QRST */
1232                         0x0000000c, /* EMC_QSAFE */
1233                         0x00000011, /* EMC_RDV */
1234                         0x0000169a, /* EMC_REFRESH */
1235                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1236                         0x00000608, /* EMC_PRE_REFRESH_REQ_CNT */
1237                         0x00000012, /* EMC_PDEX2WR */
1238                         0x00000012, /* EMC_PDEX2RD */
1239                         0x00000001, /* EMC_PCHG2PDEN */
1240                         0x00000000, /* EMC_ACT2PDEN */
1241                         0x0000000f, /* EMC_AR2PDEN */
1242                         0x00000018, /* EMC_RW2PDEN */
1243                         0x00000088, /* EMC_TXSR */
1244                         0x00000200, /* EMC_TXSRDLL */
1245                         0x00000014, /* EMC_TCKE */
1246                         0x00000018, /* EMC_TFAW */
1247                         0x00000000, /* EMC_TRPAB */
1248                         0x00000007, /* EMC_TCLKSTABLE */
1249                         0x00000008, /* EMC_TCLKSTOP */
1250                         0x00001860, /* EMC_TREFBW */
1251                         0x0000000c, /* EMC_QUSE_EXTRA */
1252                         0x00000004, /* EMC_FBIO_CFG6 */
1253                         0x00000000, /* EMC_ODT_WRITE */
1254                         0x00000000, /* EMC_ODT_READ */
1255                         0x00005088, /* EMC_FBIO_CFG5 */
1256                         0x40070191, /* EMC_CFG_DIG_DLL */
1257                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1258                         0x00000008, /* EMC_DLL_XFORM_DQS0 */
1259                         0x00000008, /* EMC_DLL_XFORM_DQS1 */
1260                         0x00000008, /* EMC_DLL_XFORM_DQS2 */
1261                         0x00000008, /* EMC_DLL_XFORM_DQS3 */
1262                         0x00000008, /* EMC_DLL_XFORM_DQS4 */
1263                         0x00000008, /* EMC_DLL_XFORM_DQS5 */
1264                         0x00000008, /* EMC_DLL_XFORM_DQS6 */
1265                         0x00000008, /* EMC_DLL_XFORM_DQS7 */
1266                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1267                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1268                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1269                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1270                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1271                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1272                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1273                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1274                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1275                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1276                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1277                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1278                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1279                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1280                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1281                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1282                         0x0000000c, /* EMC_DLL_XFORM_DQ0 */
1283                         0x0000000c, /* EMC_DLL_XFORM_DQ1 */
1284                         0x0000000c, /* EMC_DLL_XFORM_DQ2 */
1285                         0x0000000c, /* EMC_DLL_XFORM_DQ3 */
1286                         0x000002a0, /* EMC_XM2CMDPADCTRL */
1287                         0x0600013d, /* EMC_XM2DQSPADCTRL2 */
1288                         0x22220000, /* EMC_XM2DQPADCTRL2 */
1289                         0x77fff884, /* EMC_XM2CLKPADCTRL */
1290                         0x01f1f501, /* EMC_XM2COMPPADCTRL */
1291                         0x07077404, /* EMC_XM2VTTGENPADCTRL */
1292                         0x54000000, /* EMC_XM2VTTGENPADCTRL2 */
1293                         0x080001e8, /* EMC_XM2QUSEPADCTRL */
1294                         0x07000021, /* EMC_XM2DQSPADCTRL3 */
1295                         0x00000802, /* EMC_CTT_TERM_CTRL */
1296                         0x00020000, /* EMC_ZCAL_INTERVAL */
1297                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1298                         0x0180000c, /* EMC_MRS_WAIT_CNT */
1299                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
1300                         0x00000000, /* EMC_CTT */
1301                         0x00000000, /* EMC_CTT_DURATION */
1302                         0x8000308c, /* EMC_DYN_SELF_REF_CONTROL */
1303                         0x0000000c, /* MC_EMEM_ARB_CFG */
1304                         0x80000090, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1305                         0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
1306                         0x00000005, /* MC_EMEM_ARB_TIMING_RP */
1307                         0x00000013, /* MC_EMEM_ARB_TIMING_RC */
1308                         0x0000000c, /* MC_EMEM_ARB_TIMING_RAS */
1309                         0x0000000b, /* MC_EMEM_ARB_TIMING_FAW */
1310                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
1311                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1312                         0x0000000c, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1313                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1314                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1315                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
1316                         0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
1317                         0x08040202, /* MC_EMEM_ARB_DA_TURNS */
1318                         0x00160d13, /* MC_EMEM_ARB_DA_COVERS */
1319                         0x72ac2414, /* MC_EMEM_ARB_MISC0 */
1320                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1321                         0xf8000000, /* EMC_FBIO_SPARE */
1322                         0xff00ff49, /* EMC_CFG_RSV */
1323                 },
1324                 0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
1325                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1326                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
1327                 0x80000d71, /* Mode Register 0 */
1328                 0x80100002, /* Mode Register 1 */
1329                 0x80200018, /* Mode Register 2 */
1330         },
1331 };
1332
1333 static const struct tegra_emc_table cardhu_emc_tables_k4p8g304eb[] = {
1334         {
1335                 0x31,       /* Rev 3.1 */
1336                 25500,      /* SDRAM frequency */
1337                 {
1338                         0x00000001, /* EMC_RC */
1339                         0x00000003, /* EMC_RFC */
1340                         0x00000002, /* EMC_RAS */
1341                         0x00000002, /* EMC_RP */
1342                         0x00000004, /* EMC_R2W */
1343                         0x00000004, /* EMC_W2R */
1344                         0x00000001, /* EMC_R2P */
1345                         0x00000005, /* EMC_W2P */
1346                         0x00000002, /* EMC_RD_RCD */
1347                         0x00000002, /* EMC_WR_RCD */
1348                         0x00000001, /* EMC_RRD */
1349                         0x00000001, /* EMC_REXT */
1350                         0x00000000, /* EMC_WEXT */
1351                         0x00000001, /* EMC_WDV */
1352                         0x00000003, /* EMC_QUSE */
1353                         0x00000001, /* EMC_QRST */
1354                         0x00000009, /* EMC_QSAFE */
1355                         0x0000000a, /* EMC_RDV */
1356                         0x0000005e, /* EMC_REFRESH */
1357                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1358                         0x00000017, /* EMC_PRE_REFRESH_REQ_CNT */
1359                         0x00000001, /* EMC_PDEX2WR */
1360                         0x00000001, /* EMC_PDEX2RD */
1361                         0x00000002, /* EMC_PCHG2PDEN */
1362                         0x00000000, /* EMC_ACT2PDEN */
1363                         0x00000001, /* EMC_AR2PDEN */
1364                         0x00000007, /* EMC_RW2PDEN */
1365                         0x00000004, /* EMC_TXSR */
1366                         0x00000004, /* EMC_TXSRDLL */
1367                         0x00000003, /* EMC_TCKE */
1368                         0x00000008, /* EMC_TFAW */
1369                         0x00000004, /* EMC_TRPAB */
1370                         0x00000004, /* EMC_TCLKSTABLE */
1371                         0x00000002, /* EMC_TCLKSTOP */
1372                         0x00000068, /* EMC_TREFBW */
1373                         0x00000004, /* EMC_QUSE_EXTRA */
1374                         0x00000004, /* EMC_FBIO_CFG6 */
1375                         0x00000000, /* EMC_ODT_WRITE */
1376                         0x00000000, /* EMC_ODT_READ */
1377                         0x00004282, /* EMC_FBIO_CFG5 */
1378                         0x00780084, /* EMC_CFG_DIG_DLL */
1379                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1380                         0x00098000, /* EMC_DLL_XFORM_DQS0 */
1381                         0x00098000, /* EMC_DLL_XFORM_DQS1 */
1382                         0x00098000, /* EMC_DLL_XFORM_DQS2 */
1383                         0x00098000, /* EMC_DLL_XFORM_DQS3 */
1384                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
1385                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
1386                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
1387                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
1388                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1389                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1390                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1391                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1392                         0x00000008, /* EMC_DLL_XFORM_QUSE4 */
1393                         0x00000008, /* EMC_DLL_XFORM_QUSE5 */
1394                         0x00000008, /* EMC_DLL_XFORM_QUSE6 */
1395                         0x00000008, /* EMC_DLL_XFORM_QUSE7 */
1396                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1397                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1398                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1399                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1400                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1401                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1402                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1403                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1404                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
1405                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
1406                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
1407                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
1408                         0x00100220, /* EMC_XM2CMDPADCTRL */
1409                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
1410                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1411                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
1412                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
1413                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
1414                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
1415                         0x08000068, /* EMC_XM2QUSEPADCTRL */
1416                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
1417                         0x00000802, /* EMC_CTT_TERM_CTRL */
1418                         0x00064000, /* EMC_ZCAL_INTERVAL */
1419                         0x0000000a, /* EMC_ZCAL_WAIT_CNT */
1420                         0x00090009, /* EMC_MRS_WAIT_CNT */
1421                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
1422                         0x00000000, /* EMC_CTT */
1423                         0x00000000, /* EMC_CTT_DURATION */
1424                         0x800001c2, /* EMC_DYN_SELF_REF_CONTROL */
1425                         0x00020001, /* MC_EMEM_ARB_CFG */
1426                         0x80000008, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1427                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1428                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1429                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
1430                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
1431                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
1432                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1433                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1434                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1435                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
1436                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
1437                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
1438                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
1439                         0x02020001, /* MC_EMEM_ARB_DA_TURNS */
1440                         0x00060402, /* MC_EMEM_ARB_DA_COVERS */
1441                         0x74030303, /* MC_EMEM_ARB_MISC0 */
1442                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1443                         0x50000000, /* EMC_FBIO_SPARE */
1444                         0xff00ff00, /* EMC_CFG_RSV */
1445                 },
1446                 0x00000009, /* EMC_ZCAL_WAIT_CNT after clock change */
1447                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1448                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
1449                 0x00000000, /* Mode Register 0 */
1450                 0x00010022, /* Mode Register 1 */
1451                 0x00020001, /* Mode Register 2 */
1452         },
1453         {
1454                 0x31,       /* Rev 3.1 */
1455                 51000,      /* SDRAM frequency */
1456                 {
1457                         0x00000003, /* EMC_RC */
1458                         0x00000006, /* EMC_RFC */
1459                         0x00000002, /* EMC_RAS */
1460                         0x00000002, /* EMC_RP */
1461                         0x00000004, /* EMC_R2W */
1462                         0x00000004, /* EMC_W2R */
1463                         0x00000001, /* EMC_R2P */
1464                         0x00000005, /* EMC_W2P */
1465                         0x00000002, /* EMC_RD_RCD */
1466                         0x00000002, /* EMC_WR_RCD */
1467                         0x00000001, /* EMC_RRD */
1468                         0x00000001, /* EMC_REXT */
1469                         0x00000000, /* EMC_WEXT */
1470                         0x00000001, /* EMC_WDV */
1471                         0x00000003, /* EMC_QUSE */
1472                         0x00000001, /* EMC_QRST */
1473                         0x00000009, /* EMC_QSAFE */
1474                         0x0000000a, /* EMC_RDV */
1475                         0x000000c0, /* EMC_REFRESH */
1476                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1477                         0x00000030, /* EMC_PRE_REFRESH_REQ_CNT */
1478                         0x00000001, /* EMC_PDEX2WR */
1479                         0x00000001, /* EMC_PDEX2RD */
1480                         0x00000002, /* EMC_PCHG2PDEN */
1481                         0x00000000, /* EMC_ACT2PDEN */
1482                         0x00000001, /* EMC_AR2PDEN */
1483                         0x00000007, /* EMC_RW2PDEN */
1484                         0x00000008, /* EMC_TXSR */
1485                         0x00000008, /* EMC_TXSRDLL */
1486                         0x00000003, /* EMC_TCKE */
1487                         0x00000008, /* EMC_TFAW */
1488                         0x00000004, /* EMC_TRPAB */
1489                         0x00000004, /* EMC_TCLKSTABLE */
1490                         0x00000002, /* EMC_TCLKSTOP */
1491                         0x000000d5, /* EMC_TREFBW */
1492                         0x00000004, /* EMC_QUSE_EXTRA */
1493                         0x00000004, /* EMC_FBIO_CFG6 */
1494                         0x00000000, /* EMC_ODT_WRITE */
1495                         0x00000000, /* EMC_ODT_READ */
1496                         0x00004282, /* EMC_FBIO_CFG5 */
1497                         0x00780084, /* EMC_CFG_DIG_DLL */
1498                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1499                         0x000a0000, /* EMC_DLL_XFORM_DQS0 */
1500                         0x000a0000, /* EMC_DLL_XFORM_DQS1 */
1501                         0x000a0000, /* EMC_DLL_XFORM_DQS2 */
1502                         0x000a0000, /* EMC_DLL_XFORM_DQS3 */
1503                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
1504                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
1505                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
1506                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
1507                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1508                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1509                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1510                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1511                         0x00000018, /* EMC_DLL_XFORM_QUSE4 */
1512                         0x00000018, /* EMC_DLL_XFORM_QUSE5 */
1513                         0x00000018, /* EMC_DLL_XFORM_QUSE6 */
1514                         0x00000018, /* EMC_DLL_XFORM_QUSE7 */
1515                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1516                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1517                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1518                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1519                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1520                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1521                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1522                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1523                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
1524                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
1525                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
1526                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
1527                         0x00100220, /* EMC_XM2CMDPADCTRL */
1528                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
1529                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1530                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
1531                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
1532                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
1533                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
1534                         0x08000068, /* EMC_XM2QUSEPADCTRL */
1535                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
1536                         0x00000802, /* EMC_CTT_TERM_CTRL */
1537                         0x00064000, /* EMC_ZCAL_INTERVAL */
1538                         0x00000013, /* EMC_ZCAL_WAIT_CNT */
1539                         0x00090009, /* EMC_MRS_WAIT_CNT */
1540                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
1541                         0x00000000, /* EMC_CTT */
1542                         0x00000000, /* EMC_CTT_DURATION */
1543                         0x80000287, /* EMC_DYN_SELF_REF_CONTROL */
1544                         0x00010001, /* MC_EMEM_ARB_CFG */
1545                         0x8000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1546                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1547                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1548                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
1549                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
1550                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
1551                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1552                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1553                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1554                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
1555                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
1556                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
1557                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
1558                         0x02020001, /* MC_EMEM_ARB_DA_TURNS */
1559                         0x00060402, /* MC_EMEM_ARB_DA_COVERS */
1560                         0x72c30303, /* MC_EMEM_ARB_MISC0 */
1561                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1562                         0x50000000, /* EMC_FBIO_SPARE */
1563                         0xff00ff00, /* EMC_CFG_RSV */
1564                 },
1565                 0x00000009, /* EMC_ZCAL_WAIT_CNT after clock change */
1566                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1567                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
1568                 0x00000000, /* Mode Register 0 */
1569                 0x00010022, /* Mode Register 1 */
1570                 0x00020001, /* Mode Register 2 */
1571         },
1572         {
1573                 0x31,       /* Rev 3.1 */
1574                 102000,     /* SDRAM frequency */
1575                 {
1576                         0x00000006, /* EMC_RC */
1577                         0x0000000d, /* EMC_RFC */
1578                         0x00000004, /* EMC_RAS */
1579                         0x00000002, /* EMC_RP */
1580                         0x00000004, /* EMC_R2W */
1581                         0x00000004, /* EMC_W2R */
1582                         0x00000001, /* EMC_R2P */
1583                         0x00000005, /* EMC_W2P */
1584                         0x00000002, /* EMC_RD_RCD */
1585                         0x00000002, /* EMC_WR_RCD */
1586                         0x00000001, /* EMC_RRD */
1587                         0x00000001, /* EMC_REXT */
1588                         0x00000000, /* EMC_WEXT */
1589                         0x00000001, /* EMC_WDV */
1590                         0x00000003, /* EMC_QUSE */
1591                         0x00000001, /* EMC_QRST */
1592                         0x00000009, /* EMC_QSAFE */
1593                         0x00000009, /* EMC_RDV */
1594                         0x00000181, /* EMC_REFRESH */
1595                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1596                         0x00000060, /* EMC_PRE_REFRESH_REQ_CNT */
1597                         0x00000001, /* EMC_PDEX2WR */
1598                         0x00000001, /* EMC_PDEX2RD */
1599                         0x00000002, /* EMC_PCHG2PDEN */
1600                         0x00000000, /* EMC_ACT2PDEN */
1601                         0x00000001, /* EMC_AR2PDEN */
1602                         0x00000007, /* EMC_RW2PDEN */
1603                         0x0000000f, /* EMC_TXSR */
1604                         0x0000000f, /* EMC_TXSRDLL */
1605                         0x00000003, /* EMC_TCKE */
1606                         0x00000008, /* EMC_TFAW */
1607                         0x00000004, /* EMC_TRPAB */
1608                         0x00000004, /* EMC_TCLKSTABLE */
1609                         0x00000002, /* EMC_TCLKSTOP */
1610                         0x000001a9, /* EMC_TREFBW */
1611                         0x00000004, /* EMC_QUSE_EXTRA */
1612                         0x00000004, /* EMC_FBIO_CFG6 */
1613                         0x00000000, /* EMC_ODT_WRITE */
1614                         0x00000000, /* EMC_ODT_READ */
1615                         0x00004282, /* EMC_FBIO_CFG5 */
1616                         0x00780084, /* EMC_CFG_DIG_DLL */
1617                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1618                         0x000a0000, /* EMC_DLL_XFORM_DQS0 */
1619                         0x000a0000, /* EMC_DLL_XFORM_DQS1 */
1620                         0x000a0000, /* EMC_DLL_XFORM_DQS2 */
1621                         0x000a0000, /* EMC_DLL_XFORM_DQS3 */
1622                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
1623                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
1624                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
1625                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
1626                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1627                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1628                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1629                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1630                         0x00000008, /* EMC_DLL_XFORM_QUSE4 */
1631                         0x00000008, /* EMC_DLL_XFORM_QUSE5 */
1632                         0x00000008, /* EMC_DLL_XFORM_QUSE6 */
1633                         0x00000008, /* EMC_DLL_XFORM_QUSE7 */
1634                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1635                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1636                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1637                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1638                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1639                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1640                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1641                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1642                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
1643                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
1644                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
1645                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
1646                         0x00120220, /* EMC_XM2CMDPADCTRL */
1647                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
1648                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1649                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
1650                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
1651                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
1652                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
1653                         0x08000068, /* EMC_XM2QUSEPADCTRL */
1654                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
1655                         0x00000802, /* EMC_CTT_TERM_CTRL */
1656                         0x00064000, /* EMC_ZCAL_INTERVAL */
1657                         0x00000025, /* EMC_ZCAL_WAIT_CNT */
1658                         0x00090009, /* EMC_MRS_WAIT_CNT */
1659                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
1660                         0x00000000, /* EMC_CTT */
1661                         0x00000000, /* EMC_CTT_DURATION */
1662                         0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
1663                         0x00000001, /* MC_EMEM_ARB_CFG */
1664                         0x80000013, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1665                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1666                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1667                         0x00000003, /* MC_EMEM_ARB_TIMING_RC */
1668                         0x00000001, /* MC_EMEM_ARB_TIMING_RAS */
1669                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
1670                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1671                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1672                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1673                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
1674                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
1675                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
1676                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
1677                         0x02020001, /* MC_EMEM_ARB_DA_TURNS */
1678                         0x00060403, /* MC_EMEM_ARB_DA_COVERS */
1679                         0x72430504, /* MC_EMEM_ARB_MISC0 */
1680                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1681                         0x10000000, /* EMC_FBIO_SPARE */
1682                         0xff00ff00, /* EMC_CFG_RSV */
1683                 },
1684                 0x0000000a, /* EMC_ZCAL_WAIT_CNT after clock change */
1685                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1686                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
1687                 0x00000000, /* Mode Register 0 */
1688                 0x00010022, /* Mode Register 1 */
1689                 0x00020001, /* Mode Register 2 */
1690         },
1691         {
1692                 0x31,       /* Rev 3.1 */
1693                 204000,     /* SDRAM frequency */
1694                 {
1695                         0x0000000c, /* EMC_RC */
1696                         0x0000001a, /* EMC_RFC */
1697                         0x00000008, /* EMC_RAS */
1698                         0x00000003, /* EMC_RP */
1699                         0x00000005, /* EMC_R2W */
1700                         0x00000004, /* EMC_W2R */
1701                         0x00000001, /* EMC_R2P */
1702                         0x00000006, /* EMC_W2P */
1703                         0x00000003, /* EMC_RD_RCD */
1704                         0x00000003, /* EMC_WR_RCD */
1705                         0x00000002, /* EMC_RRD */
1706                         0x00000002, /* EMC_REXT */
1707                         0x00000000, /* EMC_WEXT */
1708                         0x00000001, /* EMC_WDV */
1709                         0x00000003, /* EMC_QUSE */
1710                         0x00000001, /* EMC_QRST */
1711                         0x0000000a, /* EMC_QSAFE */
1712                         0x0000000a, /* EMC_RDV */
1713                         0x00000303, /* EMC_REFRESH */
1714                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1715                         0x000000c0, /* EMC_PRE_REFRESH_REQ_CNT */
1716                         0x00000001, /* EMC_PDEX2WR */
1717                         0x00000001, /* EMC_PDEX2RD */
1718                         0x00000003, /* EMC_PCHG2PDEN */
1719                         0x00000000, /* EMC_ACT2PDEN */
1720                         0x00000001, /* EMC_AR2PDEN */
1721                         0x00000007, /* EMC_RW2PDEN */
1722                         0x0000001d, /* EMC_TXSR */
1723                         0x0000001d, /* EMC_TXSRDLL */
1724                         0x00000004, /* EMC_TCKE */
1725                         0x0000000b, /* EMC_TFAW */
1726                         0x00000005, /* EMC_TRPAB */
1727                         0x00000004, /* EMC_TCLKSTABLE */
1728                         0x00000002, /* EMC_TCLKSTOP */
1729                         0x00000351, /* EMC_TREFBW */
1730                         0x00000004, /* EMC_QUSE_EXTRA */
1731                         0x00000006, /* EMC_FBIO_CFG6 */
1732                         0x00000000, /* EMC_ODT_WRITE */
1733                         0x00000000, /* EMC_ODT_READ */
1734                         0x00004282, /* EMC_FBIO_CFG5 */
1735                         0x00440084, /* EMC_CFG_DIG_DLL */
1736                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1737                         0x00074000, /* EMC_DLL_XFORM_DQS0 */
1738                         0x00074000, /* EMC_DLL_XFORM_DQS1 */
1739                         0x00074000, /* EMC_DLL_XFORM_DQS2 */
1740                         0x00074000, /* EMC_DLL_XFORM_DQS3 */
1741                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
1742                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
1743                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
1744                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
1745                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1746                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1747                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1748                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1749                         0x00000018, /* EMC_DLL_XFORM_QUSE4 */
1750                         0x00000018, /* EMC_DLL_XFORM_QUSE5 */
1751                         0x00000018, /* EMC_DLL_XFORM_QUSE6 */
1752                         0x00000018, /* EMC_DLL_XFORM_QUSE7 */
1753                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1754                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1755                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1756                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1757                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1758                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1759                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1760                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1761                         0x00078000, /* EMC_DLL_XFORM_DQ0 */
1762                         0x00078000, /* EMC_DLL_XFORM_DQ1 */
1763                         0x00078000, /* EMC_DLL_XFORM_DQ2 */
1764                         0x00078000, /* EMC_DLL_XFORM_DQ3 */
1765                         0x00100220, /* EMC_XM2CMDPADCTRL */
1766                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
1767                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1768                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
1769                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
1770                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
1771                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
1772                         0x08000068, /* EMC_XM2QUSEPADCTRL */
1773                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
1774                         0x00000802, /* EMC_CTT_TERM_CTRL */
1775                         0x00064000, /* EMC_ZCAL_INTERVAL */
1776                         0x0000004a, /* EMC_ZCAL_WAIT_CNT */
1777                         0x00090009, /* EMC_MRS_WAIT_CNT */
1778                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
1779                         0x00000000, /* EMC_CTT */
1780                         0x00000000, /* EMC_CTT_DURATION */
1781                         0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
1782                         0x00000003, /* MC_EMEM_ARB_CFG */
1783                         0x80000025, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1784                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1785                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1786                         0x00000006, /* MC_EMEM_ARB_TIMING_RC */
1787                         0x00000003, /* MC_EMEM_ARB_TIMING_RAS */
1788                         0x00000005, /* MC_EMEM_ARB_TIMING_FAW */
1789                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1790                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1791                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1792                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
1793                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
1794                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1795                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
1796                         0x02030001, /* MC_EMEM_ARB_DA_TURNS */
1797                         0x00070506, /* MC_EMEM_ARB_DA_COVERS */
1798                         0x71e40a07, /* MC_EMEM_ARB_MISC0 */
1799                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1800                         0x50000000, /* EMC_FBIO_SPARE */
1801                         0xff00ff00, /* EMC_CFG_RSV */
1802                 },
1803                 0x00000013, /* EMC_ZCAL_WAIT_CNT after clock change */
1804                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1805                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
1806                 0x00000000, /* Mode Register 0 */
1807                 0x00010042, /* Mode Register 1 */
1808                 0x00020001, /* Mode Register 2 */
1809         },
1810         {
1811                 0x31,       /* Rev 3.1 */
1812                 533000,     /* SDRAM frequency */
1813                 {
1814                         0x0000001f, /* EMC_RC */
1815                         0x00000045, /* EMC_RFC */
1816                         0x00000016, /* EMC_RAS */
1817                         0x00000009, /* EMC_RP */
1818                         0x00000008, /* EMC_R2W */
1819                         0x00000009, /* EMC_W2R */
1820                         0x00000003, /* EMC_R2P */
1821                         0x0000000d, /* EMC_W2P */
1822                         0x00000009, /* EMC_RD_RCD */
1823                         0x00000009, /* EMC_WR_RCD */
1824                         0x00000005, /* EMC_RRD */
1825                         0x00000003, /* EMC_REXT */
1826                         0x00000000, /* EMC_WEXT */
1827                         0x00000004, /* EMC_WDV */
1828                         0x00000009, /* EMC_QUSE */
1829                         0x00000006, /* EMC_QRST */
1830                         0x0000000c, /* EMC_QSAFE */
1831                         0x00000010, /* EMC_RDV */
1832                         0x000007df, /* EMC_REFRESH */
1833                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1834                         0x000001f7, /* EMC_PRE_REFRESH_REQ_CNT */
1835                         0x00000003, /* EMC_PDEX2WR */
1836                         0x00000003, /* EMC_PDEX2RD */
1837                         0x00000009, /* EMC_PCHG2PDEN */
1838                         0x00000000, /* EMC_ACT2PDEN */
1839                         0x00000001, /* EMC_AR2PDEN */
1840                         0x0000000f, /* EMC_RW2PDEN */
1841                         0x0000004b, /* EMC_TXSR */
1842                         0x0000004b, /* EMC_TXSRDLL */
1843                         0x00000008, /* EMC_TCKE */
1844                         0x0000001b, /* EMC_TFAW */
1845                         0x0000000c, /* EMC_TRPAB */
1846                         0x00000004, /* EMC_TCLKSTABLE */
1847                         0x00000002, /* EMC_TCLKSTOP */
1848                         0x000008aa, /* EMC_TREFBW */
1849                         0x00000000, /* EMC_QUSE_EXTRA */
1850                         0x00000006, /* EMC_FBIO_CFG6 */
1851                         0x00000000, /* EMC_ODT_WRITE */
1852                         0x00000000, /* EMC_ODT_READ */
1853                         0x00006282, /* EMC_FBIO_CFG5 */
1854                         0x00120084, /* EMC_CFG_DIG_DLL */
1855                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1856                         0x00018000, /* EMC_DLL_XFORM_DQS0 */
1857                         0x00018000, /* EMC_DLL_XFORM_DQS1 */
1858                         0x00018000, /* EMC_DLL_XFORM_DQS2 */
1859                         0x00018000, /* EMC_DLL_XFORM_DQS3 */
1860                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
1861                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
1862                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
1863                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
1864                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1865                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1866                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1867                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1868                         0x00000008, /* EMC_DLL_XFORM_QUSE4 */
1869                         0x00000008, /* EMC_DLL_XFORM_QUSE5 */
1870                         0x00000008, /* EMC_DLL_XFORM_QUSE6 */
1871                         0x00000008, /* EMC_DLL_XFORM_QUSE7 */
1872                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1873                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1874                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1875                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1876                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1877                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1878                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1879                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1880                         0x0002c000, /* EMC_DLL_XFORM_DQ0 */
1881                         0x0002c000, /* EMC_DLL_XFORM_DQ1 */
1882                         0x0002c000, /* EMC_DLL_XFORM_DQ2 */
1883                         0x0002c000, /* EMC_DLL_XFORM_DQ3 */
1884                         0x000b0220, /* EMC_XM2CMDPADCTRL */
1885                         0x0800003d, /* EMC_XM2DQSPADCTRL2 */
1886                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1887                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
1888                         0x01f1f408, /* EMC_XM2COMPPADCTRL */
1889                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
1890                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
1891                         0x08000068, /* EMC_XM2QUSEPADCTRL */
1892                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
1893                         0x00000802, /* EMC_CTT_TERM_CTRL */
1894                         0x00064000, /* EMC_ZCAL_INTERVAL */
1895                         0x000000c0, /* EMC_ZCAL_WAIT_CNT */
1896                         0x000e000e, /* EMC_MRS_WAIT_CNT */
1897                         0xa0f10202, /* EMC_AUTO_CAL_CONFIG */
1898                         0x00000000, /* EMC_CTT */
1899                         0x00000000, /* EMC_CTT_DURATION */
1900                         0x800010d9, /* EMC_DYN_SELF_REF_CONTROL */
1901                         0x00000008, /* MC_EMEM_ARB_CFG */
1902                         0x80000060, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1903                         0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
1904                         0x00000004, /* MC_EMEM_ARB_TIMING_RP */
1905                         0x00000010, /* MC_EMEM_ARB_TIMING_RC */
1906                         0x0000000a, /* MC_EMEM_ARB_TIMING_RAS */
1907                         0x0000000d, /* MC_EMEM_ARB_TIMING_FAW */
1908                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
1909                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1910                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1911                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1912                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
1913                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
1914                         0x00000005, /* MC_EMEM_ARB_TIMING_W2R */
1915                         0x05040002, /* MC_EMEM_ARB_DA_TURNS */
1916                         0x00110b10, /* MC_EMEM_ARB_DA_COVERS */
1917                         0x71c81811, /* MC_EMEM_ARB_MISC0 */
1918                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1919                         0xe0000000, /* EMC_FBIO_SPARE */
1920                         0xff00ff88, /* EMC_CFG_RSV */
1921                 },
1922                 0x00000030, /* EMC_ZCAL_WAIT_CNT after clock change */
1923                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1924                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
1925                 0x00000000, /* Mode Register 0 */
1926                 0x000100c2, /* Mode Register 1 */
1927                 0x00020006, /* Mode Register 2 */
1928         },
1929 };
1930
1931 static const struct tegra_emc_table cardhu_emc_tables_edb8132b2ma[] = {
1932         {
1933                 0x31,       /* Rev 3.1 */
1934                 25500,      /* SDRAM frequency */
1935                 {
1936                         0x00000001, /* EMC_RC */
1937                         0x00000003, /* EMC_RFC */
1938                         0x00000002, /* EMC_RAS */
1939                         0x00000002, /* EMC_RP */
1940                         0x00000004, /* EMC_R2W */
1941                         0x00000004, /* EMC_W2R */
1942                         0x00000001, /* EMC_R2P */
1943                         0x00000005, /* EMC_W2P */
1944                         0x00000002, /* EMC_RD_RCD */
1945                         0x00000002, /* EMC_WR_RCD */
1946                         0x00000001, /* EMC_RRD */
1947                         0x00000001, /* EMC_REXT */
1948                         0x00000000, /* EMC_WEXT */
1949                         0x00000001, /* EMC_WDV */
1950                         0x00000003, /* EMC_QUSE */
1951                         0x00000001, /* EMC_QRST */
1952                         0x00000009, /* EMC_QSAFE */
1953                         0x0000000a, /* EMC_RDV */
1954                         0x00000060, /* EMC_REFRESH */
1955                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1956                         0x00000018, /* EMC_PRE_REFRESH_REQ_CNT */
1957                         0x00000001, /* EMC_PDEX2WR */
1958                         0x00000001, /* EMC_PDEX2RD */
1959                         0x00000002, /* EMC_PCHG2PDEN */
1960                         0x00000000, /* EMC_ACT2PDEN */
1961                         0x00000001, /* EMC_AR2PDEN */
1962                         0x00000007, /* EMC_RW2PDEN */
1963                         0x00000004, /* EMC_TXSR */
1964                         0x00000004, /* EMC_TXSRDLL */
1965                         0x00000003, /* EMC_TCKE */
1966                         0x00000008, /* EMC_TFAW */
1967                         0x00000004, /* EMC_TRPAB */
1968                         0x00000004, /* EMC_TCLKSTABLE */
1969                         0x00000002, /* EMC_TCLKSTOP */
1970                         0x0000006b, /* EMC_TREFBW */
1971                         0x00000004, /* EMC_QUSE_EXTRA */
1972                         0x00000006, /* EMC_FBIO_CFG6 */
1973                         0x00000000, /* EMC_ODT_WRITE */
1974                         0x00000000, /* EMC_ODT_READ */
1975                         0x00004282, /* EMC_FBIO_CFG5 */
1976                         0x00780084, /* EMC_CFG_DIG_DLL */
1977                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1978                         0x000a0000, /* EMC_DLL_XFORM_DQS0 */
1979                         0x000a0000, /* EMC_DLL_XFORM_DQS1 */
1980                         0x000a0000, /* EMC_DLL_XFORM_DQS2 */
1981                         0x000a0000, /* EMC_DLL_XFORM_DQS3 */
1982                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
1983                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
1984                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
1985                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
1986                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1987                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1988                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1989                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1990                         0x00000008, /* EMC_DLL_XFORM_QUSE4 */
1991                         0x00000008, /* EMC_DLL_XFORM_QUSE5 */
1992                         0x00000008, /* EMC_DLL_XFORM_QUSE6 */
1993                         0x00000008, /* EMC_DLL_XFORM_QUSE7 */
1994                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1995                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1996                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1997                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1998                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1999                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2000                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2001                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2002                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
2003                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
2004                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
2005                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
2006                         0x00120220, /* EMC_XM2CMDPADCTRL */
2007                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
2008                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2009                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
2010                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
2011                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
2012                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
2013                         0x08000068, /* EMC_XM2QUSEPADCTRL */
2014                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
2015                         0x00000802, /* EMC_CTT_TERM_CTRL */
2016                         0x00064000, /* EMC_ZCAL_INTERVAL */
2017                         0x0000000a, /* EMC_ZCAL_WAIT_CNT */
2018                         0x00090009, /* EMC_MRS_WAIT_CNT */
2019                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
2020                         0x00000000, /* EMC_CTT */
2021                         0x00000000, /* EMC_CTT_DURATION */
2022                         0x800001c5, /* EMC_DYN_SELF_REF_CONTROL */
2023                         0x00020001, /* MC_EMEM_ARB_CFG */
2024                         0x80000008, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2025                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
2026                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
2027                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
2028                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
2029                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
2030                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2031                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2032                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2033                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
2034                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
2035                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
2036                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
2037                         0x02020001, /* MC_EMEM_ARB_DA_TURNS */
2038                         0x00060402, /* MC_EMEM_ARB_DA_COVERS */
2039                         0x73e30303, /* MC_EMEM_ARB_MISC0 */
2040                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2041                         0x50000000, /* EMC_FBIO_SPARE */
2042                         0xff00ff00, /* EMC_CFG_RSV */
2043                 },
2044                 0x00000009, /* EMC_ZCAL_WAIT_CNT after clock change */
2045                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2046                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
2047                 0x00000000, /* Mode Register 0 */
2048                 0x00010022, /* Mode Register 1 */
2049                 0x00020001, /* Mode Register 2 */
2050         },
2051         {
2052                 0x31,       /* Rev 3.1 */
2053                 51000,      /* SDRAM frequency */
2054                 {
2055                         0x00000003, /* EMC_RC */
2056                         0x00000006, /* EMC_RFC */
2057                         0x00000002, /* EMC_RAS */
2058                         0x00000002, /* EMC_RP */
2059                         0x00000004, /* EMC_R2W */
2060                         0x00000004, /* EMC_W2R */
2061                         0x00000001, /* EMC_R2P */
2062                         0x00000005, /* EMC_W2P */
2063                         0x00000002, /* EMC_RD_RCD */
2064                         0x00000002, /* EMC_WR_RCD */
2065                         0x00000001, /* EMC_RRD */
2066                         0x00000001, /* EMC_REXT */
2067                         0x00000000, /* EMC_WEXT */
2068                         0x00000001, /* EMC_WDV */
2069                         0x00000003, /* EMC_QUSE */
2070                         0x00000001, /* EMC_QRST */
2071                         0x00000009, /* EMC_QSAFE */
2072                         0x0000000a, /* EMC_RDV */
2073                         0x000000c0, /* EMC_REFRESH */
2074                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2075                         0x00000030, /* EMC_PRE_REFRESH_REQ_CNT */
2076                         0x00000001, /* EMC_PDEX2WR */
2077                         0x00000001, /* EMC_PDEX2RD */
2078                         0x00000002, /* EMC_PCHG2PDEN */
2079                         0x00000000, /* EMC_ACT2PDEN */
2080                         0x00000001, /* EMC_AR2PDEN */
2081                         0x00000007, /* EMC_RW2PDEN */
2082                         0x00000008, /* EMC_TXSR */
2083                         0x00000008, /* EMC_TXSRDLL */
2084                         0x00000003, /* EMC_TCKE */
2085                         0x00000008, /* EMC_TFAW */
2086                         0x00000004, /* EMC_TRPAB */
2087                         0x00000004, /* EMC_TCLKSTABLE */
2088                         0x00000002, /* EMC_TCLKSTOP */
2089                         0x000000d5, /* EMC_TREFBW */
2090                         0x00000004, /* EMC_QUSE_EXTRA */
2091                         0x00000006, /* EMC_FBIO_CFG6 */
2092                         0x00000000, /* EMC_ODT_WRITE */
2093                         0x00000000, /* EMC_ODT_READ */
2094                         0x00004282, /* EMC_FBIO_CFG5 */
2095                         0x00780084, /* EMC_CFG_DIG_DLL */
2096                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2097                         0x000a0000, /* EMC_DLL_XFORM_DQS0 */
2098                         0x000a0000, /* EMC_DLL_XFORM_DQS1 */
2099                         0x000a0000, /* EMC_DLL_XFORM_DQS2 */
2100                         0x000a0000, /* EMC_DLL_XFORM_DQS3 */
2101                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
2102                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
2103                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
2104                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
2105                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2106                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2107                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2108                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2109                         0x00000018, /* EMC_DLL_XFORM_QUSE4 */
2110                         0x00000018, /* EMC_DLL_XFORM_QUSE5 */
2111                         0x00000018, /* EMC_DLL_XFORM_QUSE6 */
2112                         0x00000018, /* EMC_DLL_XFORM_QUSE7 */
2113                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2114                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2115                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2116                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2117                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2118                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2119                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2120                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2121                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
2122                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
2123                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
2124                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
2125                         0x00120220, /* EMC_XM2CMDPADCTRL */
2126                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
2127                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2128                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
2129                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
2130                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
2131                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
2132                         0x08000068, /* EMC_XM2QUSEPADCTRL */
2133                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
2134                         0x00000802, /* EMC_CTT_TERM_CTRL */
2135                         0x00064000, /* EMC_ZCAL_INTERVAL */
2136                         0x00000013, /* EMC_ZCAL_WAIT_CNT */
2137                         0x00090009, /* EMC_MRS_WAIT_CNT */
2138                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
2139                         0x00000000, /* EMC_CTT */
2140                         0x00000000, /* EMC_CTT_DURATION */
2141                         0x80000287, /* EMC_DYN_SELF_REF_CONTROL */
2142                         0x00010001, /* MC_EMEM_ARB_CFG */
2143                         0x8000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2144                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
2145                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
2146                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
2147                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
2148                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
2149                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2150                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2151                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2152                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
2153                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
2154                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
2155                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
2156                         0x02020001, /* MC_EMEM_ARB_DA_TURNS */
2157                         0x00060402, /* MC_EMEM_ARB_DA_COVERS */
2158                         0x72c30303, /* MC_EMEM_ARB_MISC0 */
2159                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2160                         0x50000000, /* EMC_FBIO_SPARE */
2161                         0xff00ff00, /* EMC_CFG_RSV */
2162                 },
2163                 0x00000009, /* EMC_ZCAL_WAIT_CNT after clock change */
2164                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2165                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
2166                 0x00000000, /* Mode Register 0 */
2167                 0x00010022, /* Mode Register 1 */
2168                 0x00020001, /* Mode Register 2 */
2169         },
2170         {
2171                 0x31,       /* Rev 3.1 */
2172                 102000,     /* SDRAM frequency */
2173                 {
2174                         0x00000006, /* EMC_RC */
2175                         0x0000000d, /* EMC_RFC */
2176                         0x00000004, /* EMC_RAS */
2177                         0x00000002, /* EMC_RP */
2178                         0x00000004, /* EMC_R2W */
2179                         0x00000004, /* EMC_W2R */
2180                         0x00000001, /* EMC_R2P */
2181                         0x00000005, /* EMC_W2P */
2182                         0x00000002, /* EMC_RD_RCD */
2183                         0x00000002, /* EMC_WR_RCD */
2184                         0x00000001, /* EMC_RRD */
2185                         0x00000001, /* EMC_REXT */
2186                         0x00000000, /* EMC_WEXT */
2187                         0x00000001, /* EMC_WDV */
2188                         0x00000003, /* EMC_QUSE */
2189                         0x00000001, /* EMC_QRST */
2190                         0x00000009, /* EMC_QSAFE */
2191                         0x0000000a, /* EMC_RDV */
2192                         0x00000181, /* EMC_REFRESH */
2193                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2194                         0x00000060, /* EMC_PRE_REFRESH_REQ_CNT */
2195                         0x00000001, /* EMC_PDEX2WR */
2196                         0x00000001, /* EMC_PDEX2RD */
2197                         0x00000002, /* EMC_PCHG2PDEN */
2198                         0x00000000, /* EMC_ACT2PDEN */
2199                         0x00000001, /* EMC_AR2PDEN */
2200                         0x00000007, /* EMC_RW2PDEN */
2201                         0x0000000f, /* EMC_TXSR */
2202                         0x0000000f, /* EMC_TXSRDLL */
2203                         0x00000003, /* EMC_TCKE */
2204                         0x00000008, /* EMC_TFAW */
2205                         0x00000004, /* EMC_TRPAB */
2206                         0x00000004, /* EMC_TCLKSTABLE */
2207                         0x00000002, /* EMC_TCLKSTOP */
2208                         0x000001a9, /* EMC_TREFBW */
2209                         0x00000004, /* EMC_QUSE_EXTRA */
2210                         0x00000006, /* EMC_FBIO_CFG6 */
2211                         0x00000000, /* EMC_ODT_WRITE */
2212                         0x00000000, /* EMC_ODT_READ */
2213                         0x00004282, /* EMC_FBIO_CFG5 */
2214                         0x00780084, /* EMC_CFG_DIG_DLL */
2215                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2216                         0x000a0000, /* EMC_DLL_XFORM_DQS0 */
2217                         0x000a0000, /* EMC_DLL_XFORM_DQS1 */
2218                         0x000a0000, /* EMC_DLL_XFORM_DQS2 */
2219                         0x000a0000, /* EMC_DLL_XFORM_DQS3 */
2220                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
2221                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
2222                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
2223                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
2224                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2225                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2226                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2227                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2228                         0x00000008, /* EMC_DLL_XFORM_QUSE4 */
2229                         0x00000008, /* EMC_DLL_XFORM_QUSE5 */
2230                         0x00000008, /* EMC_DLL_XFORM_QUSE6 */
2231                         0x00000008, /* EMC_DLL_XFORM_QUSE7 */
2232                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2233                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2234                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2235                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2236                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2237                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2238                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2239                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2240                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
2241                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
2242                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
2243                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
2244                         0x00120220, /* EMC_XM2CMDPADCTRL */
2245                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
2246                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2247                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
2248                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
2249                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
2250                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
2251                         0x08000068, /* EMC_XM2QUSEPADCTRL */
2252                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
2253                         0x00000802, /* EMC_CTT_TERM_CTRL */
2254                         0x00064000, /* EMC_ZCAL_INTERVAL */
2255                         0x00000025, /* EMC_ZCAL_WAIT_CNT */
2256                         0x00090009, /* EMC_MRS_WAIT_CNT */
2257                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
2258                         0x00000000, /* EMC_CTT */
2259                         0x00000000, /* EMC_CTT_DURATION */
2260                         0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
2261                         0x00000001, /* MC_EMEM_ARB_CFG */
2262                         0x80000013, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2263                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
2264                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
2265                         0x00000003, /* MC_EMEM_ARB_TIMING_RC */
2266                         0x00000001, /* MC_EMEM_ARB_TIMING_RAS */
2267                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
2268                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2269                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2270                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2271                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
2272                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
2273                         0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
2274                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
2275                         0x02020001, /* MC_EMEM_ARB_DA_TURNS */
2276                         0x00060403, /* MC_EMEM_ARB_DA_COVERS */
2277                         0x72430504, /* MC_EMEM_ARB_MISC0 */
2278                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2279                         0x50000000, /* EMC_FBIO_SPARE */
2280                         0xff00ff00, /* EMC_CFG_RSV */
2281                 },
2282                 0x0000000a, /* EMC_ZCAL_WAIT_CNT after clock change */
2283                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2284                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
2285                 0x00000000, /* Mode Register 0 */
2286                 0x00010022, /* Mode Register 1 */
2287                 0x00020001, /* Mode Register 2 */
2288         },
2289         {
2290                 0x31,       /* Rev 3.1 */
2291                 204000,     /* SDRAM frequency */
2292                 {
2293                         0x0000000c, /* EMC_RC */
2294                         0x0000001a, /* EMC_RFC */
2295                         0x00000008, /* EMC_RAS */
2296                         0x00000003, /* EMC_RP */
2297                         0x00000005, /* EMC_R2W */
2298                         0x00000004, /* EMC_W2R */
2299                         0x00000001, /* EMC_R2P */
2300                         0x00000006, /* EMC_W2P */
2301                         0x00000003, /* EMC_RD_RCD */
2302                         0x00000003, /* EMC_WR_RCD */
2303                         0x00000002, /* EMC_RRD */
2304                         0x00000002, /* EMC_REXT */
2305                         0x00000000, /* EMC_WEXT */
2306                         0x00000001, /* EMC_WDV */
2307                         0x00000004, /* EMC_QUSE */
2308                         0x00000001, /* EMC_QRST */
2309                         0x0000000b, /* EMC_QSAFE */
2310                         0x0000000a, /* EMC_RDV */
2311                         0x00000303, /* EMC_REFRESH */
2312                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2313                         0x000000c0, /* EMC_PRE_REFRESH_REQ_CNT */
2314                         0x00000001, /* EMC_PDEX2WR */
2315                         0x00000001, /* EMC_PDEX2RD */
2316                         0x00000003, /* EMC_PCHG2PDEN */
2317                         0x00000000, /* EMC_ACT2PDEN */
2318                         0x00000001, /* EMC_AR2PDEN */
2319                         0x00000007, /* EMC_RW2PDEN */
2320                         0x0000001d, /* EMC_TXSR */
2321                         0x0000001d, /* EMC_TXSRDLL */
2322                         0x00000004, /* EMC_TCKE */
2323                         0x0000000b, /* EMC_TFAW */
2324                         0x00000005, /* EMC_TRPAB */
2325                         0x00000004, /* EMC_TCLKSTABLE */
2326                         0x00000002, /* EMC_TCLKSTOP */
2327                         0x00000351, /* EMC_TREFBW */
2328                         0x00000005, /* EMC_QUSE_EXTRA */
2329                         0x00000004, /* EMC_FBIO_CFG6 */
2330                         0x00000000, /* EMC_ODT_WRITE */
2331                         0x00000000, /* EMC_ODT_READ */
2332                         0x00004282, /* EMC_FBIO_CFG5 */
2333                         0x00440084, /* EMC_CFG_DIG_DLL */
2334                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2335                         0x00066000, /* EMC_DLL_XFORM_DQS0 */
2336                         0x00066000, /* EMC_DLL_XFORM_DQS1 */
2337                         0x00066000, /* EMC_DLL_XFORM_DQS2 */
2338                         0x00066000, /* EMC_DLL_XFORM_DQS3 */
2339                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
2340                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
2341                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
2342                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
2343                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2344                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2345                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2346                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2347                         0x00000018, /* EMC_DLL_XFORM_QUSE4 */
2348                         0x00000018, /* EMC_DLL_XFORM_QUSE5 */
2349                         0x00000018, /* EMC_DLL_XFORM_QUSE6 */
2350                         0x00000018, /* EMC_DLL_XFORM_QUSE7 */
2351                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2352                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2353                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2354                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2355                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2356                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2357                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2358                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2359                         0x00078000, /* EMC_DLL_XFORM_DQ0 */
2360                         0x00078000, /* EMC_DLL_XFORM_DQ1 */
2361                         0x00078000, /* EMC_DLL_XFORM_DQ2 */
2362                         0x00078000, /* EMC_DLL_XFORM_DQ3 */
2363                         0x000d0220, /* EMC_XM2CMDPADCTRL */
2364                         0x0800201c, /* EMC_XM2DQSPADCTRL2 */
2365                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2366                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
2367                         0x01f1f008, /* EMC_XM2COMPPADCTRL */
2368                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
2369                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
2370                         0x08000068, /* EMC_XM2QUSEPADCTRL */
2371                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
2372                         0x00000802, /* EMC_CTT_TERM_CTRL */
2373                         0x00064000, /* EMC_ZCAL_INTERVAL */
2374                         0x0000004a, /* EMC_ZCAL_WAIT_CNT */
2375                         0x00090009, /* EMC_MRS_WAIT_CNT */
2376                         0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
2377                         0x00000000, /* EMC_CTT */
2378                         0x00000000, /* EMC_CTT_DURATION */
2379                         0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
2380                         0x00000003, /* MC_EMEM_ARB_CFG */
2381                         0x80000025, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2382                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
2383                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
2384                         0x00000006, /* MC_EMEM_ARB_TIMING_RC */
2385                         0x00000003, /* MC_EMEM_ARB_TIMING_RAS */
2386                         0x00000005, /* MC_EMEM_ARB_TIMING_FAW */
2387                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2388                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2389                         0x00000004, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2390                         0x00000001, /* MC_EMEM_ARB_TIMING_R2R */
2391                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
2392                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
2393                         0x00000002, /* MC_EMEM_ARB_TIMING_W2R */
2394                         0x02030001, /* MC_EMEM_ARB_DA_TURNS */
2395                         0x00070506, /* MC_EMEM_ARB_DA_COVERS */
2396                         0x71e40a07, /* MC_EMEM_ARB_MISC0 */
2397                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2398                         0xd0000000, /* EMC_FBIO_SPARE */
2399                         0xff00ff00, /* EMC_CFG_RSV */
2400                 },
2401                 0x00000013, /* EMC_ZCAL_WAIT_CNT after clock change */
2402                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2403                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
2404                 0x00000000, /* Mode Register 0 */
2405                 0x00010042, /* Mode Register 1 */
2406                 0x00020001, /* Mode Register 2 */
2407         },
2408         {
2409                 0x31,       /* Rev 3.1 */
2410                 533000,     /* SDRAM frequency */
2411                 {
2412                         0x0000001f, /* EMC_RC */
2413                         0x00000045, /* EMC_RFC */
2414                         0x00000016, /* EMC_RAS */
2415                         0x00000009, /* EMC_RP */
2416                         0x00000008, /* EMC_R2W */
2417                         0x00000009, /* EMC_W2R */
2418                         0x00000003, /* EMC_R2P */
2419                         0x0000000d, /* EMC_W2P */
2420                         0x00000009, /* EMC_RD_RCD */
2421                         0x00000009, /* EMC_WR_RCD */
2422                         0x00000005, /* EMC_RRD */
2423                         0x00000003, /* EMC_REXT */
2424                         0x00000000, /* EMC_WEXT */
2425                         0x00000004, /* EMC_WDV */
2426                         0x00000009, /* EMC_QUSE */
2427                         0x00000006, /* EMC_QRST */
2428                         0x0000000c, /* EMC_QSAFE */
2429                         0x00000010, /* EMC_RDV */
2430                         0x000007df, /* EMC_REFRESH */
2431                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2432                         0x000001f7, /* EMC_PRE_REFRESH_REQ_CNT */
2433                         0x00000003, /* EMC_PDEX2WR */
2434                         0x00000003, /* EMC_PDEX2RD */
2435                         0x00000009, /* EMC_PCHG2PDEN */
2436                         0x00000000, /* EMC_ACT2PDEN */
2437                         0x00000001, /* EMC_AR2PDEN */
2438                         0x0000000f, /* EMC_RW2PDEN */
2439                         0x0000004b, /* EMC_TXSR */
2440                         0x0000004b, /* EMC_TXSRDLL */
2441                         0x00000008, /* EMC_TCKE */
2442                         0x0000001b, /* EMC_TFAW */
2443                         0x0000000c, /* EMC_TRPAB */
2444                         0x00000004, /* EMC_TCLKSTABLE */
2445                         0x00000002, /* EMC_TCLKSTOP */
2446                         0x000008aa, /* EMC_TREFBW */
2447                         0x00000000, /* EMC_QUSE_EXTRA */
2448                         0x00000006, /* EMC_FBIO_CFG6 */
2449                         0x00000000, /* EMC_ODT_WRITE */
2450                         0x00000000, /* EMC_ODT_READ */
2451                         0x00006282, /* EMC_FBIO_CFG5 */
2452                         0x00120084, /* EMC_CFG_DIG_DLL */
2453                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2454                         0x00018000, /* EMC_DLL_XFORM_DQS0 */
2455                         0x00018000, /* EMC_DLL_XFORM_DQS1 */
2456                         0x00018000, /* EMC_DLL_XFORM_DQS2 */
2457                         0x00018000, /* EMC_DLL_XFORM_DQS3 */
2458                         0x00000010, /* EMC_DLL_XFORM_DQS4 */
2459                         0x00000010, /* EMC_DLL_XFORM_DQS5 */
2460                         0x00000010, /* EMC_DLL_XFORM_DQS6 */
2461                         0x00000010, /* EMC_DLL_XFORM_DQS7 */
2462                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2463                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2464                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2465                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2466                         0x00000008, /* EMC_DLL_XFORM_QUSE4 */
2467                         0x00000008, /* EMC_DLL_XFORM_QUSE5 */
2468                         0x00000008, /* EMC_DLL_XFORM_QUSE6 */
2469                         0x00000008, /* EMC_DLL_XFORM_QUSE7 */
2470                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2471                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2472                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2473                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2474                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2475                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2476                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2477                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2478                         0x00028000, /* EMC_DLL_XFORM_DQ0 */
2479                         0x00028000, /* EMC_DLL_XFORM_DQ1 */
2480                         0x00028000, /* EMC_DLL_XFORM_DQ2 */
2481                         0x00028000, /* EMC_DLL_XFORM_DQ3 */
2482                         0x00070220, /* EMC_XM2CMDPADCTRL */
2483                         0x0600003d, /* EMC_XM2DQSPADCTRL2 */
2484                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2485                         0x77ffc004, /* EMC_XM2CLKPADCTRL */
2486                         0x01f1f408, /* EMC_XM2COMPPADCTRL */
2487                         0x00000000, /* EMC_XM2VTTGENPADCTRL */
2488                         0x00000007, /* EMC_XM2VTTGENPADCTRL2 */
2489                         0x08000068, /* EMC_XM2QUSEPADCTRL */
2490                         0x08000000, /* EMC_XM2DQSPADCTRL3 */
2491                         0x00000802, /* EMC_CTT_TERM_CTRL */
2492                         0x00064000, /* EMC_ZCAL_INTERVAL */
2493                         0x000000c0, /* EMC_ZCAL_WAIT_CNT */
2494                         0x000e000e, /* EMC_MRS_WAIT_CNT */
2495                         0xa0f10202, /* EMC_AUTO_CAL_CONFIG */
2496                         0x00000000, /* EMC_CTT */
2497                         0x00000000, /* EMC_CTT_DURATION */
2498                         0x800010d9, /* EMC_DYN_SELF_REF_CONTROL */
2499                         0x00000008, /* MC_EMEM_ARB_CFG */
2500                         0x80000060, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2501                         0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
2502                         0x00000004, /* MC_EMEM_ARB_TIMING_RP */
2503                         0x00000010, /* MC_EMEM_ARB_TIMING_RC */
2504                         0x0000000a, /* MC_EMEM_ARB_TIMING_RAS */
2505                         0x0000000d, /* MC_EMEM_ARB_TIMING_FAW */
2506                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
2507                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2508                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2509                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2510                         0x00000000, /* MC_EMEM_ARB_TIMING_W2W */
2511                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
2512                         0x00000005, /* MC_EMEM_ARB_TIMING_W2R */
2513                         0x05040002, /* MC_EMEM_ARB_DA_TURNS */
2514                         0x00110b10, /* MC_EMEM_ARB_DA_COVERS */
2515                         0x71c81811, /* MC_EMEM_ARB_MISC0 */
2516                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2517                         0x60000000, /* EMC_FBIO_SPARE */
2518                         0xff00ff88, /* EMC_CFG_RSV */
2519                 },
2520                 0x00000030, /* EMC_ZCAL_WAIT_CNT after clock change */
2521                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2522                 0x00000001, /* EMC_CFG.PERIODIC_QRST */
2523                 0x00000000, /* Mode Register 0 */
2524                 0x000100c2, /* Mode Register 1 */
2525                 0x00020006, /* Mode Register 2 */
2526         },
2527 };
2528
2529 int cardhu_emc_init(void)
2530 {
2531         struct board_info board;
2532
2533         tegra_get_board_info(&board);
2534
2535         switch (board.board_id) {
2536         case BOARD_PM269:
2537         case BOARD_PM305:
2538                 if (MEMORY_TYPE(board.sku) == SKU_MEMORY_ELPIDA)
2539                         tegra_init_emc(cardhu_emc_tables_edb8132b2ma,
2540                                         ARRAY_SIZE(cardhu_emc_tables_edb8132b2ma));
2541                 else
2542                         tegra_init_emc(cardhu_emc_tables_k4p8g304eb,
2543                                         ARRAY_SIZE(cardhu_emc_tables_k4p8g304eb));
2544                 break;
2545         default:
2546                 if (tegra_get_revision() == TEGRA_REVISION_A01)
2547                         tegra_init_emc(cardhu_emc_tables_h5tc2g,
2548                                 ARRAY_SIZE(cardhu_emc_tables_h5tc2g));
2549                 else if (MEMORY_TYPE(board.sku) == SKU_MEMORY_CARDHU_1GB_1R)
2550                         tegra_init_emc(cardhu_emc_tables_h5tc2g_a2,
2551                                 ARRAY_SIZE(cardhu_emc_tables_h5tc2g_a2));
2552                 break;
2553         }
2554
2555         return 0;
2556 }