arch/arm/mach-s3c6400/include/mach/map.h

   1 /* linux/arch/arm/mach-s3c6400/include/mach/map.h
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      http://armlinux.simtec.co.uk/
   6  *      Ben Dooks <ben@simtec.co.uk>
   7  *
   8  * S3C64XX - Memory map definitions
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #ifndef __ASM_ARCH_MAP_H
  16 #define __ASM_ARCH_MAP_H __FILE__
  17
  18 #include <plat/map-base.h>
  19
  20 /* HSMMC units */
  21 #define S3C64XX_PA_HSMMC(x)     (0x7C200000 + ((x) * 0x100000))
  22 #define S3C64XX_PA_HSMMC0       S3C64XX_PA_HSMMC(0)
  23 #define S3C64XX_PA_HSMMC1       S3C64XX_PA_HSMMC(1)
  24 #define S3C64XX_PA_HSMMC2       S3C64XX_PA_HSMMC(2)
  25
  26 #define S3C_PA_UART             (0x7F005000)
  27 #define S3C_PA_UART0            (S3C_PA_UART + 0x00)
  28 #define S3C_PA_UART1            (S3C_PA_UART + 0x400)
  29 #define S3C_PA_UART2            (S3C_PA_UART + 0x800)
  30 #define S3C_PA_UART3            (S3C_PA_UART + 0xC00)
  31 #define S3C_UART_OFFSET         (0x400)
  32
  33 /* See notes on UART VA mapping in debug-macro.S */
  34 #define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
  35
  36 #define S3C_VA_UART0            S3C_VA_UARTx(0)
  37 #define S3C_VA_UART1            S3C_VA_UARTx(1)
  38 #define S3C_VA_UART2            S3C_VA_UARTx(2)
  39 #define S3C_VA_UART3            S3C_VA_UARTx(3)
  40
  41 #define S3C64XX_PA_NAND         (0x70200000)
  42 #define S3C64XX_PA_FB           (0x77100000)
  43 #define S3C64XX_PA_USB_HSOTG    (0x7C000000)
  44 #define S3C64XX_PA_WATCHDOG     (0x7E004000)
  45 #define S3C64XX_PA_SYSCON       (0x7E00F000)
  46 #define S3C64XX_PA_AC97         (0x7F001000)
  47 #define S3C64XX_PA_IIS0         (0x7F002000)
  48 #define S3C64XX_PA_IIS1         (0x7F003000)
  49 #define S3C64XX_PA_TIMER        (0x7F006000)
  50 #define S3C64XX_PA_IIC0         (0x7F004000)
  51 #define S3C64XX_PA_PCM0         (0x7F009000)
  52 #define S3C64XX_PA_PCM1         (0x7F00A000)
  53 #define S3C64XX_PA_IISV4        (0x7F00D000)
  54 #define S3C64XX_PA_IIC1         (0x7F00F000)
  55
  56 #define S3C64XX_PA_GPIO         (0x7F008000)
  57 #define S3C64XX_VA_GPIO         S3C_ADDR_CPU(0x00000000)
  58 #define S3C64XX_SZ_GPIO         SZ_4K
  59
  60 #define S3C64XX_PA_SDRAM        (0x50000000)
  61 #define S3C64XX_PA_VIC0         (0x71200000)
  62 #define S3C64XX_PA_VIC1         (0x71300000)
  63
  64 #define S3C64XX_PA_MODEM        (0x74108000)
  65 #define S3C64XX_VA_MODEM        S3C_ADDR_CPU(0x00100000)
  66
  67 #define S3C64XX_PA_USBHOST      (0x74300000)
  68
  69 #define S3C64XX_PA_USB_HSPHY    (0x7C100000)
  70 #define S3C64XX_VA_USB_HSPHY    S3C_ADDR_CPU(0x00200000)
  71
  72 /* place VICs close together */
  73 #define S3C_VA_VIC0             (S3C_VA_IRQ + 0x00)
  74 #define S3C_VA_VIC1             (S3C_VA_IRQ + 0x10000)
  75
  76 /* compatibiltiy defines. */
  77 #define S3C_PA_TIMER            S3C64XX_PA_TIMER
  78 #define S3C_PA_HSMMC0           S3C64XX_PA_HSMMC0
  79 #define S3C_PA_HSMMC1           S3C64XX_PA_HSMMC1
  80 #define S3C_PA_HSMMC2           S3C64XX_PA_HSMMC2
  81 #define S3C_PA_IIC              S3C64XX_PA_IIC0
  82 #define S3C_PA_IIC1             S3C64XX_PA_IIC1
  83 #define S3C_PA_NAND             S3C64XX_PA_NAND
  84 #define S3C_PA_FB               S3C64XX_PA_FB
  85 #define S3C_PA_USBHOST          S3C64XX_PA_USBHOST
  86 #define S3C_PA_USB_HSOTG        S3C64XX_PA_USB_HSOTG
  87 #define S3C_VA_USB_HSPHY        S3C64XX_VA_USB_HSPHY
  88
  89 #endif /* __ASM_ARCH_6400_MAP_H */