[ARM] S3C24XX: Move files out of include/asm-arm/plat-s3c*
[linux-2.6.git] / arch / arm / mach-s3c2410 / mach-qt2410.c
1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
2  *
3  * Copyright (C) 2006 by OpenMoko, Inc.
4  * Author: Harald Welte <laforge@openmoko.org>
5  * All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  *
22  */
23
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/sysdev.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_core.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/spi_bitbang.h>
35
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand_ecc.h>
39 #include <linux/mtd/partitions.h>
40
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/irq.h>
44
45 #include <mach/hardware.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/mach-types.h>
49
50 #include <mach/regs-gpio.h>
51 #include <mach/leds-gpio.h>
52 #include <plat/regs-serial.h>
53 #include <mach/fb.h>
54 #include <asm/plat-s3c/nand.h>
55 #include <asm/plat-s3c24xx/udc.h>
56 #include <mach/spi.h>
57 #include <mach/spi-gpio.h>
58
59 #include <asm/plat-s3c24xx/common-smdk.h>
60 #include <plat/devs.h>
61 #include <plat/cpu.h>
62 #include <plat/pm.h>
63
64 static struct map_desc qt2410_iodesc[] __initdata = {
65         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
66 };
67
68 #define UCON S3C2410_UCON_DEFAULT
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
71
72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
73         [0] = {
74                 .hwport      = 0,
75                 .flags       = 0,
76                 .ucon        = UCON,
77                 .ulcon       = ULCON,
78                 .ufcon       = UFCON,
79         },
80         [1] = {
81                 .hwport      = 1,
82                 .flags       = 0,
83                 .ucon        = UCON,
84                 .ulcon       = ULCON,
85                 .ufcon       = UFCON,
86         },
87         [2] = {
88                 .hwport      = 2,
89                 .flags       = 0,
90                 .ucon        = UCON,
91                 .ulcon       = ULCON,
92                 .ufcon       = UFCON,
93         }
94 };
95
96 /* LCD driver info */
97
98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
99         {
100                 /* Configuration for 640x480 SHARP LQ080V3DG01 */
101                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
102                            S3C2410_LCDCON5_INVVLINE |
103                            S3C2410_LCDCON5_INVVFRAME |
104                            S3C2410_LCDCON5_PWREN |
105                            S3C2410_LCDCON5_HWSWP,
106
107                 .type           = S3C2410_LCDCON1_TFT,
108                 .width          = 640,
109                 .height         = 480,
110
111                 .pixclock       = 40000, /* HCLK/4 */
112                 .xres           = 640,
113                 .yres           = 480,
114                 .bpp            = 16,
115                 .left_margin    = 44,
116                 .right_margin   = 116,
117                 .hsync_len      = 96,
118                 .upper_margin   = 19,
119                 .lower_margin   = 11,
120                 .vsync_len      = 15,
121         },
122         {
123                 /* Configuration for 480x640 toppoly TD028TTEC1 */
124                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
125                            S3C2410_LCDCON5_INVVLINE |
126                            S3C2410_LCDCON5_INVVFRAME |
127                            S3C2410_LCDCON5_PWREN |
128                            S3C2410_LCDCON5_HWSWP,
129
130                 .type           = S3C2410_LCDCON1_TFT,
131                 .width          = 480,
132                 .height         = 640,
133                 .pixclock       = 40000, /* HCLK/4 */
134                 .xres           = 480,
135                 .yres           = 640,
136                 .bpp            = 16,
137                 .left_margin    = 8,
138                 .right_margin   = 24,
139                 .hsync_len      = 8,
140                 .upper_margin   = 2,
141                 .lower_margin   = 4,
142                 .vsync_len      = 2,
143         },
144         {
145                 /* Config for 240x320 LCD */
146                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
147                            S3C2410_LCDCON5_INVVLINE |
148                            S3C2410_LCDCON5_INVVFRAME |
149                            S3C2410_LCDCON5_PWREN |
150                            S3C2410_LCDCON5_HWSWP,
151
152                 .type           = S3C2410_LCDCON1_TFT,
153                 .width          = 240,
154                 .height         = 320,
155                 .pixclock       = 100000, /* HCLK/10 */
156                 .xres           = 240,
157                 .yres           = 320,
158                 .bpp            = 16,
159                 .left_margin    = 13,
160                 .right_margin   = 8,
161                 .hsync_len      = 4,
162                 .upper_margin   = 2,
163                 .lower_margin   = 7,
164                 .vsync_len      = 4,
165         },
166 };
167
168
169 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
170         .displays       = qt2410_lcd_cfg,
171         .num_displays   = ARRAY_SIZE(qt2410_lcd_cfg),
172         .default_display = 0,
173
174         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
175 };
176
177 /* CS8900 */
178
179 static struct resource qt2410_cs89x0_resources[] = {
180         [0] = {
181                 .start  = 0x19000000,
182                 .end    = 0x19000000 + 16,
183                 .flags  = IORESOURCE_MEM,
184         },
185         [1] = {
186                 .start  = IRQ_EINT9,
187                 .end    = IRQ_EINT9,
188                 .flags  = IORESOURCE_IRQ,
189         },
190 };
191
192 static struct platform_device qt2410_cs89x0 = {
193         .name           = "cirrus-cs89x0",
194         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
195         .resource       = qt2410_cs89x0_resources,
196 };
197
198 /* LED */
199
200 static struct s3c24xx_led_platdata qt2410_pdata_led = {
201         .gpio           = S3C2410_GPB0,
202         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
203         .name           = "led",
204         .def_trigger    = "timer",
205 };
206
207 static struct platform_device qt2410_led = {
208         .name           = "s3c24xx_led",
209         .id             = 0,
210         .dev            = {
211                 .platform_data = &qt2410_pdata_led,
212         },
213 };
214
215 /* SPI */
216
217 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
218 {
219         switch (cs) {
220         case BITBANG_CS_ACTIVE:
221                 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
222                 break;
223         case BITBANG_CS_INACTIVE:
224                 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
225                 break;
226         }
227 }
228
229 static struct s3c2410_spigpio_info spi_gpio_cfg = {
230         .pin_clk        = S3C2410_GPG7,
231         .pin_mosi       = S3C2410_GPG6,
232         .pin_miso       = S3C2410_GPG5,
233         .chip_select    = &spi_gpio_cs,
234 };
235
236
237 static struct platform_device qt2410_spi = {
238         .name             = "s3c24xx-spi-gpio",
239         .id               = 1,
240         .dev = {
241                 .platform_data = &spi_gpio_cfg,
242         },
243 };
244
245 /* Board devices */
246
247 static struct platform_device *qt2410_devices[] __initdata = {
248         &s3c_device_usb,
249         &s3c_device_lcd,
250         &s3c_device_wdt,
251         &s3c_device_i2c,
252         &s3c_device_iis,
253         &s3c_device_sdi,
254         &s3c_device_usbgadget,
255         &qt2410_spi,
256         &qt2410_cs89x0,
257         &qt2410_led,
258 };
259
260 static struct mtd_partition qt2410_nand_part[] = {
261         [0] = {
262                 .name   = "U-Boot",
263                 .size   = 0x30000,
264                 .offset = 0,
265         },
266         [1] = {
267                 .name   = "U-Boot environment",
268                 .offset = 0x30000,
269                 .size   = 0x4000,
270         },
271         [2] = {
272                 .name   = "kernel",
273                 .offset = 0x34000,
274                 .size   = SZ_2M,
275         },
276         [3] = {
277                 .name   = "initrd",
278                 .offset = 0x234000,
279                 .size   = SZ_4M,
280         },
281         [4] = {
282                 .name   = "jffs2",
283                 .offset = 0x634000,
284                 .size   = 0x39cc000,
285         },
286 };
287
288 static struct s3c2410_nand_set qt2410_nand_sets[] = {
289         [0] = {
290                 .name           = "NAND",
291                 .nr_chips       = 1,
292                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
293                 .partitions     = qt2410_nand_part,
294         },
295 };
296
297 /* choose a set of timings which should suit most 512Mbit
298  * chips and beyond.
299  */
300
301 static struct s3c2410_platform_nand qt2410_nand_info = {
302         .tacls          = 20,
303         .twrph0         = 60,
304         .twrph1         = 20,
305         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
306         .sets           = qt2410_nand_sets,
307 };
308
309 /* UDC */
310
311 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
312 };
313
314 static char tft_type = 's';
315
316 static int __init qt2410_tft_setup(char *str)
317 {
318         tft_type = str[0];
319         return 1;
320 }
321
322 __setup("tft=", qt2410_tft_setup);
323
324 static void __init qt2410_map_io(void)
325 {
326         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
327         s3c24xx_init_clocks(12*1000*1000);
328         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
329 }
330
331 static void __init qt2410_machine_init(void)
332 {
333         s3c_device_nand.dev.platform_data = &qt2410_nand_info;
334
335         switch (tft_type) {
336         case 'p': /* production */
337                 qt2410_fb_info.default_display = 1;
338                 break;
339         case 'b': /* big */
340                 qt2410_fb_info.default_display = 0;
341                 break;
342         case 's': /* small */
343         default:
344                 qt2410_fb_info.default_display = 2;
345                 break;
346         }
347         s3c24xx_fb_set_platdata(&qt2410_fb_info);
348
349         s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
350         s3c2410_gpio_setpin(S3C2410_GPB0, 1);
351
352         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
353
354         s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
355
356         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
357         s3c2410_pm_init();
358 }
359
360 MACHINE_START(QT2410, "QT2410")
361         .phys_io        = S3C2410_PA_UART,
362         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
363         .boot_params    = S3C2410_SDRAM_PA + 0x100,
364         .map_io         = qt2410_map_io,
365         .init_irq       = s3c24xx_init_irq,
366         .init_machine   = qt2410_machine_init,
367         .timer          = &s3c24xx_timer,
368 MACHINE_END
369
370