sh: Convert sh to use read/update_persistent_clock
[linux-2.6.git] / arch / arm / mach-s3c2410 / mach-qt2410.c
1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
2  *
3  * Copyright (C) 2006 by OpenMoko, Inc.
4  * Author: Harald Welte <laforge@openmoko.org>
5  * All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  *
22  */
23
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/gpio.h>
31 #include <linux/sysdev.h>
32 #include <linux/platform_device.h>
33 #include <linux/serial_core.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/spi_bitbang.h>
36 #include <linux/io.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/nand.h>
39 #include <linux/mtd/nand_ecc.h>
40 #include <linux/mtd/partitions.h>
41
42 #include <asm/mach/arch.h>
43 #include <asm/mach/map.h>
44 #include <asm/mach/irq.h>
45
46 #include <mach/hardware.h>
47 #include <asm/irq.h>
48 #include <asm/mach-types.h>
49
50 #include <mach/regs-gpio.h>
51 #include <mach/leds-gpio.h>
52 #include <plat/regs-serial.h>
53 #include <mach/fb.h>
54 #include <plat/nand.h>
55 #include <plat/udc.h>
56 #include <mach/spi.h>
57 #include <mach/spi-gpio.h>
58 #include <plat/iic.h>
59
60 #include <plat/common-smdk.h>
61 #include <plat/devs.h>
62 #include <plat/cpu.h>
63 #include <plat/pm.h>
64
65 static struct map_desc qt2410_iodesc[] __initdata = {
66         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
67 };
68
69 #define UCON S3C2410_UCON_DEFAULT
70 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
71 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
72
73 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
74         [0] = {
75                 .hwport      = 0,
76                 .flags       = 0,
77                 .ucon        = UCON,
78                 .ulcon       = ULCON,
79                 .ufcon       = UFCON,
80         },
81         [1] = {
82                 .hwport      = 1,
83                 .flags       = 0,
84                 .ucon        = UCON,
85                 .ulcon       = ULCON,
86                 .ufcon       = UFCON,
87         },
88         [2] = {
89                 .hwport      = 2,
90                 .flags       = 0,
91                 .ucon        = UCON,
92                 .ulcon       = ULCON,
93                 .ufcon       = UFCON,
94         }
95 };
96
97 /* LCD driver info */
98
99 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
100         {
101                 /* Configuration for 640x480 SHARP LQ080V3DG01 */
102                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
103                            S3C2410_LCDCON5_INVVLINE |
104                            S3C2410_LCDCON5_INVVFRAME |
105                            S3C2410_LCDCON5_PWREN |
106                            S3C2410_LCDCON5_HWSWP,
107
108                 .type           = S3C2410_LCDCON1_TFT,
109                 .width          = 640,
110                 .height         = 480,
111
112                 .pixclock       = 40000, /* HCLK/4 */
113                 .xres           = 640,
114                 .yres           = 480,
115                 .bpp            = 16,
116                 .left_margin    = 44,
117                 .right_margin   = 116,
118                 .hsync_len      = 96,
119                 .upper_margin   = 19,
120                 .lower_margin   = 11,
121                 .vsync_len      = 15,
122         },
123         {
124                 /* Configuration for 480x640 toppoly TD028TTEC1 */
125                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
126                            S3C2410_LCDCON5_INVVLINE |
127                            S3C2410_LCDCON5_INVVFRAME |
128                            S3C2410_LCDCON5_PWREN |
129                            S3C2410_LCDCON5_HWSWP,
130
131                 .type           = S3C2410_LCDCON1_TFT,
132                 .width          = 480,
133                 .height         = 640,
134                 .pixclock       = 40000, /* HCLK/4 */
135                 .xres           = 480,
136                 .yres           = 640,
137                 .bpp            = 16,
138                 .left_margin    = 8,
139                 .right_margin   = 24,
140                 .hsync_len      = 8,
141                 .upper_margin   = 2,
142                 .lower_margin   = 4,
143                 .vsync_len      = 2,
144         },
145         {
146                 /* Config for 240x320 LCD */
147                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
148                            S3C2410_LCDCON5_INVVLINE |
149                            S3C2410_LCDCON5_INVVFRAME |
150                            S3C2410_LCDCON5_PWREN |
151                            S3C2410_LCDCON5_HWSWP,
152
153                 .type           = S3C2410_LCDCON1_TFT,
154                 .width          = 240,
155                 .height         = 320,
156                 .pixclock       = 100000, /* HCLK/10 */
157                 .xres           = 240,
158                 .yres           = 320,
159                 .bpp            = 16,
160                 .left_margin    = 13,
161                 .right_margin   = 8,
162                 .hsync_len      = 4,
163                 .upper_margin   = 2,
164                 .lower_margin   = 7,
165                 .vsync_len      = 4,
166         },
167 };
168
169
170 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
171         .displays       = qt2410_lcd_cfg,
172         .num_displays   = ARRAY_SIZE(qt2410_lcd_cfg),
173         .default_display = 0,
174
175         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
176 };
177
178 /* CS8900 */
179
180 static struct resource qt2410_cs89x0_resources[] = {
181         [0] = {
182                 .start  = 0x19000000,
183                 .end    = 0x19000000 + 16,
184                 .flags  = IORESOURCE_MEM,
185         },
186         [1] = {
187                 .start  = IRQ_EINT9,
188                 .end    = IRQ_EINT9,
189                 .flags  = IORESOURCE_IRQ,
190         },
191 };
192
193 static struct platform_device qt2410_cs89x0 = {
194         .name           = "cirrus-cs89x0",
195         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
196         .resource       = qt2410_cs89x0_resources,
197 };
198
199 /* LED */
200
201 static struct s3c24xx_led_platdata qt2410_pdata_led = {
202         .gpio           = S3C2410_GPB(0),
203         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
204         .name           = "led",
205         .def_trigger    = "timer",
206 };
207
208 static struct platform_device qt2410_led = {
209         .name           = "s3c24xx_led",
210         .id             = 0,
211         .dev            = {
212                 .platform_data = &qt2410_pdata_led,
213         },
214 };
215
216 /* SPI */
217
218 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
219 {
220         switch (cs) {
221         case BITBANG_CS_ACTIVE:
222                 s3c2410_gpio_setpin(S3C2410_GPB(5), 0);
223                 break;
224         case BITBANG_CS_INACTIVE:
225                 s3c2410_gpio_setpin(S3C2410_GPB(5), 1);
226                 break;
227         }
228 }
229
230 static struct s3c2410_spigpio_info spi_gpio_cfg = {
231         .pin_clk        = S3C2410_GPG(7),
232         .pin_mosi       = S3C2410_GPG(6),
233         .pin_miso       = S3C2410_GPG(5),
234         .chip_select    = &spi_gpio_cs,
235 };
236
237
238 static struct platform_device qt2410_spi = {
239         .name             = "s3c24xx-spi-gpio",
240         .id               = 1,
241         .dev = {
242                 .platform_data = &spi_gpio_cfg,
243         },
244 };
245
246 /* Board devices */
247
248 static struct platform_device *qt2410_devices[] __initdata = {
249         &s3c_device_usb,
250         &s3c_device_lcd,
251         &s3c_device_wdt,
252         &s3c_device_i2c0,
253         &s3c_device_iis,
254         &s3c_device_sdi,
255         &s3c_device_usbgadget,
256         &qt2410_spi,
257         &qt2410_cs89x0,
258         &qt2410_led,
259 };
260
261 static struct mtd_partition __initdata qt2410_nand_part[] = {
262         [0] = {
263                 .name   = "U-Boot",
264                 .size   = 0x30000,
265                 .offset = 0,
266         },
267         [1] = {
268                 .name   = "U-Boot environment",
269                 .offset = 0x30000,
270                 .size   = 0x4000,
271         },
272         [2] = {
273                 .name   = "kernel",
274                 .offset = 0x34000,
275                 .size   = SZ_2M,
276         },
277         [3] = {
278                 .name   = "initrd",
279                 .offset = 0x234000,
280                 .size   = SZ_4M,
281         },
282         [4] = {
283                 .name   = "jffs2",
284                 .offset = 0x634000,
285                 .size   = 0x39cc000,
286         },
287 };
288
289 static struct s3c2410_nand_set __initdata qt2410_nand_sets[] = {
290         [0] = {
291                 .name           = "NAND",
292                 .nr_chips       = 1,
293                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
294                 .partitions     = qt2410_nand_part,
295         },
296 };
297
298 /* choose a set of timings which should suit most 512Mbit
299  * chips and beyond.
300  */
301
302 static struct s3c2410_platform_nand __initdata qt2410_nand_info = {
303         .tacls          = 20,
304         .twrph0         = 60,
305         .twrph1         = 20,
306         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
307         .sets           = qt2410_nand_sets,
308 };
309
310 /* UDC */
311
312 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
313 };
314
315 static char tft_type = 's';
316
317 static int __init qt2410_tft_setup(char *str)
318 {
319         tft_type = str[0];
320         return 1;
321 }
322
323 __setup("tft=", qt2410_tft_setup);
324
325 static void __init qt2410_map_io(void)
326 {
327         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
328         s3c24xx_init_clocks(12*1000*1000);
329         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
330 }
331
332 static void __init qt2410_machine_init(void)
333 {
334         s3c_nand_set_platdata(&qt2410_nand_info);
335
336         switch (tft_type) {
337         case 'p': /* production */
338                 qt2410_fb_info.default_display = 1;
339                 break;
340         case 'b': /* big */
341                 qt2410_fb_info.default_display = 0;
342                 break;
343         case 's': /* small */
344         default:
345                 qt2410_fb_info.default_display = 2;
346                 break;
347         }
348         s3c24xx_fb_set_platdata(&qt2410_fb_info);
349
350         s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT);
351         s3c2410_gpio_setpin(S3C2410_GPB(0), 1);
352
353         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
354         s3c_i2c0_set_platdata(NULL);
355
356         s3c2410_gpio_cfgpin(S3C2410_GPB(5), S3C2410_GPIO_OUTPUT);
357
358         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
359         s3c_pm_init();
360 }
361
362 MACHINE_START(QT2410, "QT2410")
363         .phys_io        = S3C2410_PA_UART,
364         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
365         .boot_params    = S3C2410_SDRAM_PA + 0x100,
366         .map_io         = qt2410_map_io,
367         .init_irq       = s3c24xx_init_irq,
368         .init_machine   = qt2410_machine_init,
369         .timer          = &s3c24xx_timer,
370 MACHINE_END
371
372