Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
[linux-2.6.git] / arch / arm / mach-realview / realview_eb.c
1 /*
2  *  linux/arch/arm/mach-realview/realview_eb.c
3  *
4  *  Copyright (C) 2004 ARM Limited
5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/amba/pl022.h>
29 #include <linux/io.h>
30
31 #include <mach/hardware.h>
32 #include <asm/irq.h>
33 #include <asm/leds.h>
34 #include <asm/mach-types.h>
35 #include <asm/pmu.h>
36 #include <asm/pgtable.h>
37 #include <asm/hardware/gic.h>
38 #include <asm/hardware/cache-l2x0.h>
39 #include <asm/localtimer.h>
40
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/time.h>
44
45 #include <mach/board-eb.h>
46 #include <mach/irqs.h>
47
48 #include "core.h"
49
50 static struct map_desc realview_eb_io_desc[] __initdata = {
51         {
52                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
53                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
54                 .length         = SZ_4K,
55                 .type           = MT_DEVICE,
56         }, {
57                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
58                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
59                 .length         = SZ_4K,
60                 .type           = MT_DEVICE,
61         }, {
62                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
63                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
64                 .length         = SZ_4K,
65                 .type           = MT_DEVICE,
66         }, {
67                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
68                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
69                 .length         = SZ_4K,
70                 .type           = MT_DEVICE,
71         }, {
72                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
73                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
74                 .length         = SZ_4K,
75                 .type           = MT_DEVICE,
76         }, {
77                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
78                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
79                 .length         = SZ_4K,
80                 .type           = MT_DEVICE,
81         },
82 #ifdef CONFIG_DEBUG_LL
83         {
84                 .virtual        = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
85                 .pfn            = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
86                 .length         = SZ_4K,
87                 .type           = MT_DEVICE,
88         }
89 #endif
90 };
91
92 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
93         {
94                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
95                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
96                 .length         = SZ_4K,
97                 .type           = MT_DEVICE,
98         }, {
99                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
100                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
101                 .length         = SZ_4K,
102                 .type           = MT_DEVICE,
103         }, {
104                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
105                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
106                 .length         = SZ_8K,
107                 .type           = MT_DEVICE,
108         }
109 };
110
111 static void __init realview_eb_map_io(void)
112 {
113         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
114         if (core_tile_eb11mp() || core_tile_a9mp())
115                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
116 }
117
118 static struct pl061_platform_data gpio0_plat_data = {
119         .gpio_base      = 0,
120         .irq_base       = -1,
121 };
122
123 static struct pl061_platform_data gpio1_plat_data = {
124         .gpio_base      = 8,
125         .irq_base       = -1,
126 };
127
128 static struct pl061_platform_data gpio2_plat_data = {
129         .gpio_base      = 16,
130         .irq_base       = -1,
131 };
132
133 static struct pl022_ssp_controller ssp0_plat_data = {
134         .bus_id = 0,
135         .enable_dma = 0,
136         .num_chipselect = 1,
137 };
138
139 /*
140  * RealView EB AMBA devices
141  */
142
143 /*
144  * These devices are connected via the core APB bridge
145  */
146 #define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
147 #define GPIO2_DMA       { 0, 0 }
148 #define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
149 #define GPIO3_DMA       { 0, 0 }
150
151 #define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
152 #define AACI_DMA        { 0x80, 0x81 }
153 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
154 #define MMCI0_DMA       { 0x84, 0 }
155 #define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
156 #define KMI0_DMA        { 0, 0 }
157 #define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
158 #define KMI1_DMA        { 0, 0 }
159
160 /*
161  * These devices are connected directly to the multi-layer AHB switch
162  */
163 #define EB_SMC_IRQ      { NO_IRQ, NO_IRQ }
164 #define EB_SMC_DMA      { 0, 0 }
165 #define MPMC_IRQ        { NO_IRQ, NO_IRQ }
166 #define MPMC_DMA        { 0, 0 }
167 #define EB_CLCD_IRQ     { IRQ_EB_CLCD, NO_IRQ }
168 #define EB_CLCD_DMA     { 0, 0 }
169 #define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
170 #define DMAC_DMA        { 0, 0 }
171
172 /*
173  * These devices are connected via the core APB bridge
174  */
175 #define SCTL_IRQ        { NO_IRQ, NO_IRQ }
176 #define SCTL_DMA        { 0, 0 }
177 #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
178 #define EB_WATCHDOG_DMA { 0, 0 }
179 #define EB_GPIO0_IRQ    { IRQ_EB_GPIO0, NO_IRQ }
180 #define EB_GPIO0_DMA    { 0, 0 }
181 #define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
182 #define GPIO1_DMA       { 0, 0 }
183 #define EB_RTC_IRQ      { IRQ_EB_RTC, NO_IRQ }
184 #define EB_RTC_DMA      { 0, 0 }
185
186 /*
187  * These devices are connected via the DMA APB bridge
188  */
189 #define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
190 #define SCI_DMA         { 7, 6 }
191 #define EB_UART0_IRQ    { IRQ_EB_UART0, NO_IRQ }
192 #define EB_UART0_DMA    { 15, 14 }
193 #define EB_UART1_IRQ    { IRQ_EB_UART1, NO_IRQ }
194 #define EB_UART1_DMA    { 13, 12 }
195 #define EB_UART2_IRQ    { IRQ_EB_UART2, NO_IRQ }
196 #define EB_UART2_DMA    { 11, 10 }
197 #define EB_UART3_IRQ    { IRQ_EB_UART3, NO_IRQ }
198 #define EB_UART3_DMA    { 0x86, 0x87 }
199 #define EB_SSP_IRQ      { IRQ_EB_SSP, NO_IRQ }
200 #define EB_SSP_DMA      { 9, 8 }
201
202 /* FPGA Primecells */
203 AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
204 AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
205 AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
206 AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
207 AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
208
209 /* DevChip Primecells */
210 AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
211 AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
212 AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
213 AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
214 AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
215 AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
216 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
217 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
218 AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
219 AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
220 AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
221 AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
222 AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
223 AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);
224
225 static struct amba_device *amba_devs[] __initdata = {
226         &dmac_device,
227         &uart0_device,
228         &uart1_device,
229         &uart2_device,
230         &uart3_device,
231         &smc_device,
232         &clcd_device,
233         &sctl_device,
234         &wdog_device,
235         &gpio0_device,
236         &gpio1_device,
237         &gpio2_device,
238         &rtc_device,
239         &sci0_device,
240         &ssp0_device,
241         &aaci_device,
242         &mmc0_device,
243         &kmi0_device,
244         &kmi1_device,
245 };
246
247 /*
248  * RealView EB platform devices
249  */
250 static struct resource realview_eb_flash_resource = {
251         .start                  = REALVIEW_EB_FLASH_BASE,
252         .end                    = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
253         .flags                  = IORESOURCE_MEM,
254 };
255
256 static struct resource realview_eb_eth_resources[] = {
257         [0] = {
258                 .start          = REALVIEW_EB_ETH_BASE,
259                 .end            = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
260                 .flags          = IORESOURCE_MEM,
261         },
262         [1] = {
263                 .start          = IRQ_EB_ETH,
264                 .end            = IRQ_EB_ETH,
265                 .flags          = IORESOURCE_IRQ,
266         },
267 };
268
269 /*
270  * Detect and register the correct Ethernet device. RealView/EB rev D
271  * platforms use the newer SMSC LAN9118 Ethernet chip
272  */
273 static int eth_device_register(void)
274 {
275         void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
276         const char *name = NULL;
277         u32 idrev;
278
279         if (!eth_addr)
280                 return -ENOMEM;
281
282         idrev = readl(eth_addr + 0x50);
283         if ((idrev & 0xFFFF0000) != 0x01180000)
284                 /* SMSC LAN9118 not present, use LAN91C111 instead */
285                 name = "smc91x";
286
287         iounmap(eth_addr);
288         return realview_eth_register(name, realview_eb_eth_resources);
289 }
290
291 static struct resource realview_eb_isp1761_resources[] = {
292         [0] = {
293                 .start          = REALVIEW_EB_USB_BASE,
294                 .end            = REALVIEW_EB_USB_BASE + SZ_128K - 1,
295                 .flags          = IORESOURCE_MEM,
296         },
297         [1] = {
298                 .start          = IRQ_EB_USB,
299                 .end            = IRQ_EB_USB,
300                 .flags          = IORESOURCE_IRQ,
301         },
302 };
303
304 static struct resource pmu_resources[] = {
305         [0] = {
306                 .start          = IRQ_EB11MP_PMU_CPU0,
307                 .end            = IRQ_EB11MP_PMU_CPU0,
308                 .flags          = IORESOURCE_IRQ,
309         },
310         [1] = {
311                 .start          = IRQ_EB11MP_PMU_CPU1,
312                 .end            = IRQ_EB11MP_PMU_CPU1,
313                 .flags          = IORESOURCE_IRQ,
314         },
315         [2] = {
316                 .start          = IRQ_EB11MP_PMU_CPU2,
317                 .end            = IRQ_EB11MP_PMU_CPU2,
318                 .flags          = IORESOURCE_IRQ,
319         },
320         [3] = {
321                 .start          = IRQ_EB11MP_PMU_CPU3,
322                 .end            = IRQ_EB11MP_PMU_CPU3,
323                 .flags          = IORESOURCE_IRQ,
324         },
325 };
326
327 static struct platform_device pmu_device = {
328         .name                   = "arm-pmu",
329         .id                     = ARM_PMU_DEVICE_CPU,
330         .num_resources          = ARRAY_SIZE(pmu_resources),
331         .resource               = pmu_resources,
332 };
333
334 static struct resource char_lcd_resources[] = {
335         {
336                 .start = REALVIEW_CHAR_LCD_BASE,
337                 .end   = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
338                 .flags = IORESOURCE_MEM,
339         },
340         {
341                 .start  = IRQ_EB_CHARLCD,
342                 .end    = IRQ_EB_CHARLCD,
343                 .flags  = IORESOURCE_IRQ,
344         },
345 };
346
347 static struct platform_device char_lcd_device = {
348         .name           =       "arm-charlcd",
349         .id             =       -1,
350         .num_resources  =       ARRAY_SIZE(char_lcd_resources),
351         .resource       =       char_lcd_resources,
352 };
353
354 static void __init gic_init_irq(void)
355 {
356         if (core_tile_eb11mp() || core_tile_a9mp()) {
357                 unsigned int pldctrl;
358
359                 /* new irq mode */
360                 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
361                 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
362                 pldctrl |= 0x00800000;
363                 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
364                 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
365
366                 /* core tile GIC, primary */
367                 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
368                 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
369                 gic_cpu_init(0, gic_cpu_base_addr);
370
371 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
372                 /* board GIC, secondary */
373                 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
374                 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
375                 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
376 #endif
377         } else {
378                 /* board GIC, primary */
379                 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
380                 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
381                 gic_cpu_init(0, gic_cpu_base_addr);
382         }
383 }
384
385 /*
386  * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
387  */
388 static void realview_eb11mp_fixup(void)
389 {
390         /* AMBA devices */
391         dmac_device.irq[0]      = IRQ_EB11MP_DMA;
392         uart0_device.irq[0]     = IRQ_EB11MP_UART0;
393         uart1_device.irq[0]     = IRQ_EB11MP_UART1;
394         uart2_device.irq[0]     = IRQ_EB11MP_UART2;
395         uart3_device.irq[0]     = IRQ_EB11MP_UART3;
396         clcd_device.irq[0]      = IRQ_EB11MP_CLCD;
397         wdog_device.irq[0]      = IRQ_EB11MP_WDOG;
398         gpio0_device.irq[0]     = IRQ_EB11MP_GPIO0;
399         gpio1_device.irq[0]     = IRQ_EB11MP_GPIO1;
400         gpio2_device.irq[0]     = IRQ_EB11MP_GPIO2;
401         rtc_device.irq[0]       = IRQ_EB11MP_RTC;
402         sci0_device.irq[0]      = IRQ_EB11MP_SCI;
403         ssp0_device.irq[0]      = IRQ_EB11MP_SSP;
404         aaci_device.irq[0]      = IRQ_EB11MP_AACI;
405         mmc0_device.irq[0]      = IRQ_EB11MP_MMCI0A;
406         mmc0_device.irq[1]      = IRQ_EB11MP_MMCI0B;
407         kmi0_device.irq[0]      = IRQ_EB11MP_KMI0;
408         kmi1_device.irq[0]      = IRQ_EB11MP_KMI1;
409
410         /* platform devices */
411         realview_eb_eth_resources[1].start      = IRQ_EB11MP_ETH;
412         realview_eb_eth_resources[1].end        = IRQ_EB11MP_ETH;
413         realview_eb_isp1761_resources[1].start  = IRQ_EB11MP_USB;
414         realview_eb_isp1761_resources[1].end    = IRQ_EB11MP_USB;
415 }
416
417 static void __init realview_eb_timer_init(void)
418 {
419         unsigned int timer_irq;
420
421         timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
422         timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
423         timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
424         timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
425
426         if (core_tile_eb11mp() || core_tile_a9mp()) {
427 #ifdef CONFIG_LOCAL_TIMERS
428                 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
429 #endif
430                 timer_irq = IRQ_EB11MP_TIMER0_1;
431         } else
432                 timer_irq = IRQ_EB_TIMER0_1;
433
434         realview_timer_init(timer_irq);
435 }
436
437 static struct sys_timer realview_eb_timer = {
438         .init           = realview_eb_timer_init,
439 };
440
441 static void realview_eb_reset(char mode)
442 {
443         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
444         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
445
446         /*
447          * To reset, we hit the on-board reset register
448          * in the system FPGA
449          */
450         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
451         if (core_tile_eb11mp())
452                 __raw_writel(0x0008, reset_ctrl);
453 }
454
455 static void __init realview_eb_init(void)
456 {
457         int i;
458
459         if (core_tile_eb11mp() || core_tile_a9mp()) {
460                 realview_eb11mp_fixup();
461
462 #ifdef CONFIG_CACHE_L2X0
463                 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
464                  * Bits:  .... ...0 0111 1001 0000 .... .... .... */
465                 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
466 #endif
467                 platform_device_register(&pmu_device);
468         }
469
470         realview_flash_register(&realview_eb_flash_resource, 1);
471         platform_device_register(&realview_i2c_device);
472         platform_device_register(&char_lcd_device);
473         eth_device_register();
474         realview_usb_register(realview_eb_isp1761_resources);
475
476         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
477                 struct amba_device *d = amba_devs[i];
478                 amba_device_register(d, &iomem_resource);
479         }
480
481 #ifdef CONFIG_LEDS
482         leds_event = realview_leds_event;
483 #endif
484         realview_reset = realview_eb_reset;
485 }
486
487 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
488         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
489         .boot_params    = PHYS_OFFSET + 0x00000100,
490         .fixup          = realview_fixup,
491         .map_io         = realview_eb_map_io,
492         .init_irq       = gic_init_irq,
493         .timer          = &realview_eb_timer,
494         .init_machine   = realview_eb_init,
495 MACHINE_END