Merge branch 'for-rmk/samsung6' of git://git.fluff.org/bjdooks/linux into devel-stable
[linux-2.6.git] / arch / arm / mach-pxa / lpd270.c
1 /*
2  * linux/arch/arm/mach-pxa/lpd270.c
3  *
4  * Support for the LogicPD PXA270 Card Engine.
5  * Derived from the mainstone code, which carries these notices:
6  *
7  * Author:      Nicolas Pitre
8  * Created:     Nov 05, 2002
9  * Copyright:   MontaVista Software Inc.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/pwm_backlight.h>
27
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <mach/hardware.h>
33 #include <asm/irq.h>
34 #include <asm/sizes.h>
35
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
40
41 #include <mach/pxa27x.h>
42 #include <mach/gpio.h>
43 #include <mach/lpd270.h>
44 #include <mach/audio.h>
45 #include <mach/pxafb.h>
46 #include <mach/mmc.h>
47 #include <mach/irda.h>
48 #include <mach/ohci.h>
49
50 #include "generic.h"
51 #include "devices.h"
52
53 static unsigned long lpd270_pin_config[] __initdata = {
54         /* Chip Selects */
55         GPIO15_nCS_1,   /* Mainboard Flash */
56         GPIO78_nCS_2,   /* CPLD + Ethernet */
57
58         /* LCD - 16bpp Active TFT */
59         GPIO58_LCD_LDD_0,
60         GPIO59_LCD_LDD_1,
61         GPIO60_LCD_LDD_2,
62         GPIO61_LCD_LDD_3,
63         GPIO62_LCD_LDD_4,
64         GPIO63_LCD_LDD_5,
65         GPIO64_LCD_LDD_6,
66         GPIO65_LCD_LDD_7,
67         GPIO66_LCD_LDD_8,
68         GPIO67_LCD_LDD_9,
69         GPIO68_LCD_LDD_10,
70         GPIO69_LCD_LDD_11,
71         GPIO70_LCD_LDD_12,
72         GPIO71_LCD_LDD_13,
73         GPIO72_LCD_LDD_14,
74         GPIO73_LCD_LDD_15,
75         GPIO74_LCD_FCLK,
76         GPIO75_LCD_LCLK,
77         GPIO76_LCD_PCLK,
78         GPIO77_LCD_BIAS,
79         GPIO16_PWM0_OUT,        /* Backlight */
80
81         /* USB Host */
82         GPIO88_USBH1_PWR,
83         GPIO89_USBH1_PEN,
84
85         /* AC97 */
86         GPIO28_AC97_BITCLK,
87         GPIO29_AC97_SDATA_IN_0,
88         GPIO30_AC97_SDATA_OUT,
89         GPIO31_AC97_SYNC,
90         GPIO45_AC97_SYSCLK,
91
92         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
93 };
94
95 static unsigned int lpd270_irq_enabled;
96
97 static void lpd270_mask_irq(unsigned int irq)
98 {
99         int lpd270_irq = irq - LPD270_IRQ(0);
100
101         __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
102
103         lpd270_irq_enabled &= ~(1 << lpd270_irq);
104         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
105 }
106
107 static void lpd270_unmask_irq(unsigned int irq)
108 {
109         int lpd270_irq = irq - LPD270_IRQ(0);
110
111         lpd270_irq_enabled |= 1 << lpd270_irq;
112         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
113 }
114
115 static struct irq_chip lpd270_irq_chip = {
116         .name           = "CPLD",
117         .ack            = lpd270_mask_irq,
118         .mask           = lpd270_mask_irq,
119         .unmask         = lpd270_unmask_irq,
120 };
121
122 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
123 {
124         unsigned long pending;
125
126         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
127         do {
128                 desc->chip->ack(irq);   /* clear useless edge notification */
129                 if (likely(pending)) {
130                         irq = LPD270_IRQ(0) + __ffs(pending);
131                         generic_handle_irq(irq);
132
133                         pending = __raw_readw(LPD270_INT_STATUS) &
134                                                 lpd270_irq_enabled;
135                 }
136         } while (pending);
137 }
138
139 static void __init lpd270_init_irq(void)
140 {
141         int irq;
142
143         pxa27x_init_irq();
144
145         __raw_writew(0, LPD270_INT_MASK);
146         __raw_writew(0, LPD270_INT_STATUS);
147
148         /* setup extra LogicPD PXA270 irqs */
149         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
150                 set_irq_chip(irq, &lpd270_irq_chip);
151                 set_irq_handler(irq, handle_level_irq);
152                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
153         }
154         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
155         set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
156 }
157
158
159 #ifdef CONFIG_PM
160 static int lpd270_irq_resume(struct sys_device *dev)
161 {
162         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
163         return 0;
164 }
165
166 static struct sysdev_class lpd270_irq_sysclass = {
167         .name = "cpld_irq",
168         .resume = lpd270_irq_resume,
169 };
170
171 static struct sys_device lpd270_irq_device = {
172         .cls = &lpd270_irq_sysclass,
173 };
174
175 static int __init lpd270_irq_device_init(void)
176 {
177         int ret = -ENODEV;
178         if (machine_is_logicpd_pxa270()) {
179                 ret = sysdev_class_register(&lpd270_irq_sysclass);
180                 if (ret == 0)
181                         ret = sysdev_register(&lpd270_irq_device);
182         }
183         return ret;
184 }
185
186 device_initcall(lpd270_irq_device_init);
187 #endif
188
189
190 static struct resource smc91x_resources[] = {
191         [0] = {
192                 .start  = LPD270_ETH_PHYS,
193                 .end    = (LPD270_ETH_PHYS + 0xfffff),
194                 .flags  = IORESOURCE_MEM,
195         },
196         [1] = {
197                 .start  = LPD270_ETHERNET_IRQ,
198                 .end    = LPD270_ETHERNET_IRQ,
199                 .flags  = IORESOURCE_IRQ,
200         },
201 };
202
203 static struct platform_device smc91x_device = {
204         .name           = "smc91x",
205         .id             = 0,
206         .num_resources  = ARRAY_SIZE(smc91x_resources),
207         .resource       = smc91x_resources,
208 };
209
210 static struct resource lpd270_flash_resources[] = {
211         [0] = {
212                 .start  = PXA_CS0_PHYS,
213                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
214                 .flags  = IORESOURCE_MEM,
215         },
216         [1] = {
217                 .start  = PXA_CS1_PHYS,
218                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
219                 .flags  = IORESOURCE_MEM,
220         },
221 };
222
223 static struct mtd_partition lpd270_flash0_partitions[] = {
224         {
225                 .name =         "Bootloader",
226                 .size =         0x00040000,
227                 .offset =       0,
228                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
229         }, {
230                 .name =         "Kernel",
231                 .size =         0x00400000,
232                 .offset =       0x00040000,
233         }, {
234                 .name =         "Filesystem",
235                 .size =         MTDPART_SIZ_FULL,
236                 .offset =       0x00440000
237         },
238 };
239
240 static struct flash_platform_data lpd270_flash_data[2] = {
241         {
242                 .name           = "processor-flash",
243                 .map_name       = "cfi_probe",
244                 .parts          = lpd270_flash0_partitions,
245                 .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
246         }, {
247                 .name           = "mainboard-flash",
248                 .map_name       = "cfi_probe",
249                 .parts          = NULL,
250                 .nr_parts       = 0,
251         }
252 };
253
254 static struct platform_device lpd270_flash_device[2] = {
255         {
256                 .name           = "pxa2xx-flash",
257                 .id             = 0,
258                 .dev = {
259                         .platform_data  = &lpd270_flash_data[0],
260                 },
261                 .resource       = &lpd270_flash_resources[0],
262                 .num_resources  = 1,
263         }, {
264                 .name           = "pxa2xx-flash",
265                 .id             = 1,
266                 .dev = {
267                         .platform_data  = &lpd270_flash_data[1],
268                 },
269                 .resource       = &lpd270_flash_resources[1],
270                 .num_resources  = 1,
271         },
272 };
273
274 static struct platform_pwm_backlight_data lpd270_backlight_data = {
275         .pwm_id         = 0,
276         .max_brightness = 1,
277         .dft_brightness = 1,
278         .pwm_period_ns  = 78770,
279 };
280
281 static struct platform_device lpd270_backlight_device = {
282         .name           = "pwm-backlight",
283         .dev            = {
284                 .parent = &pxa27x_device_pwm0.dev,
285                 .platform_data = &lpd270_backlight_data,
286         },
287 };
288
289 /* 5.7" TFT QVGA (LoLo display number 1) */
290 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
291         .pixclock               = 150000,
292         .xres                   = 320,
293         .yres                   = 240,
294         .bpp                    = 16,
295         .hsync_len              = 0x14,
296         .left_margin            = 0x28,
297         .right_margin           = 0x0a,
298         .vsync_len              = 0x02,
299         .upper_margin           = 0x08,
300         .lower_margin           = 0x14,
301         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
302 };
303
304 static struct pxafb_mach_info sharp_lq057q3dc02 = {
305         .modes                  = &sharp_lq057q3dc02_mode,
306         .num_modes              = 1,
307         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
308                                   LCD_ALTERNATE_MAPPING,
309 };
310
311 /* 12.1" TFT SVGA (LoLo display number 2) */
312 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
313         .pixclock               = 50000,
314         .xres                   = 800,
315         .yres                   = 600,
316         .bpp                    = 16,
317         .hsync_len              = 0x05,
318         .left_margin            = 0x52,
319         .right_margin           = 0x05,
320         .vsync_len              = 0x04,
321         .upper_margin           = 0x14,
322         .lower_margin           = 0x0a,
323         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
324 };
325
326 static struct pxafb_mach_info sharp_lq121s1dg31 = {
327         .modes                  = &sharp_lq121s1dg31_mode,
328         .num_modes              = 1,
329         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
330                                   LCD_ALTERNATE_MAPPING,
331 };
332
333 /* 3.6" TFT QVGA (LoLo display number 3) */
334 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
335         .pixclock               = 150000,
336         .xres                   = 320,
337         .yres                   = 240,
338         .bpp                    = 16,
339         .hsync_len              = 0x0e,
340         .left_margin            = 0x04,
341         .right_margin           = 0x0a,
342         .vsync_len              = 0x03,
343         .upper_margin           = 0x03,
344         .lower_margin           = 0x03,
345         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
346 };
347
348 static struct pxafb_mach_info sharp_lq036q1da01 = {
349         .modes                  = &sharp_lq036q1da01_mode,
350         .num_modes              = 1,
351         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
352                                   LCD_ALTERNATE_MAPPING,
353 };
354
355 /* 6.4" TFT VGA (LoLo display number 5) */
356 static struct pxafb_mode_info sharp_lq64d343_mode = {
357         .pixclock               = 25000,
358         .xres                   = 640,
359         .yres                   = 480,
360         .bpp                    = 16,
361         .hsync_len              = 0x31,
362         .left_margin            = 0x89,
363         .right_margin           = 0x19,
364         .vsync_len              = 0x12,
365         .upper_margin           = 0x22,
366         .lower_margin           = 0x00,
367         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
368 };
369
370 static struct pxafb_mach_info sharp_lq64d343 = {
371         .modes                  = &sharp_lq64d343_mode,
372         .num_modes              = 1,
373         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
374                                   LCD_ALTERNATE_MAPPING,
375 };
376
377 /* 10.4" TFT VGA (LoLo display number 7) */
378 static struct pxafb_mode_info sharp_lq10d368_mode = {
379         .pixclock               = 25000,
380         .xres                   = 640,
381         .yres                   = 480,
382         .bpp                    = 16,
383         .hsync_len              = 0x31,
384         .left_margin            = 0x89,
385         .right_margin           = 0x19,
386         .vsync_len              = 0x12,
387         .upper_margin           = 0x22,
388         .lower_margin           = 0x00,
389         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
390 };
391
392 static struct pxafb_mach_info sharp_lq10d368 = {
393         .modes                  = &sharp_lq10d368_mode,
394         .num_modes              = 1,
395         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
396                                   LCD_ALTERNATE_MAPPING,
397 };
398
399 /* 3.5" TFT QVGA (LoLo display number 8) */
400 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
401         .pixclock               = 150000,
402         .xres                   = 240,
403         .yres                   = 320,
404         .bpp                    = 16,
405         .hsync_len              = 0x0e,
406         .left_margin            = 0x0a,
407         .right_margin           = 0x0a,
408         .vsync_len              = 0x03,
409         .upper_margin           = 0x05,
410         .lower_margin           = 0x14,
411         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
412 };
413
414 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
415         .modes                  = &sharp_lq035q7db02_20_mode,
416         .num_modes              = 1,
417         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
418                                   LCD_ALTERNATE_MAPPING,
419 };
420
421 static struct pxafb_mach_info *lpd270_lcd_to_use;
422
423 static int __init lpd270_set_lcd(char *str)
424 {
425         if (!strnicmp(str, "lq057q3dc02", 11)) {
426                 lpd270_lcd_to_use = &sharp_lq057q3dc02;
427         } else if (!strnicmp(str, "lq121s1dg31", 11)) {
428                 lpd270_lcd_to_use = &sharp_lq121s1dg31;
429         } else if (!strnicmp(str, "lq036q1da01", 11)) {
430                 lpd270_lcd_to_use = &sharp_lq036q1da01;
431         } else if (!strnicmp(str, "lq64d343", 8)) {
432                 lpd270_lcd_to_use = &sharp_lq64d343;
433         } else if (!strnicmp(str, "lq10d368", 8)) {
434                 lpd270_lcd_to_use = &sharp_lq10d368;
435         } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
436                 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
437         } else {
438                 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
439         }
440
441         return 1;
442 }
443
444 __setup("lcd=", lpd270_set_lcd);
445
446 static struct platform_device *platform_devices[] __initdata = {
447         &smc91x_device,
448         &lpd270_backlight_device,
449         &lpd270_flash_device[0],
450         &lpd270_flash_device[1],
451 };
452
453 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
454         .port_mode      = PMM_PERPORT_MODE,
455         .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
456 };
457
458 static void __init lpd270_init(void)
459 {
460         pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
461
462         pxa_set_ffuart_info(NULL);
463         pxa_set_btuart_info(NULL);
464         pxa_set_stuart_info(NULL);
465
466         lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
467         lpd270_flash_data[1].width = 4;
468
469         /*
470          * System bus arbiter setting:
471          * - Core_Park
472          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
473          */
474         ARB_CNTRL = ARB_CORE_PARK | 0x234;
475
476         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
477
478         pxa_set_ac97_info(NULL);
479
480         if (lpd270_lcd_to_use != NULL)
481                 set_pxa_fb_info(lpd270_lcd_to_use);
482
483         pxa_set_ohci_info(&lpd270_ohci_platform_data);
484 }
485
486
487 static struct map_desc lpd270_io_desc[] __initdata = {
488         {
489                 .virtual        = LPD270_CPLD_VIRT,
490                 .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
491                 .length         = LPD270_CPLD_SIZE,
492                 .type           = MT_DEVICE,
493         },
494 };
495
496 static void __init lpd270_map_io(void)
497 {
498         pxa_map_io();
499         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
500
501         /* for use I SRAM as framebuffer.  */
502         PSLR |= 0x00000F04;
503         PCFR  = 0x00000066;
504 }
505
506 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
507         /* Maintainer: Peter Barada */
508         .phys_io        = 0x40000000,
509         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
510         .boot_params    = 0xa0000100,
511         .map_io         = lpd270_map_io,
512         .init_irq       = lpd270_init_irq,
513         .timer          = &pxa_timer,
514         .init_machine   = lpd270_init,
515 MACHINE_END