Merge branch 'depends/rmk/memory_h' into next/fixes
[linux-2.6.git] / arch / arm / mach-orion5x / wnr854t-setup.c
1 /*
2  * arch/arm/mach-orion5x/wnr854t-setup.c
3  *
4  * This file is licensed under the terms of the GNU General Public
5  * License version 2.  This program is licensed "as is" without any
6  * warranty of any kind, whether express or implied.
7  */
8 #include <linux/gpio.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/pci.h>
13 #include <linux/irq.h>
14 #include <linux/delay.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/ethtool.h>
18 #include <net/dsa.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/arch.h>
21 #include <asm/mach/pci.h>
22 #include <mach/orion5x.h>
23 #include "common.h"
24 #include "mpp.h"
25
26 static unsigned int wnr854t_mpp_modes[] __initdata = {
27         MPP0_GPIO,              /* Power LED green (0=on) */
28         MPP1_GPIO,              /* Reset Button (0=off) */
29         MPP2_GPIO,              /* Power LED blink (0=off) */
30         MPP3_GPIO,              /* WAN Status LED amber (0=off) */
31         MPP4_GPIO,              /* PCI int */
32         MPP5_GPIO,              /* ??? */
33         MPP6_GPIO,              /* ??? */
34         MPP7_GPIO,              /* ??? */
35         MPP8_UNUSED,            /* ??? */
36         MPP9_GIGE,              /* GE_RXERR */
37         MPP10_UNUSED,           /* ??? */
38         MPP11_UNUSED,           /* ??? */
39         MPP12_GIGE,             /* GE_TXD[4] */
40         MPP13_GIGE,             /* GE_TXD[5] */
41         MPP14_GIGE,             /* GE_TXD[6] */
42         MPP15_GIGE,             /* GE_TXD[7] */
43         MPP16_GIGE,             /* GE_RXD[4] */
44         MPP17_GIGE,             /* GE_RXD[5] */
45         MPP18_GIGE,             /* GE_RXD[6] */
46         MPP19_GIGE,             /* GE_RXD[7] */
47         0,
48 };
49
50 /*
51  * 8M NOR flash Device bus boot chip select
52  */
53 #define WNR854T_NOR_BOOT_BASE   0xf4000000
54 #define WNR854T_NOR_BOOT_SIZE   SZ_8M
55
56 static struct mtd_partition wnr854t_nor_flash_partitions[] = {
57         {
58                 .name           = "kernel",
59                 .offset         = 0x00000000,
60                 .size           = 0x00100000,
61         }, {
62                 .name           = "rootfs",
63                 .offset         = 0x00100000,
64                 .size           = 0x00660000,
65         }, {
66                 .name           = "uboot",
67                 .offset         = 0x00760000,
68                 .size           = 0x00040000,
69         },
70 };
71
72 static struct physmap_flash_data wnr854t_nor_flash_data = {
73         .width          = 2,
74         .parts          = wnr854t_nor_flash_partitions,
75         .nr_parts       = ARRAY_SIZE(wnr854t_nor_flash_partitions),
76 };
77
78 static struct resource wnr854t_nor_flash_resource = {
79         .flags          = IORESOURCE_MEM,
80         .start          = WNR854T_NOR_BOOT_BASE,
81         .end            = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
82 };
83
84 static struct platform_device wnr854t_nor_flash = {
85         .name                   = "physmap-flash",
86         .id                     = 0,
87         .dev            = {
88                 .platform_data  = &wnr854t_nor_flash_data,
89         },
90         .num_resources          = 1,
91         .resource               = &wnr854t_nor_flash_resource,
92 };
93
94 static struct mv643xx_eth_platform_data wnr854t_eth_data = {
95         .phy_addr       = MV643XX_ETH_PHY_NONE,
96         .speed          = SPEED_1000,
97         .duplex         = DUPLEX_FULL,
98 };
99
100 static struct dsa_chip_data wnr854t_switch_chip_data = {
101         .port_names[0] = "lan3",
102         .port_names[1] = "lan4",
103         .port_names[2] = "wan",
104         .port_names[3] = "cpu",
105         .port_names[5] = "lan1",
106         .port_names[7] = "lan2",
107 };
108
109 static struct dsa_platform_data wnr854t_switch_plat_data = {
110         .nr_chips       = 1,
111         .chip           = &wnr854t_switch_chip_data,
112 };
113
114 static void __init wnr854t_init(void)
115 {
116         /*
117          * Setup basic Orion functions. Need to be called early.
118          */
119         orion5x_init();
120
121         orion5x_mpp_conf(wnr854t_mpp_modes);
122
123         /*
124          * Configure peripherals.
125          */
126         orion5x_eth_init(&wnr854t_eth_data);
127         orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ);
128         orion5x_uart0_init();
129
130         orion5x_setup_dev_boot_win(WNR854T_NOR_BOOT_BASE,
131                                    WNR854T_NOR_BOOT_SIZE);
132         platform_device_register(&wnr854t_nor_flash);
133 }
134
135 static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
136         u8 pin)
137 {
138         int irq;
139
140         /*
141          * Check for devices with hard-wired IRQs.
142          */
143         irq = orion5x_pci_map_irq(dev, slot, pin);
144         if (irq != -1)
145                 return irq;
146
147         /*
148          * Mini-PCI slot.
149          */
150         if (slot == 7)
151                 return gpio_to_irq(4);
152
153         return -1;
154 }
155
156 static struct hw_pci wnr854t_pci __initdata = {
157         .nr_controllers = 2,
158         .swizzle        = pci_std_swizzle,
159         .setup          = orion5x_pci_sys_setup,
160         .scan           = orion5x_pci_sys_scan_bus,
161         .map_irq        = wnr854t_pci_map_irq,
162 };
163
164 static int __init wnr854t_pci_init(void)
165 {
166         if (machine_is_wnr854t())
167                 pci_common_init(&wnr854t_pci);
168
169         return 0;
170 }
171 subsys_initcall(wnr854t_pci_init);
172
173 MACHINE_START(WNR854T, "Netgear WNR854T")
174         /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
175         .atag_offset    = 0x100,
176         .init_machine   = wnr854t_init,
177         .map_io         = orion5x_map_io,
178         .init_early     = orion5x_init_early,
179         .init_irq       = orion5x_init_irq,
180         .timer          = &orion5x_timer,
181         .fixup          = tag_fixup_mem32,
182 MACHINE_END