Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[linux-2.6.git] / arch / arm / mach-omap2 / voltage.c
1 /*
2  * OMAP3/OMAP4 Voltage Management Routines
3  *
4  * Author: Thara Gopinath       <thara@ti.com>
5  *
6  * Copyright (C) 2007 Texas Instruments, Inc.
7  * Rajendra Nayak <rnayak@ti.com>
8  * Lesly A M <x0080970@ti.com>
9  *
10  * Copyright (C) 2008 Nokia Corporation
11  * Kalle Jokiniemi
12  *
13  * Copyright (C) 2010 Texas Instruments, Inc.
14  * Thara Gopinath <thara@ti.com>
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License version 2 as
18  * published by the Free Software Foundation.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/io.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
25 #include <linux/debugfs.h>
26 #include <linux/slab.h>
27
28 #include <plat/common.h>
29 #include <plat/voltage.h>
30
31 #include "prm-regbits-34xx.h"
32 #include "prm-regbits-44xx.h"
33 #include "prm44xx.h"
34 #include "prcm44xx.h"
35 #include "prminst44xx.h"
36 #include "control.h"
37
38 #define VP_IDLE_TIMEOUT         200
39 #define VP_TRANXDONE_TIMEOUT    300
40 #define VOLTAGE_DIR_SIZE        16
41
42 /* Voltage processor register offsets */
43 struct vp_reg_offs {
44         u8 vpconfig;
45         u8 vstepmin;
46         u8 vstepmax;
47         u8 vlimitto;
48         u8 vstatus;
49         u8 voltage;
50 };
51
52 /* Voltage Processor bit field values, shifts and masks */
53 struct vp_reg_val {
54         /* PRM module */
55         u16 prm_mod;
56         /* VPx_VPCONFIG */
57         u32 vpconfig_erroroffset;
58         u16 vpconfig_errorgain;
59         u32 vpconfig_errorgain_mask;
60         u8 vpconfig_errorgain_shift;
61         u32 vpconfig_initvoltage_mask;
62         u8 vpconfig_initvoltage_shift;
63         u32 vpconfig_timeouten;
64         u32 vpconfig_initvdd;
65         u32 vpconfig_forceupdate;
66         u32 vpconfig_vpenable;
67         /* VPx_VSTEPMIN */
68         u8 vstepmin_stepmin;
69         u16 vstepmin_smpswaittimemin;
70         u8 vstepmin_stepmin_shift;
71         u8 vstepmin_smpswaittimemin_shift;
72         /* VPx_VSTEPMAX */
73         u8 vstepmax_stepmax;
74         u16 vstepmax_smpswaittimemax;
75         u8 vstepmax_stepmax_shift;
76         u8 vstepmax_smpswaittimemax_shift;
77         /* VPx_VLIMITTO */
78         u8 vlimitto_vddmin;
79         u8 vlimitto_vddmax;
80         u16 vlimitto_timeout;
81         u8 vlimitto_vddmin_shift;
82         u8 vlimitto_vddmax_shift;
83         u8 vlimitto_timeout_shift;
84         /* PRM_IRQSTATUS*/
85         u32 tranxdone_status;
86 };
87
88 /* Voltage controller registers and offsets */
89 struct vc_reg_info {
90         /* PRM module */
91         u16 prm_mod;
92         /* VC register offsets */
93         u8 smps_sa_reg;
94         u8 smps_volra_reg;
95         u8 bypass_val_reg;
96         u8 cmdval_reg;
97         u8 voltsetup_reg;
98         /*VC_SMPS_SA*/
99         u8 smps_sa_shift;
100         u32 smps_sa_mask;
101         /* VC_SMPS_VOL_RA */
102         u8 smps_volra_shift;
103         u32 smps_volra_mask;
104         /* VC_BYPASS_VAL */
105         u8 data_shift;
106         u8 slaveaddr_shift;
107         u8 regaddr_shift;
108         u32 valid;
109         /* VC_CMD_VAL */
110         u8 cmd_on_shift;
111         u8 cmd_onlp_shift;
112         u8 cmd_ret_shift;
113         u8 cmd_off_shift;
114         u32 cmd_on_mask;
115         /* PRM_VOLTSETUP */
116         u8 voltsetup_shift;
117         u32 voltsetup_mask;
118 };
119
120 /**
121  * omap_vdd_info - Per Voltage Domain info
122  *
123  * @volt_data           : voltage table having the distinct voltages supported
124  *                        by the domain and other associated per voltage data.
125  * @pmic_info           : pmic specific parameters which should be populted by
126  *                        the pmic drivers.
127  * @vp_offs             : structure containing the offsets for various
128  *                        vp registers
129  * @vp_reg              : the register values, shifts, masks for various
130  *                        vp registers
131  * @vc_reg              : structure containing various various vc registers,
132  *                        shifts, masks etc.
133  * @voltdm              : pointer to the voltage domain structure
134  * @debug_dir           : debug directory for this voltage domain.
135  * @curr_volt           : current voltage for this vdd.
136  * @ocp_mod             : The prm module for accessing the prm irqstatus reg.
137  * @prm_irqst_reg       : prm irqstatus register.
138  * @vp_enabled          : flag to keep track of whether vp is enabled or not
139  * @volt_scale          : API to scale the voltage of the vdd.
140  */
141 struct omap_vdd_info {
142         struct omap_volt_data *volt_data;
143         struct omap_volt_pmic_info *pmic_info;
144         struct vp_reg_offs vp_offs;
145         struct vp_reg_val vp_reg;
146         struct vc_reg_info vc_reg;
147         struct voltagedomain voltdm;
148         struct dentry *debug_dir;
149         u32 curr_volt;
150         u16 ocp_mod;
151         u8 prm_irqst_reg;
152         bool vp_enabled;
153         u32 (*read_reg) (u16 mod, u8 offset);
154         void (*write_reg) (u32 val, u16 mod, u8 offset);
155         int (*volt_scale) (struct omap_vdd_info *vdd,
156                 unsigned long target_volt);
157 };
158
159 static struct omap_vdd_info *vdd_info;
160 /*
161  * Number of scalable voltage domains.
162  */
163 static int nr_scalable_vdd;
164
165 /* OMAP3 VDD sturctures */
166 static struct omap_vdd_info omap3_vdd_info[] = {
167         {
168                 .vp_offs = {
169                         .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
170                         .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
171                         .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET,
172                         .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
173                         .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
174                         .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
175                 },
176                 .voltdm = {
177                         .name = "mpu",
178                 },
179         },
180         {
181                 .vp_offs = {
182                         .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
183                         .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
184                         .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET,
185                         .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
186                         .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
187                         .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
188                 },
189                 .voltdm = {
190                         .name = "core",
191                 },
192         },
193 };
194
195 #define OMAP3_NR_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
196
197 /* OMAP4 VDD sturctures */
198 static struct omap_vdd_info omap4_vdd_info[] = {
199         {
200                 .vp_offs = {
201                         .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
202                         .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
203                         .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
204                         .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
205                         .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
206                         .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
207                 },
208                 .voltdm = {
209                         .name = "mpu",
210                 },
211         },
212         {
213                 .vp_offs = {
214                         .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
215                         .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
216                         .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
217                         .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
218                         .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
219                         .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
220                 },
221                 .voltdm = {
222                         .name = "iva",
223                 },
224         },
225         {
226                 .vp_offs = {
227                         .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
228                         .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
229                         .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
230                         .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
231                         .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
232                         .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
233                 },
234                 .voltdm = {
235                         .name = "core",
236                 },
237         },
238 };
239
240 #define OMAP4_NR_SCALABLE_VDD ARRAY_SIZE(omap4_vdd_info)
241
242 /*
243  * Structures containing OMAP3430/OMAP3630 voltage supported and various
244  * voltage dependent data for each VDD.
245  */
246 #define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain)   \
247 {                                                                       \
248         .volt_nominal   = _v_nom,                                       \
249         .sr_efuse_offs  = _efuse_offs,                                  \
250         .sr_errminlimit = _errminlimit,                                 \
251         .vp_errgain     = _errgain                                      \
252 }
253
254 /* VDD1 */
255 static struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
256         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
257         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
258         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
259         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
260         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
261         VOLT_DATA_DEFINE(0, 0, 0, 0),
262 };
263
264 static struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
265         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
266         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
267         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
268         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
269         VOLT_DATA_DEFINE(0, 0, 0, 0),
270 };
271
272 /* VDD2 */
273 static struct omap_volt_data omap34xx_vddcore_volt_data[] = {
274         VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
275         VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
276         VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
277         VOLT_DATA_DEFINE(0, 0, 0, 0),
278 };
279
280 static struct omap_volt_data omap36xx_vddcore_volt_data[] = {
281         VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
282         VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
283         VOLT_DATA_DEFINE(0, 0, 0, 0),
284 };
285
286 /*
287  * Structures containing OMAP4430 voltage supported and various
288  * voltage dependent data for each VDD.
289  */
290 static struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
291         VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
292         VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
293         VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
294         VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
295         VOLT_DATA_DEFINE(0, 0, 0, 0),
296 };
297
298 static struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
299         VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
300         VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
301         VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
302         VOLT_DATA_DEFINE(0, 0, 0, 0),
303 };
304
305 static struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
306         VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
307         VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
308         VOLT_DATA_DEFINE(0, 0, 0, 0),
309 };
310
311 static struct dentry *voltage_dir;
312
313 /* Init function pointers */
314 static void (*vc_init) (struct omap_vdd_info *vdd);
315 static int (*vdd_data_configure) (struct omap_vdd_info *vdd);
316
317 static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
318 {
319         return omap2_prm_read_mod_reg(mod, offset);
320 }
321
322 static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset)
323 {
324         omap2_prm_write_mod_reg(val, mod, offset);
325 }
326
327 static u32 omap4_voltage_read_reg(u16 mod, u8 offset)
328 {
329         return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
330                                         mod, offset);
331 }
332
333 static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset)
334 {
335         omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset);
336 }
337
338 /* Voltage debugfs support */
339 static int vp_volt_debug_get(void *data, u64 *val)
340 {
341         struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
342         u8 vsel;
343
344         if (!vdd) {
345                 pr_warning("Wrong paramater passed\n");
346                 return -EINVAL;
347         }
348
349         vsel = vdd->read_reg(vdd->vp_reg.prm_mod, vdd->vp_offs.voltage);
350         pr_notice("curr_vsel = %x\n", vsel);
351
352         if (!vdd->pmic_info->vsel_to_uv) {
353                 pr_warning("PMIC function to convert vsel to voltage"
354                         "in uV not registerd\n");
355                 return -EINVAL;
356         }
357
358         *val = vdd->pmic_info->vsel_to_uv(vsel);
359         return 0;
360 }
361
362 static int nom_volt_debug_get(void *data, u64 *val)
363 {
364         struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
365
366         if (!vdd) {
367                 pr_warning("Wrong paramater passed\n");
368                 return -EINVAL;
369         }
370
371         *val = omap_voltage_get_nom_volt(&vdd->voltdm);
372
373         return 0;
374 }
375
376 DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
377 DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
378                                                                 "%llu\n");
379 static void vp_latch_vsel(struct omap_vdd_info *vdd)
380 {
381         u32 vpconfig;
382         u16 mod;
383         unsigned long uvdc;
384         char vsel;
385
386         uvdc = omap_voltage_get_nom_volt(&vdd->voltdm);
387         if (!uvdc) {
388                 pr_warning("%s: unable to find current voltage for vdd_%s\n",
389                         __func__, vdd->voltdm.name);
390                 return;
391         }
392
393         if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
394                 pr_warning("%s: PMIC function to convert voltage in uV to"
395                         " vsel not registered\n", __func__);
396                 return;
397         }
398
399         mod = vdd->vp_reg.prm_mod;
400
401         vsel = vdd->pmic_info->uv_to_vsel(uvdc);
402
403         vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
404         vpconfig &= ~(vdd->vp_reg.vpconfig_initvoltage_mask |
405                         vdd->vp_reg.vpconfig_initvdd);
406         vpconfig |= vsel << vdd->vp_reg.vpconfig_initvoltage_shift;
407
408         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
409
410         /* Trigger initVDD value copy to voltage processor */
411         vdd->write_reg((vpconfig | vdd->vp_reg.vpconfig_initvdd), mod,
412                         vdd->vp_offs.vpconfig);
413
414         /* Clear initVDD copy trigger bit */
415         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
416 }
417
418 /* Generic voltage init functions */
419 static void __init vp_init(struct omap_vdd_info *vdd)
420 {
421         u32 vp_val;
422         u16 mod;
423
424         if (!vdd->read_reg || !vdd->write_reg) {
425                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
426                         __func__, vdd->voltdm.name);
427                 return;
428         }
429
430         mod = vdd->vp_reg.prm_mod;
431
432         vp_val = vdd->vp_reg.vpconfig_erroroffset |
433                 (vdd->vp_reg.vpconfig_errorgain <<
434                 vdd->vp_reg.vpconfig_errorgain_shift) |
435                 vdd->vp_reg.vpconfig_timeouten;
436         vdd->write_reg(vp_val, mod, vdd->vp_offs.vpconfig);
437
438         vp_val = ((vdd->vp_reg.vstepmin_smpswaittimemin <<
439                 vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
440                 (vdd->vp_reg.vstepmin_stepmin <<
441                 vdd->vp_reg.vstepmin_stepmin_shift));
442         vdd->write_reg(vp_val, mod, vdd->vp_offs.vstepmin);
443
444         vp_val = ((vdd->vp_reg.vstepmax_smpswaittimemax <<
445                 vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
446                 (vdd->vp_reg.vstepmax_stepmax <<
447                 vdd->vp_reg.vstepmax_stepmax_shift));
448         vdd->write_reg(vp_val, mod, vdd->vp_offs.vstepmax);
449
450         vp_val = ((vdd->vp_reg.vlimitto_vddmax <<
451                 vdd->vp_reg.vlimitto_vddmax_shift) |
452                 (vdd->vp_reg.vlimitto_vddmin <<
453                 vdd->vp_reg.vlimitto_vddmin_shift) |
454                 (vdd->vp_reg.vlimitto_timeout <<
455                 vdd->vp_reg.vlimitto_timeout_shift));
456         vdd->write_reg(vp_val, mod, vdd->vp_offs.vlimitto);
457 }
458
459 static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
460 {
461         char *name;
462
463         name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
464         if (!name) {
465                 pr_warning("%s: Unable to allocate memory for debugfs"
466                         " directory name for vdd_%s",
467                         __func__, vdd->voltdm.name);
468                 return;
469         }
470         strcpy(name, "vdd_");
471         strcat(name, vdd->voltdm.name);
472
473         vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
474         kfree(name);
475         if (IS_ERR(vdd->debug_dir)) {
476                 pr_warning("%s: Unable to create debugfs directory for"
477                         " vdd_%s\n", __func__, vdd->voltdm.name);
478                 vdd->debug_dir = NULL;
479                 return;
480         }
481
482         (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir,
483                                 &(vdd->vp_reg.vpconfig_errorgain));
484         (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO,
485                                 vdd->debug_dir,
486                                 &(vdd->vp_reg.vstepmin_smpswaittimemin));
487         (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir,
488                                 &(vdd->vp_reg.vstepmin_stepmin));
489         (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO,
490                                 vdd->debug_dir,
491                                 &(vdd->vp_reg.vstepmax_smpswaittimemax));
492         (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir,
493                                 &(vdd->vp_reg.vstepmax_stepmax));
494         (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir,
495                                 &(vdd->vp_reg.vlimitto_vddmax));
496         (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir,
497                                 &(vdd->vp_reg.vlimitto_vddmin));
498         (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir,
499                                 &(vdd->vp_reg.vlimitto_timeout));
500         (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir,
501                                 (void *) vdd, &vp_volt_debug_fops);
502         (void) debugfs_create_file("curr_nominal_volt", S_IRUGO,
503                                 vdd->debug_dir, (void *) vdd,
504                                 &nom_volt_debug_fops);
505 }
506
507 /* Voltage scale and accessory APIs */
508 static int _pre_volt_scale(struct omap_vdd_info *vdd,
509                 unsigned long target_volt, u8 *target_vsel, u8 *current_vsel)
510 {
511         struct omap_volt_data *volt_data;
512         u32 vc_cmdval, vp_errgain_val;
513         u16 vp_mod, vc_mod;
514
515         /* Check if suffiecient pmic info is available for this vdd */
516         if (!vdd->pmic_info) {
517                 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
518                         __func__, vdd->voltdm.name);
519                 return -EINVAL;
520         }
521
522         if (!vdd->pmic_info->uv_to_vsel) {
523                 pr_err("%s: PMIC function to convert voltage in uV to"
524                         "vsel not registered. Hence unable to scale voltage"
525                         "for vdd_%s\n", __func__, vdd->voltdm.name);
526                 return -ENODATA;
527         }
528
529         if (!vdd->read_reg || !vdd->write_reg) {
530                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
531                         __func__, vdd->voltdm.name);
532                 return -EINVAL;
533         }
534
535         vp_mod = vdd->vp_reg.prm_mod;
536         vc_mod = vdd->vc_reg.prm_mod;
537
538         /* Get volt_data corresponding to target_volt */
539         volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt);
540         if (IS_ERR(volt_data))
541                 volt_data = NULL;
542
543         *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
544         *current_vsel = vdd->read_reg(vp_mod, vdd->vp_offs.voltage);
545
546         /* Setting the ON voltage to the new target voltage */
547         vc_cmdval = vdd->read_reg(vc_mod, vdd->vc_reg.cmdval_reg);
548         vc_cmdval &= ~vdd->vc_reg.cmd_on_mask;
549         vc_cmdval |= (*target_vsel << vdd->vc_reg.cmd_on_shift);
550         vdd->write_reg(vc_cmdval, vc_mod, vdd->vc_reg.cmdval_reg);
551
552         /* Setting vp errorgain based on the voltage */
553         if (volt_data) {
554                 vp_errgain_val = vdd->read_reg(vp_mod,
555                                 vdd->vp_offs.vpconfig);
556                 vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
557                 vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
558                 vp_errgain_val |= vdd->vp_reg.vpconfig_errorgain <<
559                                 vdd->vp_reg.vpconfig_errorgain_shift;
560                 vdd->write_reg(vp_errgain_val, vp_mod,
561                                 vdd->vp_offs.vpconfig);
562         }
563
564         return 0;
565 }
566
567 static void _post_volt_scale(struct omap_vdd_info *vdd,
568                 unsigned long target_volt, u8 target_vsel, u8 current_vsel)
569 {
570         u32 smps_steps = 0, smps_delay = 0;
571
572         smps_steps = abs(target_vsel - current_vsel);
573         /* SMPS slew rate / step size. 2us added as buffer. */
574         smps_delay = ((smps_steps * vdd->pmic_info->step_size) /
575                         vdd->pmic_info->slew_rate) + 2;
576         udelay(smps_delay);
577
578         vdd->curr_volt = target_volt;
579 }
580
581 /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
582 static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
583                 unsigned long target_volt)
584 {
585         u32 loop_cnt = 0, retries_cnt = 0;
586         u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
587         u16 mod;
588         u8 target_vsel, current_vsel;
589         int ret;
590
591         ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel);
592         if (ret)
593                 return ret;
594
595         mod = vdd->vc_reg.prm_mod;
596
597         vc_valid = vdd->vc_reg.valid;
598         vc_bypass_val_reg = vdd->vc_reg.bypass_val_reg;
599         vc_bypass_value = (target_vsel << vdd->vc_reg.data_shift) |
600                         (vdd->pmic_info->pmic_reg <<
601                         vdd->vc_reg.regaddr_shift) |
602                         (vdd->pmic_info->i2c_slave_addr <<
603                         vdd->vc_reg.slaveaddr_shift);
604
605         vdd->write_reg(vc_bypass_value, mod, vc_bypass_val_reg);
606         vdd->write_reg(vc_bypass_value | vc_valid, mod, vc_bypass_val_reg);
607
608         vc_bypass_value = vdd->read_reg(mod, vc_bypass_val_reg);
609         /*
610          * Loop till the bypass command is acknowledged from the SMPS.
611          * NOTE: This is legacy code. The loop count and retry count needs
612          * to be revisited.
613          */
614         while (!(vc_bypass_value & vc_valid)) {
615                 loop_cnt++;
616
617                 if (retries_cnt > 10) {
618                         pr_warning("%s: Retry count exceeded\n", __func__);
619                         return -ETIMEDOUT;
620                 }
621
622                 if (loop_cnt > 50) {
623                         retries_cnt++;
624                         loop_cnt = 0;
625                         udelay(10);
626                 }
627                 vc_bypass_value = vdd->read_reg(mod, vc_bypass_val_reg);
628         }
629
630         _post_volt_scale(vdd, target_volt, target_vsel, current_vsel);
631         return 0;
632 }
633
634 /* VP force update method of voltage scaling */
635 static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
636                 unsigned long target_volt)
637 {
638         u32 vpconfig;
639         u16 mod, ocp_mod;
640         u8 target_vsel, current_vsel, prm_irqst_reg;
641         int ret, timeout = 0;
642
643         ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel);
644         if (ret)
645                 return ret;
646
647         mod = vdd->vp_reg.prm_mod;
648         ocp_mod = vdd->ocp_mod;
649         prm_irqst_reg = vdd->prm_irqst_reg;
650
651         /*
652          * Clear all pending TransactionDone interrupt/status. Typical latency
653          * is <3us
654          */
655         while (timeout++ < VP_TRANXDONE_TIMEOUT) {
656                 vdd->write_reg(vdd->vp_reg.tranxdone_status,
657                                 ocp_mod, prm_irqst_reg);
658                 if (!(vdd->read_reg(ocp_mod, prm_irqst_reg) &
659                                 vdd->vp_reg.tranxdone_status))
660                                 break;
661                 udelay(1);
662         }
663         if (timeout >= VP_TRANXDONE_TIMEOUT) {
664                 pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
665                         "Voltage change aborted", __func__, vdd->voltdm.name);
666                 return -ETIMEDOUT;
667         }
668
669         /* Configure for VP-Force Update */
670         vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
671         vpconfig &= ~(vdd->vp_reg.vpconfig_initvdd |
672                         vdd->vp_reg.vpconfig_forceupdate |
673                         vdd->vp_reg.vpconfig_initvoltage_mask);
674         vpconfig |= ((target_vsel <<
675                         vdd->vp_reg.vpconfig_initvoltage_shift));
676         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
677
678         /* Trigger initVDD value copy to voltage processor */
679         vpconfig |= vdd->vp_reg.vpconfig_initvdd;
680         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
681
682         /* Force update of voltage */
683         vpconfig |= vdd->vp_reg.vpconfig_forceupdate;
684         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
685
686         /*
687          * Wait for TransactionDone. Typical latency is <200us.
688          * Depends on SMPSWAITTIMEMIN/MAX and voltage change
689          */
690         timeout = 0;
691         omap_test_timeout((vdd->read_reg(ocp_mod, prm_irqst_reg) &
692                         vdd->vp_reg.tranxdone_status),
693                         VP_TRANXDONE_TIMEOUT, timeout);
694         if (timeout >= VP_TRANXDONE_TIMEOUT)
695                 pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
696                         "TRANXDONE never got set after the voltage update\n",
697                         __func__, vdd->voltdm.name);
698
699         _post_volt_scale(vdd, target_volt, target_vsel, current_vsel);
700
701         /*
702          * Disable TransactionDone interrupt , clear all status, clear
703          * control registers
704          */
705         timeout = 0;
706         while (timeout++ < VP_TRANXDONE_TIMEOUT) {
707                 vdd->write_reg(vdd->vp_reg.tranxdone_status,
708                                 ocp_mod, prm_irqst_reg);
709                 if (!(vdd->read_reg(ocp_mod, prm_irqst_reg) &
710                                 vdd->vp_reg.tranxdone_status))
711                                 break;
712                 udelay(1);
713         }
714
715         if (timeout >= VP_TRANXDONE_TIMEOUT)
716                 pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
717                         "to clear the TRANXDONE status\n",
718                         __func__, vdd->voltdm.name);
719
720         vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
721         /* Clear initVDD copy trigger bit */
722         vpconfig &= ~vdd->vp_reg.vpconfig_initvdd;;
723         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
724         /* Clear force bit */
725         vpconfig &= ~vdd->vp_reg.vpconfig_forceupdate;
726         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
727
728         return 0;
729 }
730
731 /* OMAP3 specific voltage init functions */
732
733 /*
734  * Intializes the voltage controller registers with the PMIC and board
735  * specific parameters and voltage setup times for OMAP3.
736  */
737 static void __init omap3_vc_init(struct omap_vdd_info *vdd)
738 {
739         u32 vc_val;
740         u16 mod;
741         u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
742         static bool is_initialized;
743
744         if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
745                 pr_err("%s: PMIC info requried to configure vc for"
746                         "vdd_%s not populated.Hence cannot initialize vc\n",
747                         __func__, vdd->voltdm.name);
748                 return;
749         }
750
751         if (!vdd->read_reg || !vdd->write_reg) {
752                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
753                         __func__, vdd->voltdm.name);
754                 return;
755         }
756
757         mod = vdd->vc_reg.prm_mod;
758
759         /* Set up the SMPS_SA(i2c slave address in VC */
760         vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_sa_reg);
761         vc_val &= ~vdd->vc_reg.smps_sa_mask;
762         vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_reg.smps_sa_shift;
763         vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_sa_reg);
764
765         /* Setup the VOLRA(pmic reg addr) in VC */
766         vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_volra_reg);
767         vc_val &= ~vdd->vc_reg.smps_volra_mask;
768         vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_reg.smps_volra_shift;
769         vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_volra_reg);
770
771         /*Configure the setup times */
772         vc_val = vdd->read_reg(mod, vdd->vc_reg.voltsetup_reg);
773         vc_val &= ~vdd->vc_reg.voltsetup_mask;
774         vc_val |= vdd->pmic_info->volt_setup_time <<
775                         vdd->vc_reg.voltsetup_shift;
776         vdd->write_reg(vc_val, mod, vdd->vc_reg.voltsetup_reg);
777
778         /* Set up the on, inactive, retention and off voltage */
779         on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
780         onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
781         ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
782         off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
783         vc_val  = ((on_vsel << vdd->vc_reg.cmd_on_shift) |
784                 (onlp_vsel << vdd->vc_reg.cmd_onlp_shift) |
785                 (ret_vsel << vdd->vc_reg.cmd_ret_shift) |
786                 (off_vsel << vdd->vc_reg.cmd_off_shift));
787         vdd->write_reg(vc_val, mod, vdd->vc_reg.cmdval_reg);
788
789         if (is_initialized)
790                 return;
791
792         /* Generic VC parameters init */
793         vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, mod,
794                         OMAP3_PRM_VC_CH_CONF_OFFSET);
795         vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, mod,
796                         OMAP3_PRM_VC_I2C_CFG_OFFSET);
797         vdd->write_reg(OMAP3_CLKSETUP, mod, OMAP3_PRM_CLKSETUP_OFFSET);
798         vdd->write_reg(OMAP3_VOLTOFFSET, mod, OMAP3_PRM_VOLTOFFSET_OFFSET);
799         vdd->write_reg(OMAP3_VOLTSETUP2, mod, OMAP3_PRM_VOLTSETUP2_OFFSET);
800         is_initialized = true;
801 }
802
803 /* Sets up all the VDD related info for OMAP3 */
804 static int __init omap3_vdd_data_configure(struct omap_vdd_info *vdd)
805 {
806         struct clk *sys_ck;
807         u32 sys_clk_speed, timeout_val, waittime;
808
809         if (!vdd->pmic_info) {
810                 pr_err("%s: PMIC info requried to configure vdd_%s not"
811                         "populated.Hence cannot initialize vdd_%s\n",
812                         __func__, vdd->voltdm.name, vdd->voltdm.name);
813                 return -EINVAL;
814         }
815
816         if (!strcmp(vdd->voltdm.name, "mpu")) {
817                 if (cpu_is_omap3630())
818                         vdd->volt_data = omap36xx_vddmpu_volt_data;
819                 else
820                         vdd->volt_data = omap34xx_vddmpu_volt_data;
821
822                 vdd->vp_reg.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK;
823                 vdd->vc_reg.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET;
824                 vdd->vc_reg.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT;
825                 vdd->vc_reg.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK;
826                 vdd->vc_reg.smps_volra_shift = OMAP3430_VOLRA0_SHIFT;
827                 vdd->vc_reg.smps_volra_mask = OMAP3430_VOLRA0_MASK;
828                 vdd->vc_reg.voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT;
829                 vdd->vc_reg.voltsetup_mask = OMAP3430_SETUP_TIME1_MASK;
830         } else if (!strcmp(vdd->voltdm.name, "core")) {
831                 if (cpu_is_omap3630())
832                         vdd->volt_data = omap36xx_vddcore_volt_data;
833                 else
834                         vdd->volt_data = omap34xx_vddcore_volt_data;
835
836                 vdd->vp_reg.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK;
837                 vdd->vc_reg.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET;
838                 vdd->vc_reg.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT;
839                 vdd->vc_reg.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK;
840                 vdd->vc_reg.smps_volra_shift = OMAP3430_VOLRA1_SHIFT;
841                 vdd->vc_reg.smps_volra_mask = OMAP3430_VOLRA1_MASK;
842                 vdd->vc_reg.voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT;
843                 vdd->vc_reg.voltsetup_mask = OMAP3430_SETUP_TIME2_MASK;
844         } else {
845                 pr_warning("%s: vdd_%s does not exisit in OMAP3\n",
846                         __func__, vdd->voltdm.name);
847                 return -EINVAL;
848         }
849
850         /*
851          * Sys clk rate is require to calculate vp timeout value and
852          * smpswaittimemin and smpswaittimemax.
853          */
854         sys_ck = clk_get(NULL, "sys_ck");
855         if (IS_ERR(sys_ck)) {
856                 pr_warning("%s: Could not get the sys clk to calculate"
857                         "various vdd_%s params\n", __func__, vdd->voltdm.name);
858                 return -EINVAL;
859         }
860         sys_clk_speed = clk_get_rate(sys_ck);
861         clk_put(sys_ck);
862         /* Divide to avoid overflow */
863         sys_clk_speed /= 1000;
864
865         /* Generic voltage parameters */
866         vdd->curr_volt = 1200000;
867         vdd->ocp_mod = OCP_MOD;
868         vdd->prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET;
869         vdd->read_reg = omap3_voltage_read_reg;
870         vdd->write_reg = omap3_voltage_write_reg;
871         vdd->volt_scale = vp_forceupdate_scale_voltage;
872         vdd->vp_enabled = false;
873
874         /* VC parameters */
875         vdd->vc_reg.prm_mod = OMAP3430_GR_MOD;
876         vdd->vc_reg.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET;
877         vdd->vc_reg.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET;
878         vdd->vc_reg.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET;
879         vdd->vc_reg.voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET;
880         vdd->vc_reg.data_shift = OMAP3430_DATA_SHIFT;
881         vdd->vc_reg.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT;
882         vdd->vc_reg.regaddr_shift = OMAP3430_REGADDR_SHIFT;
883         vdd->vc_reg.valid = OMAP3430_VALID_MASK;
884         vdd->vc_reg.cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT;
885         vdd->vc_reg.cmd_on_mask = OMAP3430_VC_CMD_ON_MASK;
886         vdd->vc_reg.cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT;
887         vdd->vc_reg.cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT;
888         vdd->vc_reg.cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT;
889
890         vdd->vp_reg.prm_mod = OMAP3430_GR_MOD;
891
892         /* VPCONFIG bit fields */
893         vdd->vp_reg.vpconfig_erroroffset = (vdd->pmic_info->vp_erroroffset <<
894                                  OMAP3430_ERROROFFSET_SHIFT);
895         vdd->vp_reg.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK;
896         vdd->vp_reg.vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT;
897         vdd->vp_reg.vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT;
898         vdd->vp_reg.vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK;
899         vdd->vp_reg.vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK;
900         vdd->vp_reg.vpconfig_initvdd = OMAP3430_INITVDD_MASK;
901         vdd->vp_reg.vpconfig_forceupdate = OMAP3430_FORCEUPDATE_MASK;
902         vdd->vp_reg.vpconfig_vpenable = OMAP3430_VPENABLE_MASK;
903
904         /* VSTEPMIN VSTEPMAX bit fields */
905         waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
906                                 sys_clk_speed) / 1000;
907         vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
908         vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
909         vdd->vp_reg.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
910         vdd->vp_reg.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
911         vdd->vp_reg.vstepmin_smpswaittimemin_shift =
912                                 OMAP3430_SMPSWAITTIMEMIN_SHIFT;
913         vdd->vp_reg.vstepmax_smpswaittimemax_shift =
914                                 OMAP3430_SMPSWAITTIMEMAX_SHIFT;
915         vdd->vp_reg.vstepmin_stepmin_shift = OMAP3430_VSTEPMIN_SHIFT;
916         vdd->vp_reg.vstepmax_stepmax_shift = OMAP3430_VSTEPMAX_SHIFT;
917
918         /* VLIMITTO bit fields */
919         timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
920         vdd->vp_reg.vlimitto_timeout = timeout_val;
921         vdd->vp_reg.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
922         vdd->vp_reg.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
923         vdd->vp_reg.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT;
924         vdd->vp_reg.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT;
925         vdd->vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT;
926
927         return 0;
928 }
929
930 /* OMAP4 specific voltage init functions */
931 static void __init omap4_vc_init(struct omap_vdd_info *vdd)
932 {
933         u32 vc_val;
934         u16 mod;
935         static bool is_initialized;
936
937         if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
938                 pr_err("%s: PMIC info requried to configure vc for"
939                         "vdd_%s not populated.Hence cannot initialize vc\n",
940                         __func__, vdd->voltdm.name);
941                 return;
942         }
943
944         if (!vdd->read_reg || !vdd->write_reg) {
945                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
946                         __func__, vdd->voltdm.name);
947                 return;
948         }
949
950         mod = vdd->vc_reg.prm_mod;
951
952         /* Set up the SMPS_SA(i2c slave address in VC */
953         vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_sa_reg);
954         vc_val &= ~vdd->vc_reg.smps_sa_mask;
955         vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_reg.smps_sa_shift;
956         vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_sa_reg);
957
958         /* Setup the VOLRA(pmic reg addr) in VC */
959         vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_volra_reg);
960         vc_val &= ~vdd->vc_reg.smps_volra_mask;
961         vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_reg.smps_volra_shift;
962         vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_volra_reg);
963
964         /* TODO: Configure setup times and CMD_VAL values*/
965
966         if (is_initialized)
967                 return;
968
969         /* Generic VC parameters init */
970         vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
971                 OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
972                 OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
973         vdd->write_reg(vc_val, mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
974
975         vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
976         vdd->write_reg(vc_val, mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
977
978         is_initialized = true;
979 }
980
981 /* Sets up all the VDD related info for OMAP4 */
982 static int __init omap4_vdd_data_configure(struct omap_vdd_info *vdd)
983 {
984         struct clk *sys_ck;
985         u32 sys_clk_speed, timeout_val, waittime;
986
987         if (!vdd->pmic_info) {
988                 pr_err("%s: PMIC info requried to configure vdd_%s not"
989                         "populated.Hence cannot initialize vdd_%s\n",
990                         __func__, vdd->voltdm.name, vdd->voltdm.name);
991                 return -EINVAL;
992         }
993
994         if (!strcmp(vdd->voltdm.name, "mpu")) {
995                 vdd->volt_data = omap44xx_vdd_mpu_volt_data;
996                 vdd->vp_reg.tranxdone_status =
997                                 OMAP4430_VP_MPU_TRANXDONE_ST_MASK;
998                 vdd->vc_reg.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET;
999                 vdd->vc_reg.smps_sa_shift =
1000                                 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT;
1001                 vdd->vc_reg.smps_sa_mask =
1002                                 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK;
1003                 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT;
1004                 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK;
1005                 vdd->vc_reg.voltsetup_reg =
1006                                 OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET;
1007                 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET;
1008         } else if (!strcmp(vdd->voltdm.name, "core")) {
1009                 vdd->volt_data = omap44xx_vdd_core_volt_data;
1010                 vdd->vp_reg.tranxdone_status =
1011                                 OMAP4430_VP_CORE_TRANXDONE_ST_MASK;
1012                 vdd->vc_reg.cmdval_reg =
1013                                 OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET;
1014                 vdd->vc_reg.smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT;
1015                 vdd->vc_reg.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK;
1016                 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT;
1017                 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK;
1018                 vdd->vc_reg.voltsetup_reg =
1019                                 OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET;
1020                 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
1021         } else if (!strcmp(vdd->voltdm.name, "iva")) {
1022                 vdd->volt_data = omap44xx_vdd_iva_volt_data;
1023                 vdd->vp_reg.tranxdone_status =
1024                                 OMAP4430_VP_IVA_TRANXDONE_ST_MASK;
1025                 vdd->vc_reg.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET;
1026                 vdd->vc_reg.smps_sa_shift =
1027                                 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT;
1028                 vdd->vc_reg.smps_sa_mask =
1029                                 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK;
1030                 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT;
1031                 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK;
1032                 vdd->vc_reg.voltsetup_reg =
1033                                 OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET;
1034                 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
1035         } else {
1036                 pr_warning("%s: vdd_%s does not exisit in OMAP4\n",
1037                         __func__, vdd->voltdm.name);
1038                 return -EINVAL;
1039         }
1040
1041         /*
1042          * Sys clk rate is require to calculate vp timeout value and
1043          * smpswaittimemin and smpswaittimemax.
1044          */
1045         sys_ck = clk_get(NULL, "sys_clkin_ck");
1046         if (IS_ERR(sys_ck)) {
1047                 pr_warning("%s: Could not get the sys clk to calculate"
1048                         "various vdd_%s params\n", __func__, vdd->voltdm.name);
1049                 return -EINVAL;
1050         }
1051         sys_clk_speed = clk_get_rate(sys_ck);
1052         clk_put(sys_ck);
1053         /* Divide to avoid overflow */
1054         sys_clk_speed /= 1000;
1055
1056         /* Generic voltage parameters */
1057         vdd->curr_volt = 1200000;
1058         vdd->ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST;
1059         vdd->read_reg = omap4_voltage_read_reg;
1060         vdd->write_reg = omap4_voltage_write_reg;
1061         vdd->volt_scale = vp_forceupdate_scale_voltage;
1062         vdd->vp_enabled = false;
1063
1064         /* VC parameters */
1065         vdd->vc_reg.prm_mod = OMAP4430_PRM_DEVICE_INST;
1066         vdd->vc_reg.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET;
1067         vdd->vc_reg.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET;
1068         vdd->vc_reg.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET;
1069         vdd->vc_reg.data_shift = OMAP4430_DATA_SHIFT;
1070         vdd->vc_reg.slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT;
1071         vdd->vc_reg.regaddr_shift = OMAP4430_REGADDR_SHIFT;
1072         vdd->vc_reg.valid = OMAP4430_VALID_MASK;
1073         vdd->vc_reg.cmd_on_shift = OMAP4430_ON_SHIFT;
1074         vdd->vc_reg.cmd_on_mask = OMAP4430_ON_MASK;
1075         vdd->vc_reg.cmd_onlp_shift = OMAP4430_ONLP_SHIFT;
1076         vdd->vc_reg.cmd_ret_shift = OMAP4430_RET_SHIFT;
1077         vdd->vc_reg.cmd_off_shift = OMAP4430_OFF_SHIFT;
1078
1079         vdd->vp_reg.prm_mod = OMAP4430_PRM_DEVICE_INST;
1080
1081         /* VPCONFIG bit fields */
1082         vdd->vp_reg.vpconfig_erroroffset = (vdd->pmic_info->vp_erroroffset <<
1083                                  OMAP4430_ERROROFFSET_SHIFT);
1084         vdd->vp_reg.vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK;
1085         vdd->vp_reg.vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT;
1086         vdd->vp_reg.vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT;
1087         vdd->vp_reg.vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK;
1088         vdd->vp_reg.vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK;
1089         vdd->vp_reg.vpconfig_initvdd = OMAP4430_INITVDD_MASK;
1090         vdd->vp_reg.vpconfig_forceupdate = OMAP4430_FORCEUPDATE_MASK;
1091         vdd->vp_reg.vpconfig_vpenable = OMAP4430_VPENABLE_MASK;
1092
1093         /* VSTEPMIN VSTEPMAX bit fields */
1094         waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
1095                                 sys_clk_speed) / 1000;
1096         vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
1097         vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
1098         vdd->vp_reg.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
1099         vdd->vp_reg.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
1100         vdd->vp_reg.vstepmin_smpswaittimemin_shift =
1101                         OMAP4430_SMPSWAITTIMEMIN_SHIFT;
1102         vdd->vp_reg.vstepmax_smpswaittimemax_shift =
1103                         OMAP4430_SMPSWAITTIMEMAX_SHIFT;
1104         vdd->vp_reg.vstepmin_stepmin_shift = OMAP4430_VSTEPMIN_SHIFT;
1105         vdd->vp_reg.vstepmax_stepmax_shift = OMAP4430_VSTEPMAX_SHIFT;
1106
1107         /* VLIMITTO bit fields */
1108         timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
1109         vdd->vp_reg.vlimitto_timeout = timeout_val;
1110         vdd->vp_reg.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
1111         vdd->vp_reg.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
1112         vdd->vp_reg.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT;
1113         vdd->vp_reg.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT;
1114         vdd->vp_reg.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT;
1115
1116         return 0;
1117 }
1118
1119 /* Public functions */
1120 /**
1121  * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage
1122  * @voltdm:     pointer to the VDD for which current voltage info is needed
1123  *
1124  * API to get the current non-auto-compensated voltage for a VDD.
1125  * Returns 0 in case of error else returns the current voltage for the VDD.
1126  */
1127 unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm)
1128 {
1129         struct omap_vdd_info *vdd;
1130
1131         if (!voltdm || IS_ERR(voltdm)) {
1132                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1133                 return 0;
1134         }
1135
1136         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1137
1138         return vdd->curr_volt;
1139 }
1140
1141 /**
1142  * omap_vp_get_curr_volt() - API to get the current vp voltage.
1143  * @voltdm:     pointer to the VDD.
1144  *
1145  * This API returns the current voltage for the specified voltage processor
1146  */
1147 unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
1148 {
1149         struct omap_vdd_info *vdd;
1150         u8 curr_vsel;
1151
1152         if (!voltdm || IS_ERR(voltdm)) {
1153                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1154                 return 0;
1155         }
1156
1157         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1158         if (!vdd->read_reg) {
1159                 pr_err("%s: No read API for reading vdd_%s regs\n",
1160                         __func__, voltdm->name);
1161                 return 0;
1162         }
1163
1164         curr_vsel = vdd->read_reg(vdd->vp_reg.prm_mod,
1165                         vdd->vp_offs.voltage);
1166
1167         if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
1168                 pr_warning("%s: PMIC function to convert vsel to voltage"
1169                         "in uV not registerd\n", __func__);
1170                 return 0;
1171         }
1172
1173         return vdd->pmic_info->vsel_to_uv(curr_vsel);
1174 }
1175
1176 /**
1177  * omap_vp_enable() - API to enable a particular VP
1178  * @voltdm:     pointer to the VDD whose VP is to be enabled.
1179  *
1180  * This API enables a particular voltage processor. Needed by the smartreflex
1181  * class drivers.
1182  */
1183 void omap_vp_enable(struct voltagedomain *voltdm)
1184 {
1185         struct omap_vdd_info *vdd;
1186         u32 vpconfig;
1187         u16 mod;
1188
1189         if (!voltdm || IS_ERR(voltdm)) {
1190                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1191                 return;
1192         }
1193
1194         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1195         if (!vdd->read_reg || !vdd->write_reg) {
1196                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
1197                         __func__, voltdm->name);
1198                 return;
1199         }
1200
1201         mod = vdd->vp_reg.prm_mod;
1202
1203         /* If VP is already enabled, do nothing. Return */
1204         if (vdd->vp_enabled)
1205                 return;
1206
1207         vp_latch_vsel(vdd);
1208
1209         /* Enable VP */
1210         vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
1211         vpconfig |= vdd->vp_reg.vpconfig_vpenable;
1212         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
1213         vdd->vp_enabled = true;
1214 }
1215
1216 /**
1217  * omap_vp_disable() - API to disable a particular VP
1218  * @voltdm:     pointer to the VDD whose VP is to be disabled.
1219  *
1220  * This API disables a particular voltage processor. Needed by the smartreflex
1221  * class drivers.
1222  */
1223 void omap_vp_disable(struct voltagedomain *voltdm)
1224 {
1225         struct omap_vdd_info *vdd;
1226         u32 vpconfig;
1227         u16 mod;
1228         int timeout;
1229
1230         if (!voltdm || IS_ERR(voltdm)) {
1231                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1232                 return;
1233         }
1234
1235         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1236         if (!vdd->read_reg || !vdd->write_reg) {
1237                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
1238                         __func__, voltdm->name);
1239                 return;
1240         }
1241
1242         mod = vdd->vp_reg.prm_mod;
1243
1244         /* If VP is already disabled, do nothing. Return */
1245         if (!vdd->vp_enabled) {
1246                 pr_warning("%s: Trying to disable VP for vdd_%s when"
1247                         "it is already disabled\n", __func__, voltdm->name);
1248                 return;
1249         }
1250
1251         /* Disable VP */
1252         vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
1253         vpconfig &= ~vdd->vp_reg.vpconfig_vpenable;
1254         vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
1255
1256         /*
1257          * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
1258          */
1259         omap_test_timeout((vdd->read_reg(mod, vdd->vp_offs.vstatus)),
1260                                 VP_IDLE_TIMEOUT, timeout);
1261
1262         if (timeout >= VP_IDLE_TIMEOUT)
1263                 pr_warning("%s: vdd_%s idle timedout\n",
1264                         __func__, voltdm->name);
1265
1266         vdd->vp_enabled = false;
1267
1268         return;
1269 }
1270
1271 /**
1272  * omap_voltage_scale_vdd() - API to scale voltage of a particular
1273  *                              voltage domain.
1274  * @voltdm:     pointer to the VDD which is to be scaled.
1275  * @target_volt:        The target voltage of the voltage domain
1276  *
1277  * This API should be called by the kernel to do the voltage scaling
1278  * for a particular voltage domain during dvfs or any other situation.
1279  */
1280 int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
1281                 unsigned long target_volt)
1282 {
1283         struct omap_vdd_info *vdd;
1284
1285         if (!voltdm || IS_ERR(voltdm)) {
1286                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1287                 return -EINVAL;
1288         }
1289
1290         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1291
1292         if (!vdd->volt_scale) {
1293                 pr_err("%s: No voltage scale API registered for vdd_%s\n",
1294                         __func__, voltdm->name);
1295                 return -ENODATA;
1296         }
1297
1298         return vdd->volt_scale(vdd, target_volt);
1299 }
1300
1301 /**
1302  * omap_voltage_reset() - Resets the voltage of a particular voltage domain
1303  *                      to that of the current OPP.
1304  * @voltdm:     pointer to the VDD whose voltage is to be reset.
1305  *
1306  * This API finds out the correct voltage the voltage domain is supposed
1307  * to be at and resets the voltage to that level. Should be used expecially
1308  * while disabling any voltage compensation modules.
1309  */
1310 void omap_voltage_reset(struct voltagedomain *voltdm)
1311 {
1312         unsigned long target_uvdc;
1313
1314         if (!voltdm || IS_ERR(voltdm)) {
1315                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1316                 return;
1317         }
1318
1319         target_uvdc = omap_voltage_get_nom_volt(voltdm);
1320         if (!target_uvdc) {
1321                 pr_err("%s: unable to find current voltage for vdd_%s\n",
1322                         __func__, voltdm->name);
1323                 return;
1324         }
1325
1326         omap_voltage_scale_vdd(voltdm, target_uvdc);
1327 }
1328
1329 /**
1330  * omap_voltage_get_volttable() - API to get the voltage table associated with a
1331  *                              particular voltage domain.
1332  * @voltdm:     pointer to the VDD for which the voltage table is required
1333  * @volt_data:  the voltage table for the particular vdd which is to be
1334  *              populated by this API
1335  *
1336  * This API populates the voltage table associated with a VDD into the
1337  * passed parameter pointer. Returns the count of distinct voltages
1338  * supported by this vdd.
1339  *
1340  */
1341 void omap_voltage_get_volttable(struct voltagedomain *voltdm,
1342                 struct omap_volt_data **volt_data)
1343 {
1344         struct omap_vdd_info *vdd;
1345
1346         if (!voltdm || IS_ERR(voltdm)) {
1347                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1348                 return;
1349         }
1350
1351         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1352
1353         *volt_data = vdd->volt_data;
1354 }
1355
1356 /**
1357  * omap_voltage_get_voltdata() - API to get the voltage table entry for a
1358  *                              particular voltage
1359  * @voltdm:     pointer to the VDD whose voltage table has to be searched
1360  * @volt:       the voltage to be searched in the voltage table
1361  *
1362  * This API searches through the voltage table for the required voltage
1363  * domain and tries to find a matching entry for the passed voltage volt.
1364  * If a matching entry is found volt_data is populated with that entry.
1365  * This API searches only through the non-compensated voltages int the
1366  * voltage table.
1367  * Returns pointer to the voltage table entry corresponding to volt on
1368  * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage
1369  * domain or if there is no matching entry.
1370  */
1371 struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
1372                 unsigned long volt)
1373 {
1374         struct omap_vdd_info *vdd;
1375         int i;
1376
1377         if (!voltdm || IS_ERR(voltdm)) {
1378                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1379                 return ERR_PTR(-EINVAL);
1380         }
1381
1382         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1383
1384         if (!vdd->volt_data) {
1385                 pr_warning("%s: voltage table does not exist for vdd_%s\n",
1386                         __func__, voltdm->name);
1387                 return ERR_PTR(-ENODATA);
1388         }
1389
1390         for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) {
1391                 if (vdd->volt_data[i].volt_nominal == volt)
1392                         return &vdd->volt_data[i];
1393         }
1394
1395         pr_notice("%s: Unable to match the current voltage with the voltage"
1396                 "table for vdd_%s\n", __func__, voltdm->name);
1397
1398         return ERR_PTR(-ENODATA);
1399 }
1400
1401 /**
1402  * omap_voltage_register_pmic() - API to register PMIC specific data
1403  * @voltdm:     pointer to the VDD for which the PMIC specific data is
1404  *              to be registered
1405  * @pmic_info:  the structure containing pmic info
1406  *
1407  * This API is to be called by the SOC/PMIC file to specify the
1408  * pmic specific info as present in omap_volt_pmic_info structure.
1409  */
1410 int omap_voltage_register_pmic(struct voltagedomain *voltdm,
1411                 struct omap_volt_pmic_info *pmic_info)
1412 {
1413         struct omap_vdd_info *vdd;
1414
1415         if (!voltdm || IS_ERR(voltdm)) {
1416                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1417                 return -EINVAL;
1418         }
1419
1420         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1421
1422         vdd->pmic_info = pmic_info;
1423
1424         return 0;
1425 }
1426
1427 /**
1428  * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory
1429  *                              corresponding to a voltage domain.
1430  *
1431  * @voltdm:     pointer to the VDD whose debug directory is required.
1432  *
1433  * This API returns pointer to the debugfs directory corresponding
1434  * to the voltage domain. Should be used by drivers requiring to
1435  * add any debug entry for a particular voltage domain. Returns NULL
1436  * in case of error.
1437  */
1438 struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm)
1439 {
1440         struct omap_vdd_info *vdd;
1441
1442         if (!voltdm || IS_ERR(voltdm)) {
1443                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1444                 return NULL;
1445         }
1446
1447         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1448
1449         return vdd->debug_dir;
1450 }
1451
1452 /**
1453  * omap_change_voltscale_method() - API to change the voltage scaling method.
1454  * @voltdm:     pointer to the VDD whose voltage scaling method
1455  *              has to be changed.
1456  * @voltscale_method:   the method to be used for voltage scaling.
1457  *
1458  * This API can be used by the board files to change the method of voltage
1459  * scaling between vpforceupdate and vcbypass. The parameter values are
1460  * defined in voltage.h
1461  */
1462 void omap_change_voltscale_method(struct voltagedomain *voltdm,
1463                 int voltscale_method)
1464 {
1465         struct omap_vdd_info *vdd;
1466
1467         if (!voltdm || IS_ERR(voltdm)) {
1468                 pr_warning("%s: VDD specified does not exist!\n", __func__);
1469                 return;
1470         }
1471
1472         vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1473
1474         switch (voltscale_method) {
1475         case VOLTSCALE_VPFORCEUPDATE:
1476                 vdd->volt_scale = vp_forceupdate_scale_voltage;
1477                 return;
1478         case VOLTSCALE_VCBYPASS:
1479                 vdd->volt_scale = vc_bypass_scale_voltage;
1480                 return;
1481         default:
1482                 pr_warning("%s: Trying to change the method of voltage scaling"
1483                         "to an unsupported one!\n", __func__);
1484         }
1485 }
1486
1487 /**
1488  * omap_voltage_domain_lookup() - API to get the voltage domain pointer
1489  * @name:       Name of the voltage domain
1490  *
1491  * This API looks up in the global vdd_info struct for the
1492  * existence of voltage domain <name>. If it exists, the API returns
1493  * a pointer to the voltage domain structure corresponding to the
1494  * VDD<name>. Else retuns error pointer.
1495  */
1496 struct voltagedomain *omap_voltage_domain_lookup(char *name)
1497 {
1498         int i;
1499
1500         if (!vdd_info) {
1501                 pr_err("%s: Voltage driver init not yet happened.Faulting!\n",
1502                         __func__);
1503                 return ERR_PTR(-EINVAL);
1504         }
1505
1506         if (!name) {
1507                 pr_err("%s: No name to get the votage domain!\n", __func__);
1508                 return ERR_PTR(-EINVAL);
1509         }
1510
1511         for (i = 0; i < nr_scalable_vdd; i++) {
1512                 if (!(strcmp(name, vdd_info[i].voltdm.name)))
1513                         return &vdd_info[i].voltdm;
1514         }
1515
1516         return ERR_PTR(-EINVAL);
1517 }
1518
1519 /**
1520  * omap_voltage_late_init() - Init the various voltage parameters
1521  *
1522  * This API is to be called in the later stages of the
1523  * system boot to init the voltage controller and
1524  * voltage processors.
1525  */
1526 int __init omap_voltage_late_init(void)
1527 {
1528         int i;
1529
1530         if (!vdd_info) {
1531                 pr_err("%s: Voltage driver support not added\n",
1532                         __func__);
1533                 return -EINVAL;
1534         }
1535
1536         voltage_dir = debugfs_create_dir("voltage", NULL);
1537         if (IS_ERR(voltage_dir))
1538                 pr_err("%s: Unable to create voltage debugfs main dir\n",
1539                         __func__);
1540         for (i = 0; i < nr_scalable_vdd; i++) {
1541                 if (vdd_data_configure(&vdd_info[i]))
1542                         continue;
1543                 vc_init(&vdd_info[i]);
1544                 vp_init(&vdd_info[i]);
1545                 vdd_debugfs_init(&vdd_info[i]);
1546         }
1547
1548         return 0;
1549 }
1550
1551 /**
1552  * omap_voltage_early_init()- Volatage driver early init
1553  */
1554 static int __init omap_voltage_early_init(void)
1555 {
1556         if (cpu_is_omap34xx()) {
1557                 vdd_info = omap3_vdd_info;
1558                 nr_scalable_vdd = OMAP3_NR_SCALABLE_VDD;
1559                 vc_init = omap3_vc_init;
1560                 vdd_data_configure = omap3_vdd_data_configure;
1561         } else if (cpu_is_omap44xx()) {
1562                 vdd_info = omap4_vdd_info;
1563                 nr_scalable_vdd = OMAP4_NR_SCALABLE_VDD;
1564                 vc_init = omap4_vc_init;
1565                 vdd_data_configure = omap4_vdd_data_configure;
1566         } else {
1567                 pr_warning("%s: voltage driver support not added\n", __func__);
1568         }
1569
1570         return 0;
1571 }
1572 core_initcall(omap_voltage_early_init);