OMAP2+: powerdomains: move powerdomain static data to .c files
[linux-2.6.git] / arch / arm / mach-omap2 / powerdomain2xxx_3xxx.c
1 /*
2  * OMAP2 and OMAP3 powerdomain control
3  *
4  * Copyright (C) 2009-2010 Texas Instruments, Inc.
5  * Copyright (C) 2007-2009 Nokia Corporation
6  *
7  * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
8  * Rajendra Nayak <rnayak@ti.com>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14
15 #include <linux/io.h>
16 #include <linux/errno.h>
17 #include <linux/delay.h>
18
19 #include <plat/prcm.h>
20
21 #include "prm-regbits-34xx.h"
22 #include "powerdomains.h"
23 #include "prm.h"
24 #include "prm-regbits-24xx.h"
25 #include "prm-regbits-34xx.h"
26
27
28 /* Common functions across OMAP2 and OMAP3 */
29 static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
30 {
31         prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
32                                 (pwrst << OMAP_POWERSTATE_SHIFT),
33                                 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
34         return 0;
35 }
36
37 static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
38 {
39         return prm_read_mod_bits_shift(pwrdm->prcm_offs,
40                                 OMAP2_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
41 }
42
43 static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
44 {
45         return prm_read_mod_bits_shift(pwrdm->prcm_offs,
46                                 OMAP2_PM_PWSTST, OMAP_POWERSTATEST_MASK);
47 }
48
49 static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
50                                                                 u8 pwrst)
51 {
52         u32 m;
53
54         m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
55
56         prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
57                                 OMAP2_PM_PWSTCTRL);
58
59         return 0;
60 }
61
62 static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
63                                                                 u8 pwrst)
64 {
65         u32 m;
66
67         m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
68
69         prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
70                                 OMAP2_PM_PWSTCTRL);
71
72         return 0;
73 }
74
75 static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
76 {
77         u32 m;
78
79         m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
80
81         return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, m);
82 }
83
84 static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
85 {
86         u32 m;
87
88         m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
89
90         return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, m);
91 }
92
93 static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
94 {
95         u32 v;
96
97         v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK);
98         prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
99                                 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
100
101         return 0;
102 }
103
104 static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm)
105 {
106         u32 c = 0;
107
108         /*
109          * REVISIT: pwrdm_wait_transition() may be better implemented
110          * via a callback and a periodic timer check -- how long do we expect
111          * powerdomain transitions to take?
112          */
113
114         /* XXX Is this udelay() value meaningful? */
115         while ((prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) &
116                 OMAP_INTRANSITION_MASK) &&
117                 (c++ < PWRDM_TRANSITION_BAILOUT))
118                         udelay(1);
119
120         if (c > PWRDM_TRANSITION_BAILOUT) {
121                 printk(KERN_ERR "powerdomain: waited too long for "
122                         "powerdomain %s to complete transition\n", pwrdm->name);
123                 return -EAGAIN;
124         }
125
126         pr_debug("powerdomain: completed transition in %d loops\n", c);
127
128         return 0;
129 }
130
131 /* Applicable only for OMAP3. Not supported on OMAP2 */
132 static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
133 {
134         return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
135                                 OMAP3430_LASTPOWERSTATEENTERED_MASK);
136 }
137
138 static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
139 {
140         return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST,
141                                 OMAP3430_LOGICSTATEST_MASK);
142 }
143
144 static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
145 {
146         return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL,
147                                 OMAP3430_LOGICSTATEST_MASK);
148 }
149
150 static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
151 {
152         return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
153                                 OMAP3430_LASTLOGICSTATEENTERED_MASK);
154 }
155
156 static int omap3_get_mem_bank_lastmemst_mask(u8 bank)
157 {
158         switch (bank) {
159         case 0:
160                 return OMAP3430_LASTMEM1STATEENTERED_MASK;
161         case 1:
162                 return OMAP3430_LASTMEM2STATEENTERED_MASK;
163         case 2:
164                 return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
165         case 3:
166                 return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
167         default:
168                 WARN_ON(1); /* should never happen */
169                 return -EEXIST;
170         }
171         return 0;
172 }
173
174 static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
175 {
176         u32 m;
177
178         m = omap3_get_mem_bank_lastmemst_mask(bank);
179
180         return prm_read_mod_bits_shift(pwrdm->prcm_offs,
181                                 OMAP3430_PM_PREPWSTST, m);
182 }
183
184 static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
185 {
186         prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
187         return 0;
188 }
189
190 static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
191 {
192         return prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
193                                 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
194 }
195
196 static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
197 {
198         return prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
199                                 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
200 }
201
202 struct pwrdm_ops omap2_pwrdm_operations = {
203         .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
204         .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
205         .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
206         .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
207         .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
208         .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
209         .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
210         .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
211         .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
212 };
213
214 struct pwrdm_ops omap3_pwrdm_operations = {
215         .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
216         .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
217         .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
218         .pwrdm_read_prev_pwrst  = omap3_pwrdm_read_prev_pwrst,
219         .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
220         .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
221         .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst,
222         .pwrdm_read_prev_logic_pwrst    = omap3_pwrdm_read_prev_logic_pwrst,
223         .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
224         .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
225         .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
226         .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
227         .pwrdm_read_prev_mem_pwrst      = omap3_pwrdm_read_prev_mem_pwrst,
228         .pwrdm_clear_all_prev_pwrst     = omap3_pwrdm_clear_all_prev_pwrst,
229         .pwrdm_enable_hdwr_sar  = omap3_pwrdm_enable_hdwr_sar,
230         .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar,
231         .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
232 };