Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6.git] / arch / arm / mach-omap2 / mcbsp.c
1 /*
2  * linux/arch/arm/mach-omap2/mcbsp.c
3  *
4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * Multichannel mode not supported.
12  */
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
17 #include <linux/io.h>
18 #include <linux/platform_device.h>
19
20 #include <mach/irqs.h>
21 #include <mach/dma.h>
22 #include <mach/mux.h>
23 #include <mach/cpu.h>
24 #include <mach/mcbsp.h>
25
26 static void omap2_mcbsp2_mux_setup(void)
27 {
28         omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
29         omap_cfg_reg(R14_24XX_MCBSP2_FSX);
30         omap_cfg_reg(W15_24XX_MCBSP2_DR);
31         omap_cfg_reg(V15_24XX_MCBSP2_DX);
32         omap_cfg_reg(V14_24XX_GPIO117);
33         /*
34          * TODO: Need to add MUX settings for OMAP 2430 SDP
35          */
36 }
37
38 static void omap2_mcbsp_request(unsigned int id)
39 {
40         if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
41                 omap2_mcbsp2_mux_setup();
42 }
43
44 static struct omap_mcbsp_ops omap2_mcbsp_ops = {
45         .request        = omap2_mcbsp_request,
46 };
47
48 #ifdef CONFIG_ARCH_OMAP2420
49 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
50         {
51                 .phys_base      = OMAP24XX_MCBSP1_BASE,
52                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
53                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
54                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
55                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
56                 .ops            = &omap2_mcbsp_ops,
57         },
58         {
59                 .phys_base      = OMAP24XX_MCBSP2_BASE,
60                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
61                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
62                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
63                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
64                 .ops            = &omap2_mcbsp_ops,
65         },
66 };
67 #define OMAP2420_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2420_mcbsp_pdata)
68 #else
69 #define omap2420_mcbsp_pdata            NULL
70 #define OMAP2420_MCBSP_PDATA_SZ         0
71 #endif
72
73 #ifdef CONFIG_ARCH_OMAP2430
74 static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
75         {
76                 .phys_base      = OMAP24XX_MCBSP1_BASE,
77                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
78                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
79                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
80                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
81                 .ops            = &omap2_mcbsp_ops,
82         },
83         {
84                 .phys_base      = OMAP24XX_MCBSP2_BASE,
85                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
86                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
87                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
88                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
89                 .ops            = &omap2_mcbsp_ops,
90         },
91         {
92                 .phys_base      = OMAP2430_MCBSP3_BASE,
93                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
94                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
95                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
96                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
97                 .ops            = &omap2_mcbsp_ops,
98         },
99         {
100                 .phys_base      = OMAP2430_MCBSP4_BASE,
101                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
102                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
103                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
104                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
105                 .ops            = &omap2_mcbsp_ops,
106         },
107         {
108                 .phys_base      = OMAP2430_MCBSP5_BASE,
109                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
110                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
111                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
112                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
113                 .ops            = &omap2_mcbsp_ops,
114         },
115 };
116 #define OMAP2430_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2430_mcbsp_pdata)
117 #else
118 #define omap2430_mcbsp_pdata            NULL
119 #define OMAP2430_MCBSP_PDATA_SZ         0
120 #endif
121
122 #ifdef CONFIG_ARCH_OMAP34XX
123 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
124         {
125                 .phys_base      = OMAP34XX_MCBSP1_BASE,
126                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
127                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
128                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
129                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
130                 .ops            = &omap2_mcbsp_ops,
131                 .buffer_size    = 0x6F,
132         },
133         {
134                 .phys_base      = OMAP34XX_MCBSP2_BASE,
135                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
136                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
137                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
138                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
139                 .ops            = &omap2_mcbsp_ops,
140                 .buffer_size    = 0x3FF,
141         },
142         {
143                 .phys_base      = OMAP34XX_MCBSP3_BASE,
144                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
145                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
146                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
147                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
148                 .ops            = &omap2_mcbsp_ops,
149                 .buffer_size    = 0x6F,
150         },
151         {
152                 .phys_base      = OMAP34XX_MCBSP4_BASE,
153                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
154                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
155                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
156                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
157                 .ops            = &omap2_mcbsp_ops,
158                 .buffer_size    = 0x6F,
159         },
160         {
161                 .phys_base      = OMAP34XX_MCBSP5_BASE,
162                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
163                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
164                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
165                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
166                 .ops            = &omap2_mcbsp_ops,
167                 .buffer_size    = 0x6F,
168         },
169 };
170 #define OMAP34XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap34xx_mcbsp_pdata)
171 #else
172 #define omap34xx_mcbsp_pdata            NULL
173 #define OMAP34XX_MCBSP_PDATA_SZ         0
174 #endif
175
176 static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
177         {
178                 .phys_base      = OMAP44XX_MCBSP1_BASE,
179                 .dma_rx_sync    = OMAP44XX_DMA_MCBSP1_RX,
180                 .dma_tx_sync    = OMAP44XX_DMA_MCBSP1_TX,
181                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
182                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
183                 .ops            = &omap2_mcbsp_ops,
184         },
185         {
186                 .phys_base      = OMAP44XX_MCBSP2_BASE,
187                 .dma_rx_sync    = OMAP44XX_DMA_MCBSP2_RX,
188                 .dma_tx_sync    = OMAP44XX_DMA_MCBSP2_TX,
189                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
190                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
191                 .ops            = &omap2_mcbsp_ops,
192         },
193         {
194                 .phys_base      = OMAP44XX_MCBSP3_BASE,
195                 .dma_rx_sync    = OMAP44XX_DMA_MCBSP3_RX,
196                 .dma_tx_sync    = OMAP44XX_DMA_MCBSP3_TX,
197                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
198                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
199                 .ops            = &omap2_mcbsp_ops,
200         },
201         {
202                 .phys_base      = OMAP44XX_MCBSP4_BASE,
203                 .dma_rx_sync    = OMAP44XX_DMA_MCBSP4_RX,
204                 .dma_tx_sync    = OMAP44XX_DMA_MCBSP4_TX,
205                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
206                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
207                 .ops            = &omap2_mcbsp_ops,
208         },
209 };
210 #define OMAP44XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap44xx_mcbsp_pdata)
211
212 static int __init omap2_mcbsp_init(void)
213 {
214         if (cpu_is_omap2420())
215                 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
216         if (cpu_is_omap2430())
217                 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
218         if (cpu_is_omap34xx())
219                 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
220         if (cpu_is_omap44xx())
221                 omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;
222
223         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
224                                                                 GFP_KERNEL);
225         if (!mcbsp_ptr)
226                 return -ENOMEM;
227
228         if (cpu_is_omap2420())
229                 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
230                                                 OMAP2420_MCBSP_PDATA_SZ);
231         if (cpu_is_omap2430())
232                 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
233                                                 OMAP2430_MCBSP_PDATA_SZ);
234         if (cpu_is_omap34xx())
235                 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
236                                                 OMAP34XX_MCBSP_PDATA_SZ);
237         if (cpu_is_omap44xx())
238                 omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
239                                                 OMAP44XX_MCBSP_PDATA_SZ);
240
241         return omap_mcbsp_init();
242 }
243 arch_initcall(omap2_mcbsp_init);