arch/arm/mach-omap1/board-fsample.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-fsample.c
   3  *
   4  * Modified from board-perseus2.c
   5  *
   6  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
   7  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13 #include <linux/gpio.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/delay.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <linux/input.h>
  23 #include <linux/smc91x.h>
  24 #include <linux/omapfb.h>
  25
  26 #include <asm/mach-types.h>
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <plat/tc.h>
  31 #include <plat/mux.h>
  32 #include <plat/flash.h>
  33 #include <plat/fpga.h>
  34 #include <plat/keypad.h>
  35 #include <plat/board.h>
  36
  37 #include <mach/hardware.h>
  38
  39 #include "iomap.h"
  40 #include "common.h"
  41
  42 /* fsample is pretty close to p2-sample */
  43
  44 #define fsample_cpld_read(reg) __raw_readb(reg)
  45 #define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
  46
  47 #define FSAMPLE_CPLD_BASE    0xE8100000
  48 #define FSAMPLE_CPLD_SIZE    SZ_4K
  49 #define FSAMPLE_CPLD_START   0x05080000
  50
  51 #define FSAMPLE_CPLD_REG_A   (FSAMPLE_CPLD_BASE + 0x00)
  52 #define FSAMPLE_CPLD_SWITCH  (FSAMPLE_CPLD_BASE + 0x02)
  53 #define FSAMPLE_CPLD_UART    (FSAMPLE_CPLD_BASE + 0x02)
  54 #define FSAMPLE_CPLD_REG_B   (FSAMPLE_CPLD_BASE + 0x04)
  55 #define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
  56 #define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
  57
  58 #define FSAMPLE_CPLD_BIT_BT_RESET         0
  59 #define FSAMPLE_CPLD_BIT_LCD_RESET        1
  60 #define FSAMPLE_CPLD_BIT_CAM_PWDN         2
  61 #define FSAMPLE_CPLD_BIT_CHARGER_ENABLE   3
  62 #define FSAMPLE_CPLD_BIT_SD_MMC_EN        4
  63 #define FSAMPLE_CPLD_BIT_aGPS_PWREN       5
  64 #define FSAMPLE_CPLD_BIT_BACKLIGHT        6
  65 #define FSAMPLE_CPLD_BIT_aGPS_EN_RESET    7
  66 #define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N    8
  67 #define FSAMPLE_CPLD_BIT_OTG_RESET        9
  68
  69 #define fsample_cpld_set(bit) \
  70     fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
  71
  72 #define fsample_cpld_clear(bit) \
  73     fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
  74
  75 static const unsigned int fsample_keymap[] = {
  76         KEY(0, 0, KEY_UP),
  77         KEY(1, 0, KEY_RIGHT),
  78         KEY(2, 0, KEY_LEFT),
  79         KEY(3, 0, KEY_DOWN),
  80         KEY(4, 0, KEY_ENTER),
  81         KEY(0, 1, KEY_F10),
  82         KEY(1, 1, KEY_SEND),
  83         KEY(2, 1, KEY_END),
  84         KEY(3, 1, KEY_VOLUMEDOWN),
  85         KEY(4, 1, KEY_VOLUMEUP),
  86         KEY(5, 1, KEY_RECORD),
  87         KEY(0, 2, KEY_F9),
  88         KEY(1, 2, KEY_3),
  89         KEY(2, 2, KEY_6),
  90         KEY(3, 2, KEY_9),
  91         KEY(4, 2, KEY_KPDOT),
  92         KEY(0, 3, KEY_BACK),
  93         KEY(1, 3, KEY_2),
  94         KEY(2, 3, KEY_5),
  95         KEY(3, 3, KEY_8),
  96         KEY(4, 3, KEY_0),
  97         KEY(5, 3, KEY_KPSLASH),
  98         KEY(0, 4, KEY_HOME),
  99         KEY(1, 4, KEY_1),
 100         KEY(2, 4, KEY_4),
 101         KEY(3, 4, KEY_7),
 102         KEY(4, 4, KEY_KPASTERISK),
 103         KEY(5, 4, KEY_POWER),
 104 };
 105
 106 static struct smc91x_platdata smc91x_info = {
 107         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 108         .leda   = RPC_LED_100_10,
 109         .ledb   = RPC_LED_TX_RX,
 110 };
 111
 112 static struct resource smc91x_resources[] = {
 113         [0] = {
 114                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
 115                 .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
 116                 .flags  = IORESOURCE_MEM,
 117         },
 118         [1] = {
 119                 .start  = INT_7XX_MPU_EXT_NIRQ,
 120                 .end    = 0,
 121                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 122         },
 123 };
 124
 125 static void __init fsample_init_smc91x(void)
 126 {
 127         fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
 128         mdelay(50);
 129         fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
 130                    H2P2_DBG_FPGA_LAN_RESET);
 131         mdelay(50);
 132 }
 133
 134 static struct mtd_partition nor_partitions[] = {
 135         /* bootloader (U-Boot, etc) in first sector */
 136         {
 137               .name             = "bootloader",
 138               .offset           = 0,
 139               .size             = SZ_128K,
 140               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 141         },
 142         /* bootloader params in the next sector */
 143         {
 144               .name             = "params",
 145               .offset           = MTDPART_OFS_APPEND,
 146               .size             = SZ_128K,
 147               .mask_flags       = 0,
 148         },
 149         /* kernel */
 150         {
 151               .name             = "kernel",
 152               .offset           = MTDPART_OFS_APPEND,
 153               .size             = SZ_2M,
 154               .mask_flags       = 0
 155         },
 156         /* rest of flash is a file system */
 157         {
 158               .name             = "rootfs",
 159               .offset           = MTDPART_OFS_APPEND,
 160               .size             = MTDPART_SIZ_FULL,
 161               .mask_flags       = 0
 162         },
 163 };
 164
 165 static struct physmap_flash_data nor_data = {
 166         .width          = 2,
 167         .set_vpp        = omap1_set_vpp,
 168         .parts          = nor_partitions,
 169         .nr_parts       = ARRAY_SIZE(nor_partitions),
 170 };
 171
 172 static struct resource nor_resource = {
 173         .start          = OMAP_CS0_PHYS,
 174         .end            = OMAP_CS0_PHYS + SZ_32M - 1,
 175         .flags          = IORESOURCE_MEM,
 176 };
 177
 178 static struct platform_device nor_device = {
 179         .name           = "physmap-flash",
 180         .id             = 0,
 181         .dev            = {
 182                 .platform_data  = &nor_data,
 183         },
 184         .num_resources  = 1,
 185         .resource       = &nor_resource,
 186 };
 187
 188 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 189 {
 190         struct nand_chip *this = mtd->priv;
 191         unsigned long mask;
 192
 193         if (cmd == NAND_CMD_NONE)
 194                 return;
 195
 196         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
 197         if (ctrl & NAND_ALE)
 198                 mask |= 0x04;
 199         writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
 200 }
 201
 202 #define FSAMPLE_NAND_RB_GPIO_PIN        62
 203
 204 static int nand_dev_ready(struct mtd_info *mtd)
 205 {
 206         return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
 207 }
 208
 209 static const char *part_probes[] = { "cmdlinepart", NULL };
 210
 211 static struct platform_nand_data nand_data = {
 212         .chip   = {
 213                 .nr_chips               = 1,
 214                 .chip_offset            = 0,
 215                 .options                = NAND_SAMSUNG_LP_OPTIONS,
 216                 .part_probe_types       = part_probes,
 217         },
 218         .ctrl   = {
 219                 .cmd_ctrl       = nand_cmd_ctl,
 220                 .dev_ready      = nand_dev_ready,
 221         },
 222 };
 223
 224 static struct resource nand_resource = {
 225         .start          = OMAP_CS3_PHYS,
 226         .end            = OMAP_CS3_PHYS + SZ_4K - 1,
 227         .flags          = IORESOURCE_MEM,
 228 };
 229
 230 static struct platform_device nand_device = {
 231         .name           = "gen_nand",
 232         .id             = 0,
 233         .dev            = {
 234                 .platform_data  = &nand_data,
 235         },
 236         .num_resources  = 1,
 237         .resource       = &nand_resource,
 238 };
 239
 240 static struct platform_device smc91x_device = {
 241         .name           = "smc91x",
 242         .id             = 0,
 243         .dev    = {
 244                 .platform_data  = &smc91x_info,
 245         },
 246         .num_resources  = ARRAY_SIZE(smc91x_resources),
 247         .resource       = smc91x_resources,
 248 };
 249
 250 static struct resource kp_resources[] = {
 251         [0] = {
 252                 .start  = INT_7XX_MPUIO_KEYPAD,
 253                 .end    = INT_7XX_MPUIO_KEYPAD,
 254                 .flags  = IORESOURCE_IRQ,
 255         },
 256 };
 257
 258 static const struct matrix_keymap_data fsample_keymap_data = {
 259         .keymap         = fsample_keymap,
 260         .keymap_size    = ARRAY_SIZE(fsample_keymap),
 261 };
 262
 263 static struct omap_kp_platform_data kp_data = {
 264         .rows           = 8,
 265         .cols           = 8,
 266         .keymap_data    = &fsample_keymap_data,
 267         .delay          = 4,
 268 };
 269
 270 static struct platform_device kp_device = {
 271         .name           = "omap-keypad",
 272         .id             = -1,
 273         .dev            = {
 274                 .platform_data = &kp_data,
 275         },
 276         .num_resources  = ARRAY_SIZE(kp_resources),
 277         .resource       = kp_resources,
 278 };
 279
 280 static struct platform_device *devices[] __initdata = {
 281         &nor_device,
 282         &nand_device,
 283         &smc91x_device,
 284         &kp_device,
 285 };
 286
 287 static struct omap_lcd_config fsample_lcd_config = {
 288         .ctrl_name      = "internal",
 289 };
 290
 291 static void __init omap_fsample_init(void)
 292 {
 293         /* Early, board-dependent init */
 294
 295         /*
 296          * Hold GSM Reset until needed
 297          */
 298         omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 299
 300         /*
 301          * UARTs -> done automagically by 8250 driver
 302          */
 303
 304         /*
 305          * CSx timings, GPIO Mux ... setup
 306          */
 307
 308         /* Flash: CS0 timings setup */
 309         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
 310         omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 311
 312         /*
 313          * Ethernet support through the debug board
 314          * CS1 timings setup
 315          */
 316         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
 317         omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 318
 319         /*
 320          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 321          * It is used as the Ethernet controller interrupt
 322          */
 323         omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
 324                         OMAP7XX_IO_CONF_9);
 325
 326         fsample_init_smc91x();
 327
 328         if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
 329                 BUG();
 330         gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
 331
 332         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 333         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 334
 335         /* Mux pins for keypad */
 336         omap_cfg_reg(E2_7XX_KBR0);
 337         omap_cfg_reg(J7_7XX_KBR1);
 338         omap_cfg_reg(E1_7XX_KBR2);
 339         omap_cfg_reg(F3_7XX_KBR3);
 340         omap_cfg_reg(D2_7XX_KBR4);
 341         omap_cfg_reg(C2_7XX_KBC0);
 342         omap_cfg_reg(D3_7XX_KBC1);
 343         omap_cfg_reg(E4_7XX_KBC2);
 344         omap_cfg_reg(F4_7XX_KBC3);
 345         omap_cfg_reg(E3_7XX_KBC4);
 346
 347         platform_add_devices(devices, ARRAY_SIZE(devices));
 348
 349         omap_serial_init();
 350         omap_register_i2c_bus(1, 100, NULL, 0);
 351
 352         omapfb_set_lcd_config(&fsample_lcd_config);
 353 }
 354
 355 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 356 static struct map_desc omap_fsample_io_desc[] __initdata = {
 357         {
 358                 .virtual        = H2P2_DBG_FPGA_BASE,
 359                 .pfn            = __phys_to_pfn(H2P2_DBG_FPGA_START),
 360                 .length         = H2P2_DBG_FPGA_SIZE,
 361                 .type           = MT_DEVICE
 362         },
 363         {
 364                 .virtual        = FSAMPLE_CPLD_BASE,
 365                 .pfn            = __phys_to_pfn(FSAMPLE_CPLD_START),
 366                 .length         = FSAMPLE_CPLD_SIZE,
 367                 .type           = MT_DEVICE
 368         }
 369 };
 370
 371 static void __init omap_fsample_map_io(void)
 372 {
 373         omap15xx_map_io();
 374         iotable_init(omap_fsample_io_desc,
 375                      ARRAY_SIZE(omap_fsample_io_desc));
 376 }
 377
 378 MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
 379 /* Maintainer: Brian Swetland <swetland@google.com> */
 380         .atag_offset    = 0x100,
 381         .map_io         = omap_fsample_map_io,
 382         .init_early     = omap1_init_early,
 383         .reserve        = omap_reserve,
 384         .init_irq       = omap1_init_irq,
 385         .init_machine   = omap_fsample_init,
 386         .timer          = &omap1_timer,
 387         .restart        = omap1_restart,
 388 MACHINE_END