pcm037: Add support for SJA1000 on baseboard
[linux-2.6.git] / arch / arm / mach-mx3 / pcm037.c
1 /*
2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34 #include <linux/fsl_devices.h>
35 #include <linux/can/platform/sja1000.h>
36
37 #include <media/soc_camera.h>
38
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/time.h>
42 #include <asm/mach/map.h>
43 #include <mach/board-pcm037.h>
44 #include <mach/common.h>
45 #include <mach/hardware.h>
46 #include <mach/i2c.h>
47 #include <mach/imx-uart.h>
48 #include <mach/iomux-mx3.h>
49 #include <mach/ipu.h>
50 #include <mach/mmc.h>
51 #include <mach/mx3_camera.h>
52 #include <mach/mx3fb.h>
53 #include <mach/mxc_nand.h>
54
55 #include "devices.h"
56 #include "pcm037.h"
57
58 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
59
60 static int __init pcm037_variant_setup(char *str)
61 {
62         if (!strcmp("eet", str))
63                 pcm037_instance = PCM037_EET;
64         else if (strcmp("pcm970", str))
65                 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
66
67         return 1;
68 }
69
70 /* Supported values: "pcm970" (default) and "eet" */
71 __setup("pcm037_variant=", pcm037_variant_setup);
72
73 enum pcm037_board_variant pcm037_variant(void)
74 {
75         return pcm037_instance;
76 }
77
78 /* UART1 with RTS/CTS handshake signals */
79 static unsigned int pcm037_uart1_handshake_pins[] = {
80         MX31_PIN_CTS1__CTS1,
81         MX31_PIN_RTS1__RTS1,
82         MX31_PIN_TXD1__TXD1,
83         MX31_PIN_RXD1__RXD1,
84 };
85
86 /* UART1 without RTS/CTS handshake signals */
87 static unsigned int pcm037_uart1_pins[] = {
88         MX31_PIN_TXD1__TXD1,
89         MX31_PIN_RXD1__RXD1,
90 };
91
92 static unsigned int pcm037_pins[] = {
93         /* I2C */
94         MX31_PIN_CSPI2_MOSI__SCL,
95         MX31_PIN_CSPI2_MISO__SDA,
96         MX31_PIN_CSPI2_SS2__I2C3_SDA,
97         MX31_PIN_CSPI2_SCLK__I2C3_SCL,
98         /* SDHC1 */
99         MX31_PIN_SD1_DATA3__SD1_DATA3,
100         MX31_PIN_SD1_DATA2__SD1_DATA2,
101         MX31_PIN_SD1_DATA1__SD1_DATA1,
102         MX31_PIN_SD1_DATA0__SD1_DATA0,
103         MX31_PIN_SD1_CLK__SD1_CLK,
104         MX31_PIN_SD1_CMD__SD1_CMD,
105         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
106         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
107         /* SPI1 */
108         MX31_PIN_CSPI1_MOSI__MOSI,
109         MX31_PIN_CSPI1_MISO__MISO,
110         MX31_PIN_CSPI1_SCLK__SCLK,
111         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
112         MX31_PIN_CSPI1_SS0__SS0,
113         MX31_PIN_CSPI1_SS1__SS1,
114         MX31_PIN_CSPI1_SS2__SS2,
115         /* UART2 */
116         MX31_PIN_TXD2__TXD2,
117         MX31_PIN_RXD2__RXD2,
118         MX31_PIN_CTS2__CTS2,
119         MX31_PIN_RTS2__RTS2,
120         /* UART3 */
121         MX31_PIN_CSPI3_MOSI__RXD3,
122         MX31_PIN_CSPI3_MISO__TXD3,
123         MX31_PIN_CSPI3_SCLK__RTS3,
124         MX31_PIN_CSPI3_SPI_RDY__CTS3,
125         /* LAN9217 irq pin */
126         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
127         /* Onewire */
128         MX31_PIN_BATT_LINE__OWIRE,
129         /* Framebuffer */
130         MX31_PIN_LD0__LD0,
131         MX31_PIN_LD1__LD1,
132         MX31_PIN_LD2__LD2,
133         MX31_PIN_LD3__LD3,
134         MX31_PIN_LD4__LD4,
135         MX31_PIN_LD5__LD5,
136         MX31_PIN_LD6__LD6,
137         MX31_PIN_LD7__LD7,
138         MX31_PIN_LD8__LD8,
139         MX31_PIN_LD9__LD9,
140         MX31_PIN_LD10__LD10,
141         MX31_PIN_LD11__LD11,
142         MX31_PIN_LD12__LD12,
143         MX31_PIN_LD13__LD13,
144         MX31_PIN_LD14__LD14,
145         MX31_PIN_LD15__LD15,
146         MX31_PIN_LD16__LD16,
147         MX31_PIN_LD17__LD17,
148         MX31_PIN_VSYNC3__VSYNC3,
149         MX31_PIN_HSYNC__HSYNC,
150         MX31_PIN_FPSHIFT__FPSHIFT,
151         MX31_PIN_DRDY0__DRDY0,
152         MX31_PIN_D3_REV__D3_REV,
153         MX31_PIN_CONTRAST__CONTRAST,
154         MX31_PIN_D3_SPL__D3_SPL,
155         MX31_PIN_D3_CLS__D3_CLS,
156         MX31_PIN_LCS0__GPI03_23,
157         /* CSI */
158         IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
159         MX31_PIN_CSI_D6__CSI_D6,
160         MX31_PIN_CSI_D7__CSI_D7,
161         MX31_PIN_CSI_D8__CSI_D8,
162         MX31_PIN_CSI_D9__CSI_D9,
163         MX31_PIN_CSI_D10__CSI_D10,
164         MX31_PIN_CSI_D11__CSI_D11,
165         MX31_PIN_CSI_D12__CSI_D12,
166         MX31_PIN_CSI_D13__CSI_D13,
167         MX31_PIN_CSI_D14__CSI_D14,
168         MX31_PIN_CSI_D15__CSI_D15,
169         MX31_PIN_CSI_HSYNC__CSI_HSYNC,
170         MX31_PIN_CSI_MCLK__CSI_MCLK,
171         MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
172         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
173 };
174
175 static struct physmap_flash_data pcm037_flash_data = {
176         .width  = 2,
177 };
178
179 static struct resource pcm037_flash_resource = {
180         .start  = 0xa0000000,
181         .end    = 0xa1ffffff,
182         .flags  = IORESOURCE_MEM,
183 };
184
185 static int usbotg_pins[] = {
186         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
187         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
188         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
189         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
190         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
191         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
192         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
193         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
194         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
195         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
196         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
197         MX31_PIN_USBOTG_STP__USBOTG_STP,
198 };
199
200 /* USB OTG HS port */
201 static int __init gpio_usbotg_hs_activate(void)
202 {
203         int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
204                                         ARRAY_SIZE(usbotg_pins), "usbotg");
205
206         if (ret < 0) {
207                 printk(KERN_ERR "Cannot set up OTG pins\n");
208                 return ret;
209         }
210
211         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
212         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
213         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
214         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
215         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
216         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
217         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
218         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
219         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
220         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
221         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
222         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
223
224         return 0;
225 }
226
227 /* OTG config */
228 static struct fsl_usb2_platform_data usb_pdata = {
229         .operating_mode = FSL_USB2_DR_DEVICE,
230         .phy_mode       = FSL_USB2_PHY_ULPI,
231 };
232
233 static struct platform_device pcm037_flash = {
234         .name   = "physmap-flash",
235         .id     = 0,
236         .dev    = {
237                 .platform_data  = &pcm037_flash_data,
238         },
239         .resource = &pcm037_flash_resource,
240         .num_resources = 1,
241 };
242
243 static struct imxuart_platform_data uart_pdata = {
244         .flags = IMXUART_HAVE_RTSCTS,
245 };
246
247 static struct resource smsc911x_resources[] = {
248         {
249                 .start          = CS1_BASE_ADDR + 0x300,
250                 .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
251                 .flags          = IORESOURCE_MEM,
252         }, {
253                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
254                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
255                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
256         },
257 };
258
259 static struct smsc911x_platform_config smsc911x_info = {
260         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
261                           SMSC911X_SAVE_MAC_ADDRESS,
262         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
263         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
264         .phy_interface  = PHY_INTERFACE_MODE_MII,
265 };
266
267 static struct platform_device pcm037_eth = {
268         .name           = "smsc911x",
269         .id             = -1,
270         .num_resources  = ARRAY_SIZE(smsc911x_resources),
271         .resource       = smsc911x_resources,
272         .dev            = {
273                 .platform_data = &smsc911x_info,
274         },
275 };
276
277 static struct platdata_mtd_ram pcm038_sram_data = {
278         .bankwidth = 2,
279 };
280
281 static struct resource pcm038_sram_resource = {
282         .start = CS4_BASE_ADDR,
283         .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
284         .flags = IORESOURCE_MEM,
285 };
286
287 static struct platform_device pcm037_sram_device = {
288         .name = "mtd-ram",
289         .id = 0,
290         .dev = {
291                 .platform_data = &pcm038_sram_data,
292         },
293         .num_resources = 1,
294         .resource = &pcm038_sram_resource,
295 };
296
297 static struct mxc_nand_platform_data pcm037_nand_board_info = {
298         .width = 1,
299         .hw_ecc = 1,
300 };
301
302 static struct imxi2c_platform_data pcm037_i2c_1_data = {
303         .bitrate = 100000,
304 };
305
306 static struct imxi2c_platform_data pcm037_i2c_2_data = {
307         .bitrate = 20000,
308 };
309
310 static struct at24_platform_data board_eeprom = {
311         .byte_len = 4096,
312         .page_size = 32,
313         .flags = AT24_FLAG_ADDR16,
314 };
315
316 static int pcm037_camera_power(struct device *dev, int on)
317 {
318         /* disable or enable the camera in X7 or X8 PCM970 connector */
319         gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
320         return 0;
321 }
322
323 static struct i2c_board_info pcm037_i2c_2_devices[] = {
324         {
325                 I2C_BOARD_INFO("mt9t031", 0x5d),
326         },
327 };
328
329 static struct soc_camera_link iclink = {
330         .bus_id         = 0,            /* Must match with the camera ID */
331         .power          = pcm037_camera_power,
332         .board_info     = &pcm037_i2c_2_devices[0],
333         .i2c_adapter_id = 2,
334         .module_name    = "mt9t031",
335 };
336
337 static struct i2c_board_info pcm037_i2c_devices[] = {
338         {
339                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
340                 .platform_data = &board_eeprom,
341         }, {
342                 I2C_BOARD_INFO("rtc-pcf8563", 0x51),
343                 .type = "pcf8563",
344         }
345 };
346
347 static struct platform_device pcm037_camera = {
348         .name   = "soc-camera-pdrv",
349         .id     = 0,
350         .dev    = {
351                 .platform_data = &iclink,
352         },
353 };
354
355 /* Not connected by default */
356 #ifdef PCM970_SDHC_RW_SWITCH
357 static int pcm970_sdhc1_get_ro(struct device *dev)
358 {
359         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
360 }
361 #endif
362
363 #define SDHC1_GPIO_WP   IOMUX_TO_GPIO(MX31_PIN_SFS6)
364 #define SDHC1_GPIO_DET  IOMUX_TO_GPIO(MX31_PIN_SCK6)
365
366 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
367                 void *data)
368 {
369         int ret;
370
371         ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
372         if (ret)
373                 return ret;
374
375         gpio_direction_input(SDHC1_GPIO_DET);
376
377 #ifdef PCM970_SDHC_RW_SWITCH
378         ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
379         if (ret)
380                 goto err_gpio_free;
381         gpio_direction_input(SDHC1_GPIO_WP);
382 #endif
383
384         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
385                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
386                                 "sdhc-detect", data);
387         if (ret)
388                 goto err_gpio_free_2;
389
390         return 0;
391
392 err_gpio_free_2:
393 #ifdef PCM970_SDHC_RW_SWITCH
394         gpio_free(SDHC1_GPIO_WP);
395 err_gpio_free:
396 #endif
397         gpio_free(SDHC1_GPIO_DET);
398
399         return ret;
400 }
401
402 static void pcm970_sdhc1_exit(struct device *dev, void *data)
403 {
404         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
405         gpio_free(SDHC1_GPIO_DET);
406         gpio_free(SDHC1_GPIO_WP);
407 }
408
409 static struct imxmmc_platform_data sdhc_pdata = {
410 #ifdef PCM970_SDHC_RW_SWITCH
411         .get_ro = pcm970_sdhc1_get_ro,
412 #endif
413         .init = pcm970_sdhc1_init,
414         .exit = pcm970_sdhc1_exit,
415 };
416
417 struct mx3_camera_pdata camera_pdata = {
418         .dma_dev        = &mx3_ipu.dev,
419         .flags          = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
420         .mclk_10khz     = 2000,
421 };
422
423 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
424 {
425         dma_addr_t dma_handle;
426         void *buf;
427         int dma;
428
429         if (buf_size < 2 * 1024 * 1024)
430                 return -EINVAL;
431
432         buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
433         if (!buf) {
434                 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
435                 return -ENOMEM;
436         }
437
438         memset(buf, 0, buf_size);
439
440         dma = dma_declare_coherent_memory(&mx3_camera.dev,
441                                         dma_handle, dma_handle, buf_size,
442                                         DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
443
444         /* The way we call dma_declare_coherent_memory only a malloc can fail */
445         return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
446 }
447
448 static struct platform_device *devices[] __initdata = {
449         &pcm037_flash,
450         &pcm037_sram_device,
451         &pcm037_camera,
452 };
453
454 static struct ipu_platform_data mx3_ipu_data = {
455         .irq_base = MXC_IPU_IRQ_START,
456 };
457
458 static const struct fb_videomode fb_modedb[] = {
459         {
460                 /* 240x320 @ 60 Hz Sharp */
461                 .name           = "Sharp-LQ035Q7DH06-QVGA",
462                 .refresh        = 60,
463                 .xres           = 240,
464                 .yres           = 320,
465                 .pixclock       = 185925,
466                 .left_margin    = 9,
467                 .right_margin   = 16,
468                 .upper_margin   = 7,
469                 .lower_margin   = 9,
470                 .hsync_len      = 1,
471                 .vsync_len      = 1,
472                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
473                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
474                 .vmode          = FB_VMODE_NONINTERLACED,
475                 .flag           = 0,
476         }, {
477                 /* 240x320 @ 60 Hz */
478                 .name           = "TX090",
479                 .refresh        = 60,
480                 .xres           = 240,
481                 .yres           = 320,
482                 .pixclock       = 38255,
483                 .left_margin    = 144,
484                 .right_margin   = 0,
485                 .upper_margin   = 7,
486                 .lower_margin   = 40,
487                 .hsync_len      = 96,
488                 .vsync_len      = 1,
489                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
490                 .vmode          = FB_VMODE_NONINTERLACED,
491                 .flag           = 0,
492         }, {
493                 /* 240x320 @ 60 Hz */
494                 .name           = "CMEL-OLED",
495                 .refresh        = 60,
496                 .xres           = 240,
497                 .yres           = 320,
498                 .pixclock       = 185925,
499                 .left_margin    = 9,
500                 .right_margin   = 16,
501                 .upper_margin   = 7,
502                 .lower_margin   = 9,
503                 .hsync_len      = 1,
504                 .vsync_len      = 1,
505                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
506                 .vmode          = FB_VMODE_NONINTERLACED,
507                 .flag           = 0,
508         },
509 };
510
511 static struct mx3fb_platform_data mx3fb_pdata = {
512         .dma_dev        = &mx3_ipu.dev,
513         .name           = "Sharp-LQ035Q7DH06-QVGA",
514         .mode           = fb_modedb,
515         .num_modes      = ARRAY_SIZE(fb_modedb),
516 };
517
518 static struct resource pcm970_sja1000_resources[] = {
519         {
520                 .start   = CS5_BASE_ADDR,
521                 .end     = CS5_BASE_ADDR + 0x100 - 1,
522                 .flags   = IORESOURCE_MEM,
523         }, {
524                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
525                 .end     = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
526                 .flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
527         },
528 };
529
530 struct sja1000_platform_data pcm970_sja1000_platform_data = {
531         .clock          = 16000000 / 2,
532         .ocr            = 0x40 | 0x18,
533         .cdr            = 0x40,
534 };
535
536 static struct platform_device pcm970_sja1000 = {
537         .name = "sja1000_platform",
538         .dev = {
539                 .platform_data = &pcm970_sja1000_platform_data,
540         },
541         .resource = pcm970_sja1000_resources,
542         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
543 };
544
545 /*
546  * Board specific initialization.
547  */
548 static void __init mxc_board_init(void)
549 {
550         int ret;
551
552         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
553                         "pcm037");
554
555         if (pcm037_variant() == PCM037_EET)
556                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
557                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
558         else
559                 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
560                         ARRAY_SIZE(pcm037_uart1_handshake_pins),
561                         "pcm037_uart1");
562
563         platform_add_devices(devices, ARRAY_SIZE(devices));
564
565         mxc_register_device(&mxc_uart_device0, &uart_pdata);
566         mxc_register_device(&mxc_uart_device1, &uart_pdata);
567         mxc_register_device(&mxc_uart_device2, &uart_pdata);
568
569         mxc_register_device(&mxc_w1_master_device, NULL);
570
571         /* LAN9217 IRQ pin */
572         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
573         if (ret)
574                 pr_warning("could not get LAN irq gpio\n");
575         else {
576                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
577                 platform_device_register(&pcm037_eth);
578         }
579
580
581         /* I2C adapters and devices */
582         i2c_register_board_info(1, pcm037_i2c_devices,
583                         ARRAY_SIZE(pcm037_i2c_devices));
584
585         mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
586         mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
587
588         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
589         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
590         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
591         mxc_register_device(&mx3_fb, &mx3fb_pdata);
592         if (!gpio_usbotg_hs_activate())
593                 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
594
595         /* CSI */
596         /* Camera power: default - off */
597         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
598         if (!ret)
599                 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
600         else
601                 iclink.power = NULL;
602
603         if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
604                 mxc_register_device(&mx3_camera, &camera_pdata);
605
606         platform_device_register(&pcm970_sja1000);
607 }
608
609 static void __init pcm037_timer_init(void)
610 {
611         mx31_clocks_init(26000000);
612 }
613
614 struct sys_timer pcm037_timer = {
615         .init   = pcm037_timer_init,
616 };
617
618 MACHINE_START(PCM037, "Phytec Phycore pcm037")
619         /* Maintainer: Pengutronix */
620         .phys_io        = AIPS1_BASE_ADDR,
621         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
622         .boot_params    = PHYS_OFFSET + 0x100,
623         .map_io         = mx31_map_io,
624         .init_irq       = mx31_init_irq,
625         .init_machine   = mxc_board_init,
626         .timer          = &pcm037_timer,
627 MACHINE_END