mx3: Codingstyle: Let the compiler count arrays
[linux-2.6.git] / arch / arm / mach-mx3 / pcm037.c
1 /*
2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34 #include <linux/fsl_devices.h>
35
36 #include <media/soc_camera.h>
37
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/time.h>
41 #include <asm/mach/map.h>
42 #include <mach/board-pcm037.h>
43 #include <mach/common.h>
44 #include <mach/hardware.h>
45 #include <mach/i2c.h>
46 #include <mach/imx-uart.h>
47 #include <mach/iomux-mx3.h>
48 #include <mach/ipu.h>
49 #include <mach/mmc.h>
50 #include <mach/mx3_camera.h>
51 #include <mach/mx3fb.h>
52 #include <mach/mxc_nand.h>
53
54 #include "devices.h"
55 #include "pcm037.h"
56
57 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
58
59 static int __init pcm037_variant_setup(char *str)
60 {
61         if (!strcmp("eet", str))
62                 pcm037_instance = PCM037_EET;
63         else if (strcmp("pcm970", str))
64                 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
65
66         return 1;
67 }
68
69 /* Supported values: "pcm970" (default) and "eet" */
70 __setup("pcm037_variant=", pcm037_variant_setup);
71
72 enum pcm037_board_variant pcm037_variant(void)
73 {
74         return pcm037_instance;
75 }
76
77 /* UART1 with RTS/CTS handshake signals */
78 static unsigned int pcm037_uart1_handshake_pins[] = {
79         MX31_PIN_CTS1__CTS1,
80         MX31_PIN_RTS1__RTS1,
81         MX31_PIN_TXD1__TXD1,
82         MX31_PIN_RXD1__RXD1,
83 };
84
85 /* UART1 without RTS/CTS handshake signals */
86 static unsigned int pcm037_uart1_pins[] = {
87         MX31_PIN_TXD1__TXD1,
88         MX31_PIN_RXD1__RXD1,
89 };
90
91 static unsigned int pcm037_pins[] = {
92         /* I2C */
93         MX31_PIN_CSPI2_MOSI__SCL,
94         MX31_PIN_CSPI2_MISO__SDA,
95         MX31_PIN_CSPI2_SS2__I2C3_SDA,
96         MX31_PIN_CSPI2_SCLK__I2C3_SCL,
97         /* SDHC1 */
98         MX31_PIN_SD1_DATA3__SD1_DATA3,
99         MX31_PIN_SD1_DATA2__SD1_DATA2,
100         MX31_PIN_SD1_DATA1__SD1_DATA1,
101         MX31_PIN_SD1_DATA0__SD1_DATA0,
102         MX31_PIN_SD1_CLK__SD1_CLK,
103         MX31_PIN_SD1_CMD__SD1_CMD,
104         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
105         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
106         /* SPI1 */
107         MX31_PIN_CSPI1_MOSI__MOSI,
108         MX31_PIN_CSPI1_MISO__MISO,
109         MX31_PIN_CSPI1_SCLK__SCLK,
110         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
111         MX31_PIN_CSPI1_SS0__SS0,
112         MX31_PIN_CSPI1_SS1__SS1,
113         MX31_PIN_CSPI1_SS2__SS2,
114         /* UART2 */
115         MX31_PIN_TXD2__TXD2,
116         MX31_PIN_RXD2__RXD2,
117         MX31_PIN_CTS2__CTS2,
118         MX31_PIN_RTS2__RTS2,
119         /* UART3 */
120         MX31_PIN_CSPI3_MOSI__RXD3,
121         MX31_PIN_CSPI3_MISO__TXD3,
122         MX31_PIN_CSPI3_SCLK__RTS3,
123         MX31_PIN_CSPI3_SPI_RDY__CTS3,
124         /* LAN9217 irq pin */
125         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
126         /* Onewire */
127         MX31_PIN_BATT_LINE__OWIRE,
128         /* Framebuffer */
129         MX31_PIN_LD0__LD0,
130         MX31_PIN_LD1__LD1,
131         MX31_PIN_LD2__LD2,
132         MX31_PIN_LD3__LD3,
133         MX31_PIN_LD4__LD4,
134         MX31_PIN_LD5__LD5,
135         MX31_PIN_LD6__LD6,
136         MX31_PIN_LD7__LD7,
137         MX31_PIN_LD8__LD8,
138         MX31_PIN_LD9__LD9,
139         MX31_PIN_LD10__LD10,
140         MX31_PIN_LD11__LD11,
141         MX31_PIN_LD12__LD12,
142         MX31_PIN_LD13__LD13,
143         MX31_PIN_LD14__LD14,
144         MX31_PIN_LD15__LD15,
145         MX31_PIN_LD16__LD16,
146         MX31_PIN_LD17__LD17,
147         MX31_PIN_VSYNC3__VSYNC3,
148         MX31_PIN_HSYNC__HSYNC,
149         MX31_PIN_FPSHIFT__FPSHIFT,
150         MX31_PIN_DRDY0__DRDY0,
151         MX31_PIN_D3_REV__D3_REV,
152         MX31_PIN_CONTRAST__CONTRAST,
153         MX31_PIN_D3_SPL__D3_SPL,
154         MX31_PIN_D3_CLS__D3_CLS,
155         MX31_PIN_LCS0__GPI03_23,
156         /* CSI */
157         IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
158         MX31_PIN_CSI_D6__CSI_D6,
159         MX31_PIN_CSI_D7__CSI_D7,
160         MX31_PIN_CSI_D8__CSI_D8,
161         MX31_PIN_CSI_D9__CSI_D9,
162         MX31_PIN_CSI_D10__CSI_D10,
163         MX31_PIN_CSI_D11__CSI_D11,
164         MX31_PIN_CSI_D12__CSI_D12,
165         MX31_PIN_CSI_D13__CSI_D13,
166         MX31_PIN_CSI_D14__CSI_D14,
167         MX31_PIN_CSI_D15__CSI_D15,
168         MX31_PIN_CSI_HSYNC__CSI_HSYNC,
169         MX31_PIN_CSI_MCLK__CSI_MCLK,
170         MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
171         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
172 };
173
174 static struct physmap_flash_data pcm037_flash_data = {
175         .width  = 2,
176 };
177
178 static struct resource pcm037_flash_resource = {
179         .start  = 0xa0000000,
180         .end    = 0xa1ffffff,
181         .flags  = IORESOURCE_MEM,
182 };
183
184 static int usbotg_pins[] = {
185         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
186         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
187         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
188         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
189         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
190         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
191         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
192         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
193         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
194         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
195         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
196         MX31_PIN_USBOTG_STP__USBOTG_STP,
197 };
198
199 /* USB OTG HS port */
200 static int __init gpio_usbotg_hs_activate(void)
201 {
202         int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
203                                         ARRAY_SIZE(usbotg_pins), "usbotg");
204
205         if (ret < 0) {
206                 printk(KERN_ERR "Cannot set up OTG pins\n");
207                 return ret;
208         }
209
210         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
211         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
212         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
213         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
214         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
215         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
216         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
217         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
218         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
219         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
220         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
221         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
222
223         return 0;
224 }
225
226 /* OTG config */
227 static struct fsl_usb2_platform_data usb_pdata = {
228         .operating_mode = FSL_USB2_DR_DEVICE,
229         .phy_mode       = FSL_USB2_PHY_ULPI,
230 };
231
232 static struct platform_device pcm037_flash = {
233         .name   = "physmap-flash",
234         .id     = 0,
235         .dev    = {
236                 .platform_data  = &pcm037_flash_data,
237         },
238         .resource = &pcm037_flash_resource,
239         .num_resources = 1,
240 };
241
242 static struct imxuart_platform_data uart_pdata = {
243         .flags = IMXUART_HAVE_RTSCTS,
244 };
245
246 static struct resource smsc911x_resources[] = {
247         {
248                 .start          = CS1_BASE_ADDR + 0x300,
249                 .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
250                 .flags          = IORESOURCE_MEM,
251         }, {
252                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
253                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
254                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
255         },
256 };
257
258 static struct smsc911x_platform_config smsc911x_info = {
259         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
260                           SMSC911X_SAVE_MAC_ADDRESS,
261         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
262         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
263         .phy_interface  = PHY_INTERFACE_MODE_MII,
264 };
265
266 static struct platform_device pcm037_eth = {
267         .name           = "smsc911x",
268         .id             = -1,
269         .num_resources  = ARRAY_SIZE(smsc911x_resources),
270         .resource       = smsc911x_resources,
271         .dev            = {
272                 .platform_data = &smsc911x_info,
273         },
274 };
275
276 static struct platdata_mtd_ram pcm038_sram_data = {
277         .bankwidth = 2,
278 };
279
280 static struct resource pcm038_sram_resource = {
281         .start = CS4_BASE_ADDR,
282         .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
283         .flags = IORESOURCE_MEM,
284 };
285
286 static struct platform_device pcm037_sram_device = {
287         .name = "mtd-ram",
288         .id = 0,
289         .dev = {
290                 .platform_data = &pcm038_sram_data,
291         },
292         .num_resources = 1,
293         .resource = &pcm038_sram_resource,
294 };
295
296 static struct mxc_nand_platform_data pcm037_nand_board_info = {
297         .width = 1,
298         .hw_ecc = 1,
299 };
300
301 static struct imxi2c_platform_data pcm037_i2c_1_data = {
302         .bitrate = 100000,
303 };
304
305 static struct imxi2c_platform_data pcm037_i2c_2_data = {
306         .bitrate = 20000,
307 };
308
309 static struct at24_platform_data board_eeprom = {
310         .byte_len = 4096,
311         .page_size = 32,
312         .flags = AT24_FLAG_ADDR16,
313 };
314
315 static int pcm037_camera_power(struct device *dev, int on)
316 {
317         /* disable or enable the camera in X7 or X8 PCM970 connector */
318         gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
319         return 0;
320 }
321
322 static struct i2c_board_info pcm037_i2c_2_devices[] = {
323         {
324                 I2C_BOARD_INFO("mt9t031", 0x5d),
325         },
326 };
327
328 static struct soc_camera_link iclink = {
329         .bus_id         = 0,            /* Must match with the camera ID */
330         .power          = pcm037_camera_power,
331         .board_info     = &pcm037_i2c_2_devices[0],
332         .i2c_adapter_id = 2,
333         .module_name    = "mt9t031",
334 };
335
336 static struct i2c_board_info pcm037_i2c_devices[] = {
337         {
338                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
339                 .platform_data = &board_eeprom,
340         }, {
341                 I2C_BOARD_INFO("rtc-pcf8563", 0x51),
342                 .type = "pcf8563",
343         }
344 };
345
346 static struct platform_device pcm037_camera = {
347         .name   = "soc-camera-pdrv",
348         .id     = 0,
349         .dev    = {
350                 .platform_data = &iclink,
351         },
352 };
353
354 /* Not connected by default */
355 #ifdef PCM970_SDHC_RW_SWITCH
356 static int pcm970_sdhc1_get_ro(struct device *dev)
357 {
358         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
359 }
360 #endif
361
362 #define SDHC1_GPIO_WP   IOMUX_TO_GPIO(MX31_PIN_SFS6)
363 #define SDHC1_GPIO_DET  IOMUX_TO_GPIO(MX31_PIN_SCK6)
364
365 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
366                 void *data)
367 {
368         int ret;
369
370         ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
371         if (ret)
372                 return ret;
373
374         gpio_direction_input(SDHC1_GPIO_DET);
375
376 #ifdef PCM970_SDHC_RW_SWITCH
377         ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
378         if (ret)
379                 goto err_gpio_free;
380         gpio_direction_input(SDHC1_GPIO_WP);
381 #endif
382
383         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
384                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
385                                 "sdhc-detect", data);
386         if (ret)
387                 goto err_gpio_free_2;
388
389         return 0;
390
391 err_gpio_free_2:
392 #ifdef PCM970_SDHC_RW_SWITCH
393         gpio_free(SDHC1_GPIO_WP);
394 err_gpio_free:
395 #endif
396         gpio_free(SDHC1_GPIO_DET);
397
398         return ret;
399 }
400
401 static void pcm970_sdhc1_exit(struct device *dev, void *data)
402 {
403         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
404         gpio_free(SDHC1_GPIO_DET);
405         gpio_free(SDHC1_GPIO_WP);
406 }
407
408 static struct imxmmc_platform_data sdhc_pdata = {
409 #ifdef PCM970_SDHC_RW_SWITCH
410         .get_ro = pcm970_sdhc1_get_ro,
411 #endif
412         .init = pcm970_sdhc1_init,
413         .exit = pcm970_sdhc1_exit,
414 };
415
416 struct mx3_camera_pdata camera_pdata = {
417         .dma_dev        = &mx3_ipu.dev,
418         .flags          = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
419         .mclk_10khz     = 2000,
420 };
421
422 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
423 {
424         dma_addr_t dma_handle;
425         void *buf;
426         int dma;
427
428         if (buf_size < 2 * 1024 * 1024)
429                 return -EINVAL;
430
431         buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
432         if (!buf) {
433                 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
434                 return -ENOMEM;
435         }
436
437         memset(buf, 0, buf_size);
438
439         dma = dma_declare_coherent_memory(&mx3_camera.dev,
440                                         dma_handle, dma_handle, buf_size,
441                                         DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
442
443         /* The way we call dma_declare_coherent_memory only a malloc can fail */
444         return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
445 }
446
447 static struct platform_device *devices[] __initdata = {
448         &pcm037_flash,
449         &pcm037_sram_device,
450         &pcm037_camera,
451 };
452
453 static struct ipu_platform_data mx3_ipu_data = {
454         .irq_base = MXC_IPU_IRQ_START,
455 };
456
457 static const struct fb_videomode fb_modedb[] = {
458         {
459                 /* 240x320 @ 60 Hz Sharp */
460                 .name           = "Sharp-LQ035Q7DH06-QVGA",
461                 .refresh        = 60,
462                 .xres           = 240,
463                 .yres           = 320,
464                 .pixclock       = 185925,
465                 .left_margin    = 9,
466                 .right_margin   = 16,
467                 .upper_margin   = 7,
468                 .lower_margin   = 9,
469                 .hsync_len      = 1,
470                 .vsync_len      = 1,
471                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
472                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
473                 .vmode          = FB_VMODE_NONINTERLACED,
474                 .flag           = 0,
475         }, {
476                 /* 240x320 @ 60 Hz */
477                 .name           = "TX090",
478                 .refresh        = 60,
479                 .xres           = 240,
480                 .yres           = 320,
481                 .pixclock       = 38255,
482                 .left_margin    = 144,
483                 .right_margin   = 0,
484                 .upper_margin   = 7,
485                 .lower_margin   = 40,
486                 .hsync_len      = 96,
487                 .vsync_len      = 1,
488                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
489                 .vmode          = FB_VMODE_NONINTERLACED,
490                 .flag           = 0,
491         }, {
492                 /* 240x320 @ 60 Hz */
493                 .name           = "CMEL-OLED",
494                 .refresh        = 60,
495                 .xres           = 240,
496                 .yres           = 320,
497                 .pixclock       = 185925,
498                 .left_margin    = 9,
499                 .right_margin   = 16,
500                 .upper_margin   = 7,
501                 .lower_margin   = 9,
502                 .hsync_len      = 1,
503                 .vsync_len      = 1,
504                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
505                 .vmode          = FB_VMODE_NONINTERLACED,
506                 .flag           = 0,
507         },
508 };
509
510 static struct mx3fb_platform_data mx3fb_pdata = {
511         .dma_dev        = &mx3_ipu.dev,
512         .name           = "Sharp-LQ035Q7DH06-QVGA",
513         .mode           = fb_modedb,
514         .num_modes      = ARRAY_SIZE(fb_modedb),
515 };
516
517 /*
518  * Board specific initialization.
519  */
520 static void __init mxc_board_init(void)
521 {
522         int ret;
523
524         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
525                         "pcm037");
526
527         if (pcm037_variant() == PCM037_EET)
528                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
529                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
530         else
531                 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
532                         ARRAY_SIZE(pcm037_uart1_handshake_pins),
533                         "pcm037_uart1");
534
535         platform_add_devices(devices, ARRAY_SIZE(devices));
536
537         mxc_register_device(&mxc_uart_device0, &uart_pdata);
538         mxc_register_device(&mxc_uart_device1, &uart_pdata);
539         mxc_register_device(&mxc_uart_device2, &uart_pdata);
540
541         mxc_register_device(&mxc_w1_master_device, NULL);
542
543         /* LAN9217 IRQ pin */
544         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
545         if (ret)
546                 pr_warning("could not get LAN irq gpio\n");
547         else {
548                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
549                 platform_device_register(&pcm037_eth);
550         }
551
552
553         /* I2C adapters and devices */
554         i2c_register_board_info(1, pcm037_i2c_devices,
555                         ARRAY_SIZE(pcm037_i2c_devices));
556
557         mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
558         mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
559
560         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
561         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
562         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
563         mxc_register_device(&mx3_fb, &mx3fb_pdata);
564         if (!gpio_usbotg_hs_activate())
565                 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
566
567         /* CSI */
568         /* Camera power: default - off */
569         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
570         if (!ret)
571                 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
572         else
573                 iclink.power = NULL;
574
575         if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
576                 mxc_register_device(&mx3_camera, &camera_pdata);
577 }
578
579 static void __init pcm037_timer_init(void)
580 {
581         mx31_clocks_init(26000000);
582 }
583
584 struct sys_timer pcm037_timer = {
585         .init   = pcm037_timer_init,
586 };
587
588 MACHINE_START(PCM037, "Phytec Phycore pcm037")
589         /* Maintainer: Pengutronix */
590         .phys_io        = AIPS1_BASE_ADDR,
591         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
592         .boot_params    = PHYS_OFFSET + 0x100,
593         .map_io         = mx31_map_io,
594         .init_irq       = mx31_init_irq,
595         .init_machine   = mxc_board_init,
596         .timer          = &pcm037_timer,
597 MACHINE_END