Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6.git] / arch / arm / mach-mx3 / pcm037.c
1 /*
2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34 #include <linux/fsl_devices.h>
35 #include <linux/can/platform/sja1000.h>
36
37 #include <media/soc_camera.h>
38
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/time.h>
42 #include <asm/mach/map.h>
43 #include <mach/board-pcm037.h>
44 #include <mach/common.h>
45 #include <mach/hardware.h>
46 #include <mach/i2c.h>
47 #include <mach/imx-uart.h>
48 #include <mach/iomux-mx3.h>
49 #include <mach/ipu.h>
50 #include <mach/mmc.h>
51 #include <mach/mx3_camera.h>
52 #include <mach/mx3fb.h>
53 #include <mach/mxc_nand.h>
54
55 #include "devices.h"
56 #include "pcm037.h"
57
58 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
59
60 static int __init pcm037_variant_setup(char *str)
61 {
62         if (!strcmp("eet", str))
63                 pcm037_instance = PCM037_EET;
64         else if (strcmp("pcm970", str))
65                 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
66
67         return 1;
68 }
69
70 /* Supported values: "pcm970" (default) and "eet" */
71 __setup("pcm037_variant=", pcm037_variant_setup);
72
73 enum pcm037_board_variant pcm037_variant(void)
74 {
75         return pcm037_instance;
76 }
77
78 /* UART1 with RTS/CTS handshake signals */
79 static unsigned int pcm037_uart1_handshake_pins[] = {
80         MX31_PIN_CTS1__CTS1,
81         MX31_PIN_RTS1__RTS1,
82         MX31_PIN_TXD1__TXD1,
83         MX31_PIN_RXD1__RXD1,
84 };
85
86 /* UART1 without RTS/CTS handshake signals */
87 static unsigned int pcm037_uart1_pins[] = {
88         MX31_PIN_TXD1__TXD1,
89         MX31_PIN_RXD1__RXD1,
90 };
91
92 static unsigned int pcm037_pins[] = {
93         /* I2C */
94         MX31_PIN_CSPI2_MOSI__SCL,
95         MX31_PIN_CSPI2_MISO__SDA,
96         MX31_PIN_CSPI2_SS2__I2C3_SDA,
97         MX31_PIN_CSPI2_SCLK__I2C3_SCL,
98         /* SDHC1 */
99         MX31_PIN_SD1_DATA3__SD1_DATA3,
100         MX31_PIN_SD1_DATA2__SD1_DATA2,
101         MX31_PIN_SD1_DATA1__SD1_DATA1,
102         MX31_PIN_SD1_DATA0__SD1_DATA0,
103         MX31_PIN_SD1_CLK__SD1_CLK,
104         MX31_PIN_SD1_CMD__SD1_CMD,
105         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
106         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
107         /* SPI1 */
108         MX31_PIN_CSPI1_MOSI__MOSI,
109         MX31_PIN_CSPI1_MISO__MISO,
110         MX31_PIN_CSPI1_SCLK__SCLK,
111         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
112         MX31_PIN_CSPI1_SS0__SS0,
113         MX31_PIN_CSPI1_SS1__SS1,
114         MX31_PIN_CSPI1_SS2__SS2,
115         /* UART2 */
116         MX31_PIN_TXD2__TXD2,
117         MX31_PIN_RXD2__RXD2,
118         MX31_PIN_CTS2__CTS2,
119         MX31_PIN_RTS2__RTS2,
120         /* UART3 */
121         MX31_PIN_CSPI3_MOSI__RXD3,
122         MX31_PIN_CSPI3_MISO__TXD3,
123         MX31_PIN_CSPI3_SCLK__RTS3,
124         MX31_PIN_CSPI3_SPI_RDY__CTS3,
125         /* LAN9217 irq pin */
126         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
127         /* Onewire */
128         MX31_PIN_BATT_LINE__OWIRE,
129         /* Framebuffer */
130         MX31_PIN_LD0__LD0,
131         MX31_PIN_LD1__LD1,
132         MX31_PIN_LD2__LD2,
133         MX31_PIN_LD3__LD3,
134         MX31_PIN_LD4__LD4,
135         MX31_PIN_LD5__LD5,
136         MX31_PIN_LD6__LD6,
137         MX31_PIN_LD7__LD7,
138         MX31_PIN_LD8__LD8,
139         MX31_PIN_LD9__LD9,
140         MX31_PIN_LD10__LD10,
141         MX31_PIN_LD11__LD11,
142         MX31_PIN_LD12__LD12,
143         MX31_PIN_LD13__LD13,
144         MX31_PIN_LD14__LD14,
145         MX31_PIN_LD15__LD15,
146         MX31_PIN_LD16__LD16,
147         MX31_PIN_LD17__LD17,
148         MX31_PIN_VSYNC3__VSYNC3,
149         MX31_PIN_HSYNC__HSYNC,
150         MX31_PIN_FPSHIFT__FPSHIFT,
151         MX31_PIN_DRDY0__DRDY0,
152         MX31_PIN_D3_REV__D3_REV,
153         MX31_PIN_CONTRAST__CONTRAST,
154         MX31_PIN_D3_SPL__D3_SPL,
155         MX31_PIN_D3_CLS__D3_CLS,
156         MX31_PIN_LCS0__GPI03_23,
157         /* CSI */
158         IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
159         MX31_PIN_CSI_D6__CSI_D6,
160         MX31_PIN_CSI_D7__CSI_D7,
161         MX31_PIN_CSI_D8__CSI_D8,
162         MX31_PIN_CSI_D9__CSI_D9,
163         MX31_PIN_CSI_D10__CSI_D10,
164         MX31_PIN_CSI_D11__CSI_D11,
165         MX31_PIN_CSI_D12__CSI_D12,
166         MX31_PIN_CSI_D13__CSI_D13,
167         MX31_PIN_CSI_D14__CSI_D14,
168         MX31_PIN_CSI_D15__CSI_D15,
169         MX31_PIN_CSI_HSYNC__CSI_HSYNC,
170         MX31_PIN_CSI_MCLK__CSI_MCLK,
171         MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
172         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
173         /* GPIO */
174         IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
175 };
176
177 static struct physmap_flash_data pcm037_flash_data = {
178         .width  = 2,
179 };
180
181 static struct resource pcm037_flash_resource = {
182         .start  = 0xa0000000,
183         .end    = 0xa1ffffff,
184         .flags  = IORESOURCE_MEM,
185 };
186
187 static int usbotg_pins[] = {
188         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
189         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
190         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
191         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
192         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
193         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
194         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
195         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
196         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
197         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
198         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
199         MX31_PIN_USBOTG_STP__USBOTG_STP,
200 };
201
202 /* USB OTG HS port */
203 static int __init gpio_usbotg_hs_activate(void)
204 {
205         int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
206                                         ARRAY_SIZE(usbotg_pins), "usbotg");
207
208         if (ret < 0) {
209                 printk(KERN_ERR "Cannot set up OTG pins\n");
210                 return ret;
211         }
212
213         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
214         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
215         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
216         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
217         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
218         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
219         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
220         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
221         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
222         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
223         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
224         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,   PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
225
226         return 0;
227 }
228
229 /* OTG config */
230 static struct fsl_usb2_platform_data usb_pdata = {
231         .operating_mode = FSL_USB2_DR_DEVICE,
232         .phy_mode       = FSL_USB2_PHY_ULPI,
233 };
234
235 static struct platform_device pcm037_flash = {
236         .name   = "physmap-flash",
237         .id     = 0,
238         .dev    = {
239                 .platform_data  = &pcm037_flash_data,
240         },
241         .resource = &pcm037_flash_resource,
242         .num_resources = 1,
243 };
244
245 static struct imxuart_platform_data uart_pdata = {
246         .flags = IMXUART_HAVE_RTSCTS,
247 };
248
249 static struct resource smsc911x_resources[] = {
250         {
251                 .start          = CS1_BASE_ADDR + 0x300,
252                 .end            = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
253                 .flags          = IORESOURCE_MEM,
254         }, {
255                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
256                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
257                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
258         },
259 };
260
261 static struct smsc911x_platform_config smsc911x_info = {
262         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
263                           SMSC911X_SAVE_MAC_ADDRESS,
264         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
265         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
266         .phy_interface  = PHY_INTERFACE_MODE_MII,
267 };
268
269 static struct platform_device pcm037_eth = {
270         .name           = "smsc911x",
271         .id             = -1,
272         .num_resources  = ARRAY_SIZE(smsc911x_resources),
273         .resource       = smsc911x_resources,
274         .dev            = {
275                 .platform_data = &smsc911x_info,
276         },
277 };
278
279 static struct platdata_mtd_ram pcm038_sram_data = {
280         .bankwidth = 2,
281 };
282
283 static struct resource pcm038_sram_resource = {
284         .start = CS4_BASE_ADDR,
285         .end   = CS4_BASE_ADDR + 512 * 1024 - 1,
286         .flags = IORESOURCE_MEM,
287 };
288
289 static struct platform_device pcm037_sram_device = {
290         .name = "mtd-ram",
291         .id = 0,
292         .dev = {
293                 .platform_data = &pcm038_sram_data,
294         },
295         .num_resources = 1,
296         .resource = &pcm038_sram_resource,
297 };
298
299 static struct mxc_nand_platform_data pcm037_nand_board_info = {
300         .width = 1,
301         .hw_ecc = 1,
302 };
303
304 static struct imxi2c_platform_data pcm037_i2c_1_data = {
305         .bitrate = 100000,
306 };
307
308 static struct imxi2c_platform_data pcm037_i2c_2_data = {
309         .bitrate = 20000,
310 };
311
312 static struct at24_platform_data board_eeprom = {
313         .byte_len = 4096,
314         .page_size = 32,
315         .flags = AT24_FLAG_ADDR16,
316 };
317
318 static int pcm037_camera_power(struct device *dev, int on)
319 {
320         /* disable or enable the camera in X7 or X8 PCM970 connector */
321         gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
322         return 0;
323 }
324
325 static struct i2c_board_info pcm037_i2c_2_devices[] = {
326         {
327                 I2C_BOARD_INFO("mt9t031", 0x5d),
328         },
329 };
330
331 static struct soc_camera_link iclink = {
332         .bus_id         = 0,            /* Must match with the camera ID */
333         .power          = pcm037_camera_power,
334         .board_info     = &pcm037_i2c_2_devices[0],
335         .i2c_adapter_id = 2,
336         .module_name    = "mt9t031",
337 };
338
339 static struct i2c_board_info pcm037_i2c_devices[] = {
340         {
341                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
342                 .platform_data = &board_eeprom,
343         }, {
344                 I2C_BOARD_INFO("pcf8563", 0x51),
345         }
346 };
347
348 static struct platform_device pcm037_camera = {
349         .name   = "soc-camera-pdrv",
350         .id     = 0,
351         .dev    = {
352                 .platform_data = &iclink,
353         },
354 };
355
356 /* Not connected by default */
357 #ifdef PCM970_SDHC_RW_SWITCH
358 static int pcm970_sdhc1_get_ro(struct device *dev)
359 {
360         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
361 }
362 #endif
363
364 #define SDHC1_GPIO_WP   IOMUX_TO_GPIO(MX31_PIN_SFS6)
365 #define SDHC1_GPIO_DET  IOMUX_TO_GPIO(MX31_PIN_SCK6)
366
367 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
368                 void *data)
369 {
370         int ret;
371
372         ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
373         if (ret)
374                 return ret;
375
376         gpio_direction_input(SDHC1_GPIO_DET);
377
378 #ifdef PCM970_SDHC_RW_SWITCH
379         ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
380         if (ret)
381                 goto err_gpio_free;
382         gpio_direction_input(SDHC1_GPIO_WP);
383 #endif
384
385         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
386                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
387                                 "sdhc-detect", data);
388         if (ret)
389                 goto err_gpio_free_2;
390
391         return 0;
392
393 err_gpio_free_2:
394 #ifdef PCM970_SDHC_RW_SWITCH
395         gpio_free(SDHC1_GPIO_WP);
396 err_gpio_free:
397 #endif
398         gpio_free(SDHC1_GPIO_DET);
399
400         return ret;
401 }
402
403 static void pcm970_sdhc1_exit(struct device *dev, void *data)
404 {
405         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
406         gpio_free(SDHC1_GPIO_DET);
407         gpio_free(SDHC1_GPIO_WP);
408 }
409
410 static struct imxmmc_platform_data sdhc_pdata = {
411 #ifdef PCM970_SDHC_RW_SWITCH
412         .get_ro = pcm970_sdhc1_get_ro,
413 #endif
414         .init = pcm970_sdhc1_init,
415         .exit = pcm970_sdhc1_exit,
416 };
417
418 struct mx3_camera_pdata camera_pdata = {
419         .dma_dev        = &mx3_ipu.dev,
420         .flags          = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
421         .mclk_10khz     = 2000,
422 };
423
424 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
425 {
426         dma_addr_t dma_handle;
427         void *buf;
428         int dma;
429
430         if (buf_size < 2 * 1024 * 1024)
431                 return -EINVAL;
432
433         buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
434         if (!buf) {
435                 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
436                 return -ENOMEM;
437         }
438
439         memset(buf, 0, buf_size);
440
441         dma = dma_declare_coherent_memory(&mx3_camera.dev,
442                                         dma_handle, dma_handle, buf_size,
443                                         DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
444
445         /* The way we call dma_declare_coherent_memory only a malloc can fail */
446         return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
447 }
448
449 static struct platform_device *devices[] __initdata = {
450         &pcm037_flash,
451         &pcm037_sram_device,
452         &pcm037_camera,
453 };
454
455 static struct ipu_platform_data mx3_ipu_data = {
456         .irq_base = MXC_IPU_IRQ_START,
457 };
458
459 static const struct fb_videomode fb_modedb[] = {
460         {
461                 /* 240x320 @ 60 Hz Sharp */
462                 .name           = "Sharp-LQ035Q7DH06-QVGA",
463                 .refresh        = 60,
464                 .xres           = 240,
465                 .yres           = 320,
466                 .pixclock       = 185925,
467                 .left_margin    = 9,
468                 .right_margin   = 16,
469                 .upper_margin   = 7,
470                 .lower_margin   = 9,
471                 .hsync_len      = 1,
472                 .vsync_len      = 1,
473                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
474                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
475                 .vmode          = FB_VMODE_NONINTERLACED,
476                 .flag           = 0,
477         }, {
478                 /* 240x320 @ 60 Hz */
479                 .name           = "TX090",
480                 .refresh        = 60,
481                 .xres           = 240,
482                 .yres           = 320,
483                 .pixclock       = 38255,
484                 .left_margin    = 144,
485                 .right_margin   = 0,
486                 .upper_margin   = 7,
487                 .lower_margin   = 40,
488                 .hsync_len      = 96,
489                 .vsync_len      = 1,
490                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
491                 .vmode          = FB_VMODE_NONINTERLACED,
492                 .flag           = 0,
493         }, {
494                 /* 240x320 @ 60 Hz */
495                 .name           = "CMEL-OLED",
496                 .refresh        = 60,
497                 .xres           = 240,
498                 .yres           = 320,
499                 .pixclock       = 185925,
500                 .left_margin    = 9,
501                 .right_margin   = 16,
502                 .upper_margin   = 7,
503                 .lower_margin   = 9,
504                 .hsync_len      = 1,
505                 .vsync_len      = 1,
506                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
507                 .vmode          = FB_VMODE_NONINTERLACED,
508                 .flag           = 0,
509         },
510 };
511
512 static struct mx3fb_platform_data mx3fb_pdata = {
513         .dma_dev        = &mx3_ipu.dev,
514         .name           = "Sharp-LQ035Q7DH06-QVGA",
515         .mode           = fb_modedb,
516         .num_modes      = ARRAY_SIZE(fb_modedb),
517 };
518
519 static struct resource pcm970_sja1000_resources[] = {
520         {
521                 .start   = CS5_BASE_ADDR,
522                 .end     = CS5_BASE_ADDR + 0x100 - 1,
523                 .flags   = IORESOURCE_MEM,
524         }, {
525                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
526                 .end     = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
527                 .flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
528         },
529 };
530
531 struct sja1000_platform_data pcm970_sja1000_platform_data = {
532         .clock          = 16000000 / 2,
533         .ocr            = 0x40 | 0x18,
534         .cdr            = 0x40,
535 };
536
537 static struct platform_device pcm970_sja1000 = {
538         .name = "sja1000_platform",
539         .dev = {
540                 .platform_data = &pcm970_sja1000_platform_data,
541         },
542         .resource = pcm970_sja1000_resources,
543         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
544 };
545
546 /*
547  * Board specific initialization.
548  */
549 static void __init mxc_board_init(void)
550 {
551         int ret;
552
553         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
554                         "pcm037");
555
556         if (pcm037_variant() == PCM037_EET)
557                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
558                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
559         else
560                 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
561                         ARRAY_SIZE(pcm037_uart1_handshake_pins),
562                         "pcm037_uart1");
563
564         platform_add_devices(devices, ARRAY_SIZE(devices));
565
566         mxc_register_device(&mxc_uart_device0, &uart_pdata);
567         mxc_register_device(&mxc_uart_device1, &uart_pdata);
568         mxc_register_device(&mxc_uart_device2, &uart_pdata);
569
570         mxc_register_device(&mxc_w1_master_device, NULL);
571
572         /* LAN9217 IRQ pin */
573         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
574         if (ret)
575                 pr_warning("could not get LAN irq gpio\n");
576         else {
577                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
578                 platform_device_register(&pcm037_eth);
579         }
580
581
582         /* I2C adapters and devices */
583         i2c_register_board_info(1, pcm037_i2c_devices,
584                         ARRAY_SIZE(pcm037_i2c_devices));
585
586         mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
587         mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
588
589         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
590         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
591         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
592         mxc_register_device(&mx3_fb, &mx3fb_pdata);
593         if (!gpio_usbotg_hs_activate())
594                 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
595
596         /* CSI */
597         /* Camera power: default - off */
598         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
599         if (!ret)
600                 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
601         else
602                 iclink.power = NULL;
603
604         if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
605                 mxc_register_device(&mx3_camera, &camera_pdata);
606
607         platform_device_register(&pcm970_sja1000);
608 }
609
610 static void __init pcm037_timer_init(void)
611 {
612         mx31_clocks_init(26000000);
613 }
614
615 struct sys_timer pcm037_timer = {
616         .init   = pcm037_timer_init,
617 };
618
619 MACHINE_START(PCM037, "Phytec Phycore pcm037")
620         /* Maintainer: Pengutronix */
621         .phys_io        = AIPS1_BASE_ADDR,
622         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
623         .boot_params    = PHYS_OFFSET + 0x100,
624         .map_io         = mx31_map_io,
625         .init_irq       = mx31_init_irq,
626         .init_machine   = mxc_board_init,
627         .timer          = &pcm037_timer,
628 MACHINE_END