Merge branch 'for-rmk/samsung6' of git://git.fluff.org/bjdooks/linux into devel-stable
[linux-2.6.git] / arch / arm / mach-mx3 / mach-pcm037.c
1 /*
2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34 #include <linux/fsl_devices.h>
35 #include <linux/can/platform/sja1000.h>
36 #include <linux/usb/otg.h>
37 #include <linux/usb/ulpi.h>
38 #include <linux/fsl_devices.h>
39
40 #include <media/soc_camera.h>
41
42 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/time.h>
45 #include <asm/mach/map.h>
46 #include <mach/board-pcm037.h>
47 #include <mach/common.h>
48 #include <mach/hardware.h>
49 #include <mach/i2c.h>
50 #include <mach/imx-uart.h>
51 #include <mach/iomux-mx3.h>
52 #include <mach/ipu.h>
53 #include <mach/mmc.h>
54 #include <mach/mx3_camera.h>
55 #include <mach/mx3fb.h>
56 #include <mach/mxc_nand.h>
57 #include <mach/mxc_ehci.h>
58 #include <mach/ulpi.h>
59
60 #include "devices.h"
61 #include "pcm037.h"
62
63 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
64
65 static int __init pcm037_variant_setup(char *str)
66 {
67         if (!strcmp("eet", str))
68                 pcm037_instance = PCM037_EET;
69         else if (strcmp("pcm970", str))
70                 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
71
72         return 1;
73 }
74
75 /* Supported values: "pcm970" (default) and "eet" */
76 __setup("pcm037_variant=", pcm037_variant_setup);
77
78 enum pcm037_board_variant pcm037_variant(void)
79 {
80         return pcm037_instance;
81 }
82
83 /* UART1 with RTS/CTS handshake signals */
84 static unsigned int pcm037_uart1_handshake_pins[] = {
85         MX31_PIN_CTS1__CTS1,
86         MX31_PIN_RTS1__RTS1,
87         MX31_PIN_TXD1__TXD1,
88         MX31_PIN_RXD1__RXD1,
89 };
90
91 /* UART1 without RTS/CTS handshake signals */
92 static unsigned int pcm037_uart1_pins[] = {
93         MX31_PIN_TXD1__TXD1,
94         MX31_PIN_RXD1__RXD1,
95 };
96
97 static unsigned int pcm037_pins[] = {
98         /* I2C */
99         MX31_PIN_CSPI2_MOSI__SCL,
100         MX31_PIN_CSPI2_MISO__SDA,
101         MX31_PIN_CSPI2_SS2__I2C3_SDA,
102         MX31_PIN_CSPI2_SCLK__I2C3_SCL,
103         /* SDHC1 */
104         MX31_PIN_SD1_DATA3__SD1_DATA3,
105         MX31_PIN_SD1_DATA2__SD1_DATA2,
106         MX31_PIN_SD1_DATA1__SD1_DATA1,
107         MX31_PIN_SD1_DATA0__SD1_DATA0,
108         MX31_PIN_SD1_CLK__SD1_CLK,
109         MX31_PIN_SD1_CMD__SD1_CMD,
110         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
111         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
112         /* SPI1 */
113         MX31_PIN_CSPI1_MOSI__MOSI,
114         MX31_PIN_CSPI1_MISO__MISO,
115         MX31_PIN_CSPI1_SCLK__SCLK,
116         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
117         MX31_PIN_CSPI1_SS0__SS0,
118         MX31_PIN_CSPI1_SS1__SS1,
119         MX31_PIN_CSPI1_SS2__SS2,
120         /* UART2 */
121         MX31_PIN_TXD2__TXD2,
122         MX31_PIN_RXD2__RXD2,
123         MX31_PIN_CTS2__CTS2,
124         MX31_PIN_RTS2__RTS2,
125         /* UART3 */
126         MX31_PIN_CSPI3_MOSI__RXD3,
127         MX31_PIN_CSPI3_MISO__TXD3,
128         MX31_PIN_CSPI3_SCLK__RTS3,
129         MX31_PIN_CSPI3_SPI_RDY__CTS3,
130         /* LAN9217 irq pin */
131         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
132         /* Onewire */
133         MX31_PIN_BATT_LINE__OWIRE,
134         /* Framebuffer */
135         MX31_PIN_LD0__LD0,
136         MX31_PIN_LD1__LD1,
137         MX31_PIN_LD2__LD2,
138         MX31_PIN_LD3__LD3,
139         MX31_PIN_LD4__LD4,
140         MX31_PIN_LD5__LD5,
141         MX31_PIN_LD6__LD6,
142         MX31_PIN_LD7__LD7,
143         MX31_PIN_LD8__LD8,
144         MX31_PIN_LD9__LD9,
145         MX31_PIN_LD10__LD10,
146         MX31_PIN_LD11__LD11,
147         MX31_PIN_LD12__LD12,
148         MX31_PIN_LD13__LD13,
149         MX31_PIN_LD14__LD14,
150         MX31_PIN_LD15__LD15,
151         MX31_PIN_LD16__LD16,
152         MX31_PIN_LD17__LD17,
153         MX31_PIN_VSYNC3__VSYNC3,
154         MX31_PIN_HSYNC__HSYNC,
155         MX31_PIN_FPSHIFT__FPSHIFT,
156         MX31_PIN_DRDY0__DRDY0,
157         MX31_PIN_D3_REV__D3_REV,
158         MX31_PIN_CONTRAST__CONTRAST,
159         MX31_PIN_D3_SPL__D3_SPL,
160         MX31_PIN_D3_CLS__D3_CLS,
161         MX31_PIN_LCS0__GPI03_23,
162         /* CSI */
163         IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
164         MX31_PIN_CSI_D6__CSI_D6,
165         MX31_PIN_CSI_D7__CSI_D7,
166         MX31_PIN_CSI_D8__CSI_D8,
167         MX31_PIN_CSI_D9__CSI_D9,
168         MX31_PIN_CSI_D10__CSI_D10,
169         MX31_PIN_CSI_D11__CSI_D11,
170         MX31_PIN_CSI_D12__CSI_D12,
171         MX31_PIN_CSI_D13__CSI_D13,
172         MX31_PIN_CSI_D14__CSI_D14,
173         MX31_PIN_CSI_D15__CSI_D15,
174         MX31_PIN_CSI_HSYNC__CSI_HSYNC,
175         MX31_PIN_CSI_MCLK__CSI_MCLK,
176         MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
177         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
178         /* GPIO */
179         IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
180         /* OTG */
181         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
182         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
183         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
184         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
185         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
186         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
187         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
188         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
189         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
190         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
191         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
192         MX31_PIN_USBOTG_STP__USBOTG_STP,
193         /* USB host 2 */
194         IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
195         IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
196         IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
197         IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
198         IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
199         IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
200         IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
201         IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
202         IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
203         IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
204         IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
205         IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
206 };
207
208 static struct physmap_flash_data pcm037_flash_data = {
209         .width  = 2,
210 };
211
212 static struct resource pcm037_flash_resource = {
213         .start  = 0xa0000000,
214         .end    = 0xa1ffffff,
215         .flags  = IORESOURCE_MEM,
216 };
217
218 static struct platform_device pcm037_flash = {
219         .name   = "physmap-flash",
220         .id     = 0,
221         .dev    = {
222                 .platform_data  = &pcm037_flash_data,
223         },
224         .resource = &pcm037_flash_resource,
225         .num_resources = 1,
226 };
227
228 static struct imxuart_platform_data uart_pdata = {
229         .flags = IMXUART_HAVE_RTSCTS,
230 };
231
232 static struct resource smsc911x_resources[] = {
233         {
234                 .start          = MX31_CS1_BASE_ADDR + 0x300,
235                 .end            = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
236                 .flags          = IORESOURCE_MEM,
237         }, {
238                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
239                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
240                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
241         },
242 };
243
244 static struct smsc911x_platform_config smsc911x_info = {
245         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
246                           SMSC911X_SAVE_MAC_ADDRESS,
247         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
248         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
249         .phy_interface  = PHY_INTERFACE_MODE_MII,
250 };
251
252 static struct platform_device pcm037_eth = {
253         .name           = "smsc911x",
254         .id             = -1,
255         .num_resources  = ARRAY_SIZE(smsc911x_resources),
256         .resource       = smsc911x_resources,
257         .dev            = {
258                 .platform_data = &smsc911x_info,
259         },
260 };
261
262 static struct platdata_mtd_ram pcm038_sram_data = {
263         .bankwidth = 2,
264 };
265
266 static struct resource pcm038_sram_resource = {
267         .start = MX31_CS4_BASE_ADDR,
268         .end   = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
269         .flags = IORESOURCE_MEM,
270 };
271
272 static struct platform_device pcm037_sram_device = {
273         .name = "mtd-ram",
274         .id = 0,
275         .dev = {
276                 .platform_data = &pcm038_sram_data,
277         },
278         .num_resources = 1,
279         .resource = &pcm038_sram_resource,
280 };
281
282 static struct mxc_nand_platform_data pcm037_nand_board_info = {
283         .width = 1,
284         .hw_ecc = 1,
285 };
286
287 static struct imxi2c_platform_data pcm037_i2c_1_data = {
288         .bitrate = 100000,
289 };
290
291 static struct imxi2c_platform_data pcm037_i2c_2_data = {
292         .bitrate = 20000,
293 };
294
295 static struct at24_platform_data board_eeprom = {
296         .byte_len = 4096,
297         .page_size = 32,
298         .flags = AT24_FLAG_ADDR16,
299 };
300
301 static int pcm037_camera_power(struct device *dev, int on)
302 {
303         /* disable or enable the camera in X7 or X8 PCM970 connector */
304         gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
305         return 0;
306 }
307
308 static struct i2c_board_info pcm037_i2c_camera[] = {
309         {
310                 I2C_BOARD_INFO("mt9t031", 0x5d),
311         }, {
312                 I2C_BOARD_INFO("mt9v022", 0x48),
313         },
314 };
315
316 static struct soc_camera_link iclink_mt9v022 = {
317         .bus_id         = 0,            /* Must match with the camera ID */
318         .board_info     = &pcm037_i2c_camera[1],
319         .i2c_adapter_id = 2,
320         .module_name    = "mt9v022",
321 };
322
323 static struct soc_camera_link iclink_mt9t031 = {
324         .bus_id         = 0,            /* Must match with the camera ID */
325         .power          = pcm037_camera_power,
326         .board_info     = &pcm037_i2c_camera[0],
327         .i2c_adapter_id = 2,
328         .module_name    = "mt9t031",
329 };
330
331 static struct i2c_board_info pcm037_i2c_devices[] = {
332         {
333                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
334                 .platform_data = &board_eeprom,
335         }, {
336                 I2C_BOARD_INFO("pcf8563", 0x51),
337         }
338 };
339
340 static struct platform_device pcm037_mt9t031 = {
341         .name   = "soc-camera-pdrv",
342         .id     = 0,
343         .dev    = {
344                 .platform_data = &iclink_mt9t031,
345         },
346 };
347
348 static struct platform_device pcm037_mt9v022 = {
349         .name   = "soc-camera-pdrv",
350         .id     = 1,
351         .dev    = {
352                 .platform_data = &iclink_mt9v022,
353         },
354 };
355
356 /* Not connected by default */
357 #ifdef PCM970_SDHC_RW_SWITCH
358 static int pcm970_sdhc1_get_ro(struct device *dev)
359 {
360         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
361 }
362 #endif
363
364 #define SDHC1_GPIO_WP   IOMUX_TO_GPIO(MX31_PIN_SFS6)
365 #define SDHC1_GPIO_DET  IOMUX_TO_GPIO(MX31_PIN_SCK6)
366
367 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
368                 void *data)
369 {
370         int ret;
371
372         ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
373         if (ret)
374                 return ret;
375
376         gpio_direction_input(SDHC1_GPIO_DET);
377
378 #ifdef PCM970_SDHC_RW_SWITCH
379         ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
380         if (ret)
381                 goto err_gpio_free;
382         gpio_direction_input(SDHC1_GPIO_WP);
383 #endif
384
385         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
386                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
387                                 "sdhc-detect", data);
388         if (ret)
389                 goto err_gpio_free_2;
390
391         return 0;
392
393 err_gpio_free_2:
394 #ifdef PCM970_SDHC_RW_SWITCH
395         gpio_free(SDHC1_GPIO_WP);
396 err_gpio_free:
397 #endif
398         gpio_free(SDHC1_GPIO_DET);
399
400         return ret;
401 }
402
403 static void pcm970_sdhc1_exit(struct device *dev, void *data)
404 {
405         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
406         gpio_free(SDHC1_GPIO_DET);
407         gpio_free(SDHC1_GPIO_WP);
408 }
409
410 static struct imxmmc_platform_data sdhc_pdata = {
411 #ifdef PCM970_SDHC_RW_SWITCH
412         .get_ro = pcm970_sdhc1_get_ro,
413 #endif
414         .init = pcm970_sdhc1_init,
415         .exit = pcm970_sdhc1_exit,
416 };
417
418 struct mx3_camera_pdata camera_pdata = {
419         .dma_dev        = &mx3_ipu.dev,
420         .flags          = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
421         .mclk_10khz     = 2000,
422 };
423
424 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
425 {
426         dma_addr_t dma_handle;
427         void *buf;
428         int dma;
429
430         if (buf_size < 2 * 1024 * 1024)
431                 return -EINVAL;
432
433         buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
434         if (!buf) {
435                 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
436                 return -ENOMEM;
437         }
438
439         memset(buf, 0, buf_size);
440
441         dma = dma_declare_coherent_memory(&mx3_camera.dev,
442                                         dma_handle, dma_handle, buf_size,
443                                         DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
444
445         /* The way we call dma_declare_coherent_memory only a malloc can fail */
446         return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
447 }
448
449 static struct platform_device *devices[] __initdata = {
450         &pcm037_flash,
451         &pcm037_sram_device,
452         &pcm037_mt9t031,
453         &pcm037_mt9v022,
454 };
455
456 static struct ipu_platform_data mx3_ipu_data = {
457         .irq_base = MXC_IPU_IRQ_START,
458 };
459
460 static const struct fb_videomode fb_modedb[] = {
461         {
462                 /* 240x320 @ 60 Hz Sharp */
463                 .name           = "Sharp-LQ035Q7DH06-QVGA",
464                 .refresh        = 60,
465                 .xres           = 240,
466                 .yres           = 320,
467                 .pixclock       = 185925,
468                 .left_margin    = 9,
469                 .right_margin   = 16,
470                 .upper_margin   = 7,
471                 .lower_margin   = 9,
472                 .hsync_len      = 1,
473                 .vsync_len      = 1,
474                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
475                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
476                 .vmode          = FB_VMODE_NONINTERLACED,
477                 .flag           = 0,
478         }, {
479                 /* 240x320 @ 60 Hz */
480                 .name           = "TX090",
481                 .refresh        = 60,
482                 .xres           = 240,
483                 .yres           = 320,
484                 .pixclock       = 38255,
485                 .left_margin    = 144,
486                 .right_margin   = 0,
487                 .upper_margin   = 7,
488                 .lower_margin   = 40,
489                 .hsync_len      = 96,
490                 .vsync_len      = 1,
491                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
492                 .vmode          = FB_VMODE_NONINTERLACED,
493                 .flag           = 0,
494         }, {
495                 /* 240x320 @ 60 Hz */
496                 .name           = "CMEL-OLED",
497                 .refresh        = 60,
498                 .xres           = 240,
499                 .yres           = 320,
500                 .pixclock       = 185925,
501                 .left_margin    = 9,
502                 .right_margin   = 16,
503                 .upper_margin   = 7,
504                 .lower_margin   = 9,
505                 .hsync_len      = 1,
506                 .vsync_len      = 1,
507                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
508                 .vmode          = FB_VMODE_NONINTERLACED,
509                 .flag           = 0,
510         },
511 };
512
513 static struct mx3fb_platform_data mx3fb_pdata = {
514         .dma_dev        = &mx3_ipu.dev,
515         .name           = "Sharp-LQ035Q7DH06-QVGA",
516         .mode           = fb_modedb,
517         .num_modes      = ARRAY_SIZE(fb_modedb),
518 };
519
520 static struct resource pcm970_sja1000_resources[] = {
521         {
522                 .start   = MX31_CS5_BASE_ADDR,
523                 .end     = MX31_CS5_BASE_ADDR + 0x100 - 1,
524                 .flags   = IORESOURCE_MEM,
525         }, {
526                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
527                 .end     = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
528                 .flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
529         },
530 };
531
532 struct sja1000_platform_data pcm970_sja1000_platform_data = {
533         .clock          = 16000000 / 2,
534         .ocr            = 0x40 | 0x18,
535         .cdr            = 0x40,
536 };
537
538 static struct platform_device pcm970_sja1000 = {
539         .name = "sja1000_platform",
540         .dev = {
541                 .platform_data = &pcm970_sja1000_platform_data,
542         },
543         .resource = pcm970_sja1000_resources,
544         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
545 };
546
547 static struct mxc_usbh_platform_data otg_pdata = {
548         .portsc = MXC_EHCI_MODE_ULPI,
549         .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
550 };
551
552 static struct mxc_usbh_platform_data usbh2_pdata = {
553         .portsc = MXC_EHCI_MODE_ULPI,
554         .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
555 };
556
557 static struct fsl_usb2_platform_data otg_device_pdata = {
558         .operating_mode = FSL_USB2_DR_DEVICE,
559         .phy_mode       = FSL_USB2_PHY_ULPI,
560 };
561
562 static int otg_mode_host;
563
564 static int __init pcm037_otg_mode(char *options)
565 {
566         if (!strcmp(options, "host"))
567                 otg_mode_host = 1;
568         else if (!strcmp(options, "device"))
569                 otg_mode_host = 0;
570         else
571                 pr_info("otg_mode neither \"host\" nor \"device\". "
572                         "Defaulting to device\n");
573         return 0;
574 }
575 __setup("otg_mode=", pcm037_otg_mode);
576
577 /*
578  * Board specific initialization.
579  */
580 static void __init mxc_board_init(void)
581 {
582         int ret;
583         u32 tmp;
584
585         mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
586
587         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
588                         "pcm037");
589
590 #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
591                 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
592
593         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
594         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
595         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
596         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
597         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
598         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
599         mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG);  /* USBH2_DATA2 */
600         mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG);  /* USBH2_DATA3 */
601         mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG);   /* USBH2_DATA4 */
602         mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG);   /* USBH2_DATA5 */
603         mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);  /* USBH2_DATA6 */
604         mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);  /* USBH2_DATA7 */
605
606         if (pcm037_variant() == PCM037_EET)
607                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
608                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
609         else
610                 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
611                         ARRAY_SIZE(pcm037_uart1_handshake_pins),
612                         "pcm037_uart1");
613
614         platform_add_devices(devices, ARRAY_SIZE(devices));
615
616         mxc_register_device(&mxc_uart_device0, &uart_pdata);
617         mxc_register_device(&mxc_uart_device1, &uart_pdata);
618         mxc_register_device(&mxc_uart_device2, &uart_pdata);
619
620         mxc_register_device(&mxc_w1_master_device, NULL);
621
622         /* LAN9217 IRQ pin */
623         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
624         if (ret)
625                 pr_warning("could not get LAN irq gpio\n");
626         else {
627                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
628                 platform_device_register(&pcm037_eth);
629         }
630
631
632         /* I2C adapters and devices */
633         i2c_register_board_info(1, pcm037_i2c_devices,
634                         ARRAY_SIZE(pcm037_i2c_devices));
635
636         mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
637         mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
638
639         mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
640         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
641         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
642         mxc_register_device(&mx3_fb, &mx3fb_pdata);
643
644         /* CSI */
645         /* Camera power: default - off */
646         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
647         if (!ret)
648                 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
649         else
650                 iclink_mt9t031.power = NULL;
651
652         if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
653                 mxc_register_device(&mx3_camera, &camera_pdata);
654
655         platform_device_register(&pcm970_sja1000);
656
657 #if defined(CONFIG_USB_ULPI)
658         if (otg_mode_host) {
659                 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
660                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
661
662                 mxc_register_device(&mxc_otg_host, &otg_pdata);
663         }
664
665         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
666                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
667
668         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
669 #endif
670         if (!otg_mode_host)
671                 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
672
673 }
674
675 static void __init pcm037_timer_init(void)
676 {
677         mx31_clocks_init(26000000);
678 }
679
680 struct sys_timer pcm037_timer = {
681         .init   = pcm037_timer_init,
682 };
683
684 MACHINE_START(PCM037, "Phytec Phycore pcm037")
685         /* Maintainer: Pengutronix */
686         .phys_io        = MX31_AIPS1_BASE_ADDR,
687         .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
688         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
689         .map_io         = mx31_map_io,
690         .init_irq       = mx31_init_irq,
691         .init_machine   = mxc_board_init,
692         .timer          = &pcm037_timer,
693 MACHINE_END