mtd: kirkwood: allow machines to register RnB callback
[linux-2.6.git] / arch / arm / mach-kirkwood / common.c
1 /*
2  * arch/arm/mach-kirkwood/common.c
3  *
4  * Core functions for Marvell Kirkwood SoCs
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
21 #include <net/dsa.h>
22 #include <asm/page.h>
23 #include <asm/timex.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/cache-feroceon-l2.h>
29 #include <plat/ehci-orion.h>
30 #include <plat/mvsdio.h>
31 #include <plat/mv_xor.h>
32 #include <plat/orion_nand.h>
33 #include <plat/orion_wdt.h>
34 #include <plat/time.h>
35 #include "common.h"
36
37 /*****************************************************************************
38  * I/O Address Mapping
39  ****************************************************************************/
40 static struct map_desc kirkwood_io_desc[] __initdata = {
41         {
42                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
43                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
44                 .length         = KIRKWOOD_PCIE_IO_SIZE,
45                 .type           = MT_DEVICE,
46         }, {
47                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
48                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
49                 .length         = KIRKWOOD_REGS_SIZE,
50                 .type           = MT_DEVICE,
51         },
52 };
53
54 void __init kirkwood_map_io(void)
55 {
56         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
57 }
58
59 /*
60  * Default clock control bits.  Any bit _not_ set in this variable
61  * will be cleared from the hardware after platform devices have been
62  * registered.  Some reserved bits must be set to 1.
63  */
64 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
65         
66
67 /*****************************************************************************
68  * EHCI
69  ****************************************************************************/
70 static struct orion_ehci_data kirkwood_ehci_data = {
71         .dram           = &kirkwood_mbus_dram_info,
72         .phy_version    = EHCI_PHY_NA,
73 };
74
75 static u64 ehci_dmamask = 0xffffffffUL;
76
77
78 /*****************************************************************************
79  * EHCI0
80  ****************************************************************************/
81 static struct resource kirkwood_ehci_resources[] = {
82         {
83                 .start  = USB_PHYS_BASE,
84                 .end    = USB_PHYS_BASE + 0x0fff,
85                 .flags  = IORESOURCE_MEM,
86         }, {
87                 .start  = IRQ_KIRKWOOD_USB,
88                 .end    = IRQ_KIRKWOOD_USB,
89                 .flags  = IORESOURCE_IRQ,
90         },
91 };
92
93 static struct platform_device kirkwood_ehci = {
94         .name           = "orion-ehci",
95         .id             = 0,
96         .dev            = {
97                 .dma_mask               = &ehci_dmamask,
98                 .coherent_dma_mask      = 0xffffffff,
99                 .platform_data          = &kirkwood_ehci_data,
100         },
101         .resource       = kirkwood_ehci_resources,
102         .num_resources  = ARRAY_SIZE(kirkwood_ehci_resources),
103 };
104
105 void __init kirkwood_ehci_init(void)
106 {
107         kirkwood_clk_ctrl |= CGC_USB0;
108         platform_device_register(&kirkwood_ehci);
109 }
110
111
112 /*****************************************************************************
113  * GE00
114  ****************************************************************************/
115 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
116         .dram           = &kirkwood_mbus_dram_info,
117 };
118
119 static struct resource kirkwood_ge00_shared_resources[] = {
120         {
121                 .name   = "ge00 base",
122                 .start  = GE00_PHYS_BASE + 0x2000,
123                 .end    = GE00_PHYS_BASE + 0x3fff,
124                 .flags  = IORESOURCE_MEM,
125         }, {
126                 .name   = "ge00 err irq",
127                 .start  = IRQ_KIRKWOOD_GE00_ERR,
128                 .end    = IRQ_KIRKWOOD_GE00_ERR,
129                 .flags  = IORESOURCE_IRQ,
130         },
131 };
132
133 static struct platform_device kirkwood_ge00_shared = {
134         .name           = MV643XX_ETH_SHARED_NAME,
135         .id             = 0,
136         .dev            = {
137                 .platform_data  = &kirkwood_ge00_shared_data,
138         },
139         .num_resources  = ARRAY_SIZE(kirkwood_ge00_shared_resources),
140         .resource       = kirkwood_ge00_shared_resources,
141 };
142
143 static struct resource kirkwood_ge00_resources[] = {
144         {
145                 .name   = "ge00 irq",
146                 .start  = IRQ_KIRKWOOD_GE00_SUM,
147                 .end    = IRQ_KIRKWOOD_GE00_SUM,
148                 .flags  = IORESOURCE_IRQ,
149         },
150 };
151
152 static struct platform_device kirkwood_ge00 = {
153         .name           = MV643XX_ETH_NAME,
154         .id             = 0,
155         .num_resources  = 1,
156         .resource       = kirkwood_ge00_resources,
157         .dev            = {
158                 .coherent_dma_mask      = 0xffffffff,
159         },
160 };
161
162 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
163 {
164         kirkwood_clk_ctrl |= CGC_GE0;
165         eth_data->shared = &kirkwood_ge00_shared;
166         kirkwood_ge00.dev.platform_data = eth_data;
167
168         platform_device_register(&kirkwood_ge00_shared);
169         platform_device_register(&kirkwood_ge00);
170 }
171
172
173 /*****************************************************************************
174  * GE01
175  ****************************************************************************/
176 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
177         .dram           = &kirkwood_mbus_dram_info,
178         .shared_smi     = &kirkwood_ge00_shared,
179 };
180
181 static struct resource kirkwood_ge01_shared_resources[] = {
182         {
183                 .name   = "ge01 base",
184                 .start  = GE01_PHYS_BASE + 0x2000,
185                 .end    = GE01_PHYS_BASE + 0x3fff,
186                 .flags  = IORESOURCE_MEM,
187         }, {
188                 .name   = "ge01 err irq",
189                 .start  = IRQ_KIRKWOOD_GE01_ERR,
190                 .end    = IRQ_KIRKWOOD_GE01_ERR,
191                 .flags  = IORESOURCE_IRQ,
192         },
193 };
194
195 static struct platform_device kirkwood_ge01_shared = {
196         .name           = MV643XX_ETH_SHARED_NAME,
197         .id             = 1,
198         .dev            = {
199                 .platform_data  = &kirkwood_ge01_shared_data,
200         },
201         .num_resources  = ARRAY_SIZE(kirkwood_ge01_shared_resources),
202         .resource       = kirkwood_ge01_shared_resources,
203 };
204
205 static struct resource kirkwood_ge01_resources[] = {
206         {
207                 .name   = "ge01 irq",
208                 .start  = IRQ_KIRKWOOD_GE01_SUM,
209                 .end    = IRQ_KIRKWOOD_GE01_SUM,
210                 .flags  = IORESOURCE_IRQ,
211         },
212 };
213
214 static struct platform_device kirkwood_ge01 = {
215         .name           = MV643XX_ETH_NAME,
216         .id             = 1,
217         .num_resources  = 1,
218         .resource       = kirkwood_ge01_resources,
219         .dev            = {
220                 .coherent_dma_mask      = 0xffffffff,
221         },
222 };
223
224 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
225 {
226         kirkwood_clk_ctrl |= CGC_GE1;
227         eth_data->shared = &kirkwood_ge01_shared;
228         kirkwood_ge01.dev.platform_data = eth_data;
229
230         platform_device_register(&kirkwood_ge01_shared);
231         platform_device_register(&kirkwood_ge01);
232 }
233
234
235 /*****************************************************************************
236  * Ethernet switch
237  ****************************************************************************/
238 static struct resource kirkwood_switch_resources[] = {
239         {
240                 .start  = 0,
241                 .end    = 0,
242                 .flags  = IORESOURCE_IRQ,
243         },
244 };
245
246 static struct platform_device kirkwood_switch_device = {
247         .name           = "dsa",
248         .id             = 0,
249         .num_resources  = 0,
250         .resource       = kirkwood_switch_resources,
251 };
252
253 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
254 {
255         int i;
256
257         if (irq != NO_IRQ) {
258                 kirkwood_switch_resources[0].start = irq;
259                 kirkwood_switch_resources[0].end = irq;
260                 kirkwood_switch_device.num_resources = 1;
261         }
262
263         d->netdev = &kirkwood_ge00.dev;
264         for (i = 0; i < d->nr_chips; i++)
265                 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
266         kirkwood_switch_device.dev.platform_data = d;
267
268         platform_device_register(&kirkwood_switch_device);
269 }
270
271
272 /*****************************************************************************
273  * NAND flash
274  ****************************************************************************/
275 static struct resource kirkwood_nand_resource = {
276         .flags          = IORESOURCE_MEM,
277         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
278         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
279                                 KIRKWOOD_NAND_MEM_SIZE - 1,
280 };
281
282 static struct orion_nand_data kirkwood_nand_data = {
283         .cle            = 0,
284         .ale            = 1,
285         .width          = 8,
286 };
287
288 static struct platform_device kirkwood_nand_flash = {
289         .name           = "orion_nand",
290         .id             = -1,
291         .dev            = {
292                 .platform_data  = &kirkwood_nand_data,
293         },
294         .resource       = &kirkwood_nand_resource,
295         .num_resources  = 1,
296 };
297
298 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
299                                int chip_delay)
300 {
301         kirkwood_clk_ctrl |= CGC_RUNIT;
302         kirkwood_nand_data.parts = parts;
303         kirkwood_nand_data.nr_parts = nr_parts;
304         kirkwood_nand_data.chip_delay = chip_delay;
305         platform_device_register(&kirkwood_nand_flash);
306 }
307
308 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
309                                    int (*dev_ready)(struct mtd_info *))
310 {
311         kirkwood_clk_ctrl |= CGC_RUNIT;
312         kirkwood_nand_data.parts = parts;
313         kirkwood_nand_data.nr_parts = nr_parts;
314         kirkwood_nand_data.dev_ready = dev_ready;
315         platform_device_register(&kirkwood_nand_flash);
316 }
317
318 /*****************************************************************************
319  * SoC RTC
320  ****************************************************************************/
321 static struct resource kirkwood_rtc_resource = {
322         .start  = RTC_PHYS_BASE,
323         .end    = RTC_PHYS_BASE + SZ_16 - 1,
324         .flags  = IORESOURCE_MEM,
325 };
326
327 static void __init kirkwood_rtc_init(void)
328 {
329         platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
330 }
331
332
333 /*****************************************************************************
334  * SATA
335  ****************************************************************************/
336 static struct resource kirkwood_sata_resources[] = {
337         {
338                 .name   = "sata base",
339                 .start  = SATA_PHYS_BASE,
340                 .end    = SATA_PHYS_BASE + 0x5000 - 1,
341                 .flags  = IORESOURCE_MEM,
342         }, {
343                 .name   = "sata irq",
344                 .start  = IRQ_KIRKWOOD_SATA,
345                 .end    = IRQ_KIRKWOOD_SATA,
346                 .flags  = IORESOURCE_IRQ,
347         },
348 };
349
350 static struct platform_device kirkwood_sata = {
351         .name           = "sata_mv",
352         .id             = 0,
353         .dev            = {
354                 .coherent_dma_mask      = 0xffffffff,
355         },
356         .num_resources  = ARRAY_SIZE(kirkwood_sata_resources),
357         .resource       = kirkwood_sata_resources,
358 };
359
360 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
361 {
362         kirkwood_clk_ctrl |= CGC_SATA0;
363         if (sata_data->n_ports > 1)
364                 kirkwood_clk_ctrl |= CGC_SATA1;
365         sata_data->dram = &kirkwood_mbus_dram_info;
366         kirkwood_sata.dev.platform_data = sata_data;
367         platform_device_register(&kirkwood_sata);
368 }
369
370
371 /*****************************************************************************
372  * SD/SDIO/MMC
373  ****************************************************************************/
374 static struct resource mvsdio_resources[] = {
375         [0] = {
376                 .start  = SDIO_PHYS_BASE,
377                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
378                 .flags  = IORESOURCE_MEM,
379         },
380         [1] = {
381                 .start  = IRQ_KIRKWOOD_SDIO,
382                 .end    = IRQ_KIRKWOOD_SDIO,
383                 .flags  = IORESOURCE_IRQ,
384         },
385 };
386
387 static u64 mvsdio_dmamask = 0xffffffffUL;
388
389 static struct platform_device kirkwood_sdio = {
390         .name           = "mvsdio",
391         .id             = -1,
392         .dev            = {
393                 .dma_mask = &mvsdio_dmamask,
394                 .coherent_dma_mask = 0xffffffff,
395         },
396         .num_resources  = ARRAY_SIZE(mvsdio_resources),
397         .resource       = mvsdio_resources,
398 };
399
400 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
401 {
402         u32 dev, rev;
403
404         kirkwood_pcie_id(&dev, &rev);
405         if (rev == 0)  /* catch all Kirkwood Z0's */
406                 mvsdio_data->clock = 100000000;
407         else
408                 mvsdio_data->clock = 200000000;
409         mvsdio_data->dram = &kirkwood_mbus_dram_info;
410         kirkwood_clk_ctrl |= CGC_SDIO;
411         kirkwood_sdio.dev.platform_data = mvsdio_data;
412         platform_device_register(&kirkwood_sdio);
413 }
414
415
416 /*****************************************************************************
417  * SPI
418  ****************************************************************************/
419 static struct orion_spi_info kirkwood_spi_plat_data = {
420 };
421
422 static struct resource kirkwood_spi_resources[] = {
423         {
424                 .start  = SPI_PHYS_BASE,
425                 .end    = SPI_PHYS_BASE + SZ_512 - 1,
426                 .flags  = IORESOURCE_MEM,
427         },
428 };
429
430 static struct platform_device kirkwood_spi = {
431         .name           = "orion_spi",
432         .id             = 0,
433         .resource       = kirkwood_spi_resources,
434         .dev            = {
435                 .platform_data  = &kirkwood_spi_plat_data,
436         },
437         .num_resources  = ARRAY_SIZE(kirkwood_spi_resources),
438 };
439
440 void __init kirkwood_spi_init()
441 {
442         kirkwood_clk_ctrl |= CGC_RUNIT;
443         platform_device_register(&kirkwood_spi);
444 }
445
446
447 /*****************************************************************************
448  * I2C
449  ****************************************************************************/
450 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
451         .freq_m         = 8, /* assumes 166 MHz TCLK */
452         .freq_n         = 3,
453         .timeout        = 1000, /* Default timeout of 1 second */
454 };
455
456 static struct resource kirkwood_i2c_resources[] = {
457         {
458                 .start  = I2C_PHYS_BASE,
459                 .end    = I2C_PHYS_BASE + 0x1f,
460                 .flags  = IORESOURCE_MEM,
461         }, {
462                 .start  = IRQ_KIRKWOOD_TWSI,
463                 .end    = IRQ_KIRKWOOD_TWSI,
464                 .flags  = IORESOURCE_IRQ,
465         },
466 };
467
468 static struct platform_device kirkwood_i2c = {
469         .name           = MV64XXX_I2C_CTLR_NAME,
470         .id             = 0,
471         .num_resources  = ARRAY_SIZE(kirkwood_i2c_resources),
472         .resource       = kirkwood_i2c_resources,
473         .dev            = {
474                 .platform_data  = &kirkwood_i2c_pdata,
475         },
476 };
477
478 void __init kirkwood_i2c_init(void)
479 {
480         platform_device_register(&kirkwood_i2c);
481 }
482
483
484 /*****************************************************************************
485  * UART0
486  ****************************************************************************/
487 static struct plat_serial8250_port kirkwood_uart0_data[] = {
488         {
489                 .mapbase        = UART0_PHYS_BASE,
490                 .membase        = (char *)UART0_VIRT_BASE,
491                 .irq            = IRQ_KIRKWOOD_UART_0,
492                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
493                 .iotype         = UPIO_MEM,
494                 .regshift       = 2,
495                 .uartclk        = 0,
496         }, {
497         },
498 };
499
500 static struct resource kirkwood_uart0_resources[] = {
501         {
502                 .start          = UART0_PHYS_BASE,
503                 .end            = UART0_PHYS_BASE + 0xff,
504                 .flags          = IORESOURCE_MEM,
505         }, {
506                 .start          = IRQ_KIRKWOOD_UART_0,
507                 .end            = IRQ_KIRKWOOD_UART_0,
508                 .flags          = IORESOURCE_IRQ,
509         },
510 };
511
512 static struct platform_device kirkwood_uart0 = {
513         .name                   = "serial8250",
514         .id                     = 0,
515         .dev                    = {
516                 .platform_data  = kirkwood_uart0_data,
517         },
518         .resource               = kirkwood_uart0_resources,
519         .num_resources          = ARRAY_SIZE(kirkwood_uart0_resources),
520 };
521
522 void __init kirkwood_uart0_init(void)
523 {
524         platform_device_register(&kirkwood_uart0);
525 }
526
527
528 /*****************************************************************************
529  * UART1
530  ****************************************************************************/
531 static struct plat_serial8250_port kirkwood_uart1_data[] = {
532         {
533                 .mapbase        = UART1_PHYS_BASE,
534                 .membase        = (char *)UART1_VIRT_BASE,
535                 .irq            = IRQ_KIRKWOOD_UART_1,
536                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
537                 .iotype         = UPIO_MEM,
538                 .regshift       = 2,
539                 .uartclk        = 0,
540         }, {
541         },
542 };
543
544 static struct resource kirkwood_uart1_resources[] = {
545         {
546                 .start          = UART1_PHYS_BASE,
547                 .end            = UART1_PHYS_BASE + 0xff,
548                 .flags          = IORESOURCE_MEM,
549         }, {
550                 .start          = IRQ_KIRKWOOD_UART_1,
551                 .end            = IRQ_KIRKWOOD_UART_1,
552                 .flags          = IORESOURCE_IRQ,
553         },
554 };
555
556 static struct platform_device kirkwood_uart1 = {
557         .name                   = "serial8250",
558         .id                     = 1,
559         .dev                    = {
560                 .platform_data  = kirkwood_uart1_data,
561         },
562         .resource               = kirkwood_uart1_resources,
563         .num_resources          = ARRAY_SIZE(kirkwood_uart1_resources),
564 };
565
566 void __init kirkwood_uart1_init(void)
567 {
568         platform_device_register(&kirkwood_uart1);
569 }
570
571
572 /*****************************************************************************
573  * Cryptographic Engines and Security Accelerator (CESA)
574  ****************************************************************************/
575
576 static struct resource kirkwood_crypto_res[] = {
577         {
578                 .name   = "regs",
579                 .start  = CRYPTO_PHYS_BASE,
580                 .end    = CRYPTO_PHYS_BASE + 0xffff,
581                 .flags  = IORESOURCE_MEM,
582         }, {
583                 .name   = "sram",
584                 .start  = KIRKWOOD_SRAM_PHYS_BASE,
585                 .end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
586                 .flags  = IORESOURCE_MEM,
587         }, {
588                 .name   = "crypto interrupt",
589                 .start  = IRQ_KIRKWOOD_CRYPTO,
590                 .end    = IRQ_KIRKWOOD_CRYPTO,
591                 .flags  = IORESOURCE_IRQ,
592         },
593 };
594
595 static struct platform_device kirkwood_crypto_device = {
596         .name           = "mv_crypto",
597         .id             = -1,
598         .num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
599         .resource       = kirkwood_crypto_res,
600 };
601
602 void __init kirkwood_crypto_init(void)
603 {
604         kirkwood_clk_ctrl |= CGC_CRYPTO;
605         platform_device_register(&kirkwood_crypto_device);
606 }
607
608
609 /*****************************************************************************
610  * XOR
611  ****************************************************************************/
612 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
613         .dram           = &kirkwood_mbus_dram_info,
614 };
615
616 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
617
618
619 /*****************************************************************************
620  * XOR0
621  ****************************************************************************/
622 static struct resource kirkwood_xor0_shared_resources[] = {
623         {
624                 .name   = "xor 0 low",
625                 .start  = XOR0_PHYS_BASE,
626                 .end    = XOR0_PHYS_BASE + 0xff,
627                 .flags  = IORESOURCE_MEM,
628         }, {
629                 .name   = "xor 0 high",
630                 .start  = XOR0_HIGH_PHYS_BASE,
631                 .end    = XOR0_HIGH_PHYS_BASE + 0xff,
632                 .flags  = IORESOURCE_MEM,
633         },
634 };
635
636 static struct platform_device kirkwood_xor0_shared = {
637         .name           = MV_XOR_SHARED_NAME,
638         .id             = 0,
639         .dev            = {
640                 .platform_data = &kirkwood_xor_shared_data,
641         },
642         .num_resources  = ARRAY_SIZE(kirkwood_xor0_shared_resources),
643         .resource       = kirkwood_xor0_shared_resources,
644 };
645
646 static struct resource kirkwood_xor00_resources[] = {
647         [0] = {
648                 .start  = IRQ_KIRKWOOD_XOR_00,
649                 .end    = IRQ_KIRKWOOD_XOR_00,
650                 .flags  = IORESOURCE_IRQ,
651         },
652 };
653
654 static struct mv_xor_platform_data kirkwood_xor00_data = {
655         .shared         = &kirkwood_xor0_shared,
656         .hw_id          = 0,
657         .pool_size      = PAGE_SIZE,
658 };
659
660 static struct platform_device kirkwood_xor00_channel = {
661         .name           = MV_XOR_NAME,
662         .id             = 0,
663         .num_resources  = ARRAY_SIZE(kirkwood_xor00_resources),
664         .resource       = kirkwood_xor00_resources,
665         .dev            = {
666                 .dma_mask               = &kirkwood_xor_dmamask,
667                 .coherent_dma_mask      = DMA_BIT_MASK(64),
668                 .platform_data          = &kirkwood_xor00_data,
669         },
670 };
671
672 static struct resource kirkwood_xor01_resources[] = {
673         [0] = {
674                 .start  = IRQ_KIRKWOOD_XOR_01,
675                 .end    = IRQ_KIRKWOOD_XOR_01,
676                 .flags  = IORESOURCE_IRQ,
677         },
678 };
679
680 static struct mv_xor_platform_data kirkwood_xor01_data = {
681         .shared         = &kirkwood_xor0_shared,
682         .hw_id          = 1,
683         .pool_size      = PAGE_SIZE,
684 };
685
686 static struct platform_device kirkwood_xor01_channel = {
687         .name           = MV_XOR_NAME,
688         .id             = 1,
689         .num_resources  = ARRAY_SIZE(kirkwood_xor01_resources),
690         .resource       = kirkwood_xor01_resources,
691         .dev            = {
692                 .dma_mask               = &kirkwood_xor_dmamask,
693                 .coherent_dma_mask      = DMA_BIT_MASK(64),
694                 .platform_data          = &kirkwood_xor01_data,
695         },
696 };
697
698 static void __init kirkwood_xor0_init(void)
699 {
700         kirkwood_clk_ctrl |= CGC_XOR0;
701         platform_device_register(&kirkwood_xor0_shared);
702
703         /*
704          * two engines can't do memset simultaneously, this limitation
705          * satisfied by removing memset support from one of the engines.
706          */
707         dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
708         dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
709         platform_device_register(&kirkwood_xor00_channel);
710
711         dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
712         dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
713         dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
714         platform_device_register(&kirkwood_xor01_channel);
715 }
716
717
718 /*****************************************************************************
719  * XOR1
720  ****************************************************************************/
721 static struct resource kirkwood_xor1_shared_resources[] = {
722         {
723                 .name   = "xor 1 low",
724                 .start  = XOR1_PHYS_BASE,
725                 .end    = XOR1_PHYS_BASE + 0xff,
726                 .flags  = IORESOURCE_MEM,
727         }, {
728                 .name   = "xor 1 high",
729                 .start  = XOR1_HIGH_PHYS_BASE,
730                 .end    = XOR1_HIGH_PHYS_BASE + 0xff,
731                 .flags  = IORESOURCE_MEM,
732         },
733 };
734
735 static struct platform_device kirkwood_xor1_shared = {
736         .name           = MV_XOR_SHARED_NAME,
737         .id             = 1,
738         .dev            = {
739                 .platform_data = &kirkwood_xor_shared_data,
740         },
741         .num_resources  = ARRAY_SIZE(kirkwood_xor1_shared_resources),
742         .resource       = kirkwood_xor1_shared_resources,
743 };
744
745 static struct resource kirkwood_xor10_resources[] = {
746         [0] = {
747                 .start  = IRQ_KIRKWOOD_XOR_10,
748                 .end    = IRQ_KIRKWOOD_XOR_10,
749                 .flags  = IORESOURCE_IRQ,
750         },
751 };
752
753 static struct mv_xor_platform_data kirkwood_xor10_data = {
754         .shared         = &kirkwood_xor1_shared,
755         .hw_id          = 0,
756         .pool_size      = PAGE_SIZE,
757 };
758
759 static struct platform_device kirkwood_xor10_channel = {
760         .name           = MV_XOR_NAME,
761         .id             = 2,
762         .num_resources  = ARRAY_SIZE(kirkwood_xor10_resources),
763         .resource       = kirkwood_xor10_resources,
764         .dev            = {
765                 .dma_mask               = &kirkwood_xor_dmamask,
766                 .coherent_dma_mask      = DMA_BIT_MASK(64),
767                 .platform_data          = &kirkwood_xor10_data,
768         },
769 };
770
771 static struct resource kirkwood_xor11_resources[] = {
772         [0] = {
773                 .start  = IRQ_KIRKWOOD_XOR_11,
774                 .end    = IRQ_KIRKWOOD_XOR_11,
775                 .flags  = IORESOURCE_IRQ,
776         },
777 };
778
779 static struct mv_xor_platform_data kirkwood_xor11_data = {
780         .shared         = &kirkwood_xor1_shared,
781         .hw_id          = 1,
782         .pool_size      = PAGE_SIZE,
783 };
784
785 static struct platform_device kirkwood_xor11_channel = {
786         .name           = MV_XOR_NAME,
787         .id             = 3,
788         .num_resources  = ARRAY_SIZE(kirkwood_xor11_resources),
789         .resource       = kirkwood_xor11_resources,
790         .dev            = {
791                 .dma_mask               = &kirkwood_xor_dmamask,
792                 .coherent_dma_mask      = DMA_BIT_MASK(64),
793                 .platform_data          = &kirkwood_xor11_data,
794         },
795 };
796
797 static void __init kirkwood_xor1_init(void)
798 {
799         kirkwood_clk_ctrl |= CGC_XOR1;
800         platform_device_register(&kirkwood_xor1_shared);
801
802         /*
803          * two engines can't do memset simultaneously, this limitation
804          * satisfied by removing memset support from one of the engines.
805          */
806         dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
807         dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
808         platform_device_register(&kirkwood_xor10_channel);
809
810         dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
811         dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
812         dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
813         platform_device_register(&kirkwood_xor11_channel);
814 }
815
816
817 /*****************************************************************************
818  * Watchdog
819  ****************************************************************************/
820 static struct orion_wdt_platform_data kirkwood_wdt_data = {
821         .tclk           = 0,
822 };
823
824 static struct platform_device kirkwood_wdt_device = {
825         .name           = "orion_wdt",
826         .id             = -1,
827         .dev            = {
828                 .platform_data  = &kirkwood_wdt_data,
829         },
830         .num_resources  = 0,
831 };
832
833 static void __init kirkwood_wdt_init(void)
834 {
835         kirkwood_wdt_data.tclk = kirkwood_tclk;
836         platform_device_register(&kirkwood_wdt_device);
837 }
838
839
840 /*****************************************************************************
841  * Time handling
842  ****************************************************************************/
843 int kirkwood_tclk;
844
845 int __init kirkwood_find_tclk(void)
846 {
847         u32 dev, rev;
848
849         kirkwood_pcie_id(&dev, &rev);
850         if (dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
851                                         rev == MV88F6281_REV_A1))
852                 return 200000000;
853
854         return 166666667;
855 }
856
857 static void __init kirkwood_timer_init(void)
858 {
859         kirkwood_tclk = kirkwood_find_tclk();
860         orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
861 }
862
863 struct sys_timer kirkwood_timer = {
864         .init = kirkwood_timer_init,
865 };
866
867
868 /*****************************************************************************
869  * General
870  ****************************************************************************/
871 /*
872  * Identify device ID and revision.
873  */
874 static char * __init kirkwood_id(void)
875 {
876         u32 dev, rev;
877
878         kirkwood_pcie_id(&dev, &rev);
879
880         if (dev == MV88F6281_DEV_ID) {
881                 if (rev == MV88F6281_REV_Z0)
882                         return "MV88F6281-Z0";
883                 else if (rev == MV88F6281_REV_A0)
884                         return "MV88F6281-A0";
885                 else if (rev == MV88F6281_REV_A1)
886                         return "MV88F6281-A1";
887                 else
888                         return "MV88F6281-Rev-Unsupported";
889         } else if (dev == MV88F6192_DEV_ID) {
890                 if (rev == MV88F6192_REV_Z0)
891                         return "MV88F6192-Z0";
892                 else if (rev == MV88F6192_REV_A0)
893                         return "MV88F6192-A0";
894                 else
895                         return "MV88F6192-Rev-Unsupported";
896         } else if (dev == MV88F6180_DEV_ID) {
897                 if (rev == MV88F6180_REV_A0)
898                         return "MV88F6180-Rev-A0";
899                 else
900                         return "MV88F6180-Rev-Unsupported";
901         } else {
902                 return "Device-Unknown";
903         }
904 }
905
906 static void __init kirkwood_l2_init(void)
907 {
908 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
909         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
910         feroceon_l2_init(1);
911 #else
912         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
913         feroceon_l2_init(0);
914 #endif
915 }
916
917 void __init kirkwood_init(void)
918 {
919         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
920                 kirkwood_id(), kirkwood_tclk);
921         kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
922         kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
923         kirkwood_spi_plat_data.tclk = kirkwood_tclk;
924         kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
925         kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
926
927         /*
928          * Disable propagation of mbus errors to the CPU local bus,
929          * as this causes mbus errors (which can occur for example
930          * for PCI aborts) to throw CPU aborts, which we're not set
931          * up to deal with.
932          */
933         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
934
935         kirkwood_setup_cpu_mbus();
936
937 #ifdef CONFIG_CACHE_FEROCEON_L2
938         kirkwood_l2_init();
939 #endif
940
941         /* internal devices that every board has */
942         kirkwood_rtc_init();
943         kirkwood_wdt_init();
944         kirkwood_xor0_init();
945         kirkwood_xor1_init();
946         kirkwood_crypto_init();
947 }
948
949 static int __init kirkwood_clock_gate(void)
950 {
951         unsigned int curr = readl(CLOCK_GATING_CTRL);
952
953         printk(KERN_DEBUG "Gating clock of unused units\n");
954         printk(KERN_DEBUG "before: 0x%08x\n", curr);
955
956         /* Make sure those units are accessible */
957         writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
958
959         /* For SATA: first shutdown the phy */
960         if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
961                 /* Disable PLL and IVREF */
962                 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
963                 /* Disable PHY */
964                 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
965         }
966         if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
967                 /* Disable PLL and IVREF */
968                 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
969                 /* Disable PHY */
970                 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
971         }
972         
973         /* For PCIe: first shutdown the phy */
974         if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
975                 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
976                 while (1)
977                         if (readl(PCIE_STATUS) & 0x1)
978                                 break;
979                 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
980         }
981
982         /* Now gate clock the required units */
983         writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
984         printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
985
986         return 0;
987 }
988 late_initcall(kirkwood_clock_gate);