Merge commit 'v2.6.39' into 20110526
[linux-2.6.git] / arch / arm / mach-kirkwood / common.c
1 /*
2  * arch/arm/mach-kirkwood/common.c
3  *
4  * Core functions for Marvell Kirkwood SoCs
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
21 #include <net/dsa.h>
22 #include <asm/page.h>
23 #include <asm/timex.h>
24 #include <asm/kexec.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/time.h>
27 #include <mach/kirkwood.h>
28 #include <mach/bridge-regs.h>
29 #include <plat/audio.h>
30 #include <plat/cache-feroceon-l2.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/mvsdio.h>
33 #include <plat/mv_xor.h>
34 #include <plat/orion_nand.h>
35 #include <plat/orion_wdt.h>
36 #include <plat/time.h>
37 #include "common.h"
38
39 /*****************************************************************************
40  * I/O Address Mapping
41  ****************************************************************************/
42 static struct map_desc kirkwood_io_desc[] __initdata = {
43         {
44                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
45                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
46                 .length         = KIRKWOOD_PCIE_IO_SIZE,
47                 .type           = MT_DEVICE,
48         }, {
49                 .virtual        = KIRKWOOD_PCIE1_IO_VIRT_BASE,
50                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
51                 .length         = KIRKWOOD_PCIE1_IO_SIZE,
52                 .type           = MT_DEVICE,
53         }, {
54                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
55                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
56                 .length         = KIRKWOOD_REGS_SIZE,
57                 .type           = MT_DEVICE,
58         },
59 };
60
61 void __init kirkwood_map_io(void)
62 {
63         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
64 }
65
66 /*
67  * Default clock control bits.  Any bit _not_ set in this variable
68  * will be cleared from the hardware after platform devices have been
69  * registered.  Some reserved bits must be set to 1.
70  */
71 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
72         
73
74 /*****************************************************************************
75  * EHCI
76  ****************************************************************************/
77 static struct orion_ehci_data kirkwood_ehci_data = {
78         .dram           = &kirkwood_mbus_dram_info,
79         .phy_version    = EHCI_PHY_NA,
80 };
81
82 static u64 ehci_dmamask = 0xffffffffUL;
83
84
85 /*****************************************************************************
86  * EHCI0
87  ****************************************************************************/
88 static struct resource kirkwood_ehci_resources[] = {
89         {
90                 .start  = USB_PHYS_BASE,
91                 .end    = USB_PHYS_BASE + 0x0fff,
92                 .flags  = IORESOURCE_MEM,
93         }, {
94                 .start  = IRQ_KIRKWOOD_USB,
95                 .end    = IRQ_KIRKWOOD_USB,
96                 .flags  = IORESOURCE_IRQ,
97         },
98 };
99
100 static struct platform_device kirkwood_ehci = {
101         .name           = "orion-ehci",
102         .id             = 0,
103         .dev            = {
104                 .dma_mask               = &ehci_dmamask,
105                 .coherent_dma_mask      = 0xffffffff,
106                 .platform_data          = &kirkwood_ehci_data,
107         },
108         .resource       = kirkwood_ehci_resources,
109         .num_resources  = ARRAY_SIZE(kirkwood_ehci_resources),
110 };
111
112 void __init kirkwood_ehci_init(void)
113 {
114         kirkwood_clk_ctrl |= CGC_USB0;
115         platform_device_register(&kirkwood_ehci);
116 }
117
118
119 /*****************************************************************************
120  * GE00
121  ****************************************************************************/
122 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
123         .dram           = &kirkwood_mbus_dram_info,
124 };
125
126 static struct resource kirkwood_ge00_shared_resources[] = {
127         {
128                 .name   = "ge00 base",
129                 .start  = GE00_PHYS_BASE + 0x2000,
130                 .end    = GE00_PHYS_BASE + 0x3fff,
131                 .flags  = IORESOURCE_MEM,
132         }, {
133                 .name   = "ge00 err irq",
134                 .start  = IRQ_KIRKWOOD_GE00_ERR,
135                 .end    = IRQ_KIRKWOOD_GE00_ERR,
136                 .flags  = IORESOURCE_IRQ,
137         },
138 };
139
140 static struct platform_device kirkwood_ge00_shared = {
141         .name           = MV643XX_ETH_SHARED_NAME,
142         .id             = 0,
143         .dev            = {
144                 .platform_data  = &kirkwood_ge00_shared_data,
145         },
146         .num_resources  = ARRAY_SIZE(kirkwood_ge00_shared_resources),
147         .resource       = kirkwood_ge00_shared_resources,
148 };
149
150 static struct resource kirkwood_ge00_resources[] = {
151         {
152                 .name   = "ge00 irq",
153                 .start  = IRQ_KIRKWOOD_GE00_SUM,
154                 .end    = IRQ_KIRKWOOD_GE00_SUM,
155                 .flags  = IORESOURCE_IRQ,
156         },
157 };
158
159 static struct platform_device kirkwood_ge00 = {
160         .name           = MV643XX_ETH_NAME,
161         .id             = 0,
162         .num_resources  = 1,
163         .resource       = kirkwood_ge00_resources,
164         .dev            = {
165                 .coherent_dma_mask      = 0xffffffff,
166         },
167 };
168
169 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
170 {
171         kirkwood_clk_ctrl |= CGC_GE0;
172         eth_data->shared = &kirkwood_ge00_shared;
173         kirkwood_ge00.dev.platform_data = eth_data;
174
175         platform_device_register(&kirkwood_ge00_shared);
176         platform_device_register(&kirkwood_ge00);
177 }
178
179
180 /*****************************************************************************
181  * GE01
182  ****************************************************************************/
183 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
184         .dram           = &kirkwood_mbus_dram_info,
185         .shared_smi     = &kirkwood_ge00_shared,
186 };
187
188 static struct resource kirkwood_ge01_shared_resources[] = {
189         {
190                 .name   = "ge01 base",
191                 .start  = GE01_PHYS_BASE + 0x2000,
192                 .end    = GE01_PHYS_BASE + 0x3fff,
193                 .flags  = IORESOURCE_MEM,
194         }, {
195                 .name   = "ge01 err irq",
196                 .start  = IRQ_KIRKWOOD_GE01_ERR,
197                 .end    = IRQ_KIRKWOOD_GE01_ERR,
198                 .flags  = IORESOURCE_IRQ,
199         },
200 };
201
202 static struct platform_device kirkwood_ge01_shared = {
203         .name           = MV643XX_ETH_SHARED_NAME,
204         .id             = 1,
205         .dev            = {
206                 .platform_data  = &kirkwood_ge01_shared_data,
207         },
208         .num_resources  = ARRAY_SIZE(kirkwood_ge01_shared_resources),
209         .resource       = kirkwood_ge01_shared_resources,
210 };
211
212 static struct resource kirkwood_ge01_resources[] = {
213         {
214                 .name   = "ge01 irq",
215                 .start  = IRQ_KIRKWOOD_GE01_SUM,
216                 .end    = IRQ_KIRKWOOD_GE01_SUM,
217                 .flags  = IORESOURCE_IRQ,
218         },
219 };
220
221 static struct platform_device kirkwood_ge01 = {
222         .name           = MV643XX_ETH_NAME,
223         .id             = 1,
224         .num_resources  = 1,
225         .resource       = kirkwood_ge01_resources,
226         .dev            = {
227                 .coherent_dma_mask      = 0xffffffff,
228         },
229 };
230
231 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
232 {
233         kirkwood_clk_ctrl |= CGC_GE1;
234         eth_data->shared = &kirkwood_ge01_shared;
235         kirkwood_ge01.dev.platform_data = eth_data;
236
237         platform_device_register(&kirkwood_ge01_shared);
238         platform_device_register(&kirkwood_ge01);
239 }
240
241
242 /*****************************************************************************
243  * Ethernet switch
244  ****************************************************************************/
245 static struct resource kirkwood_switch_resources[] = {
246         {
247                 .start  = 0,
248                 .end    = 0,
249                 .flags  = IORESOURCE_IRQ,
250         },
251 };
252
253 static struct platform_device kirkwood_switch_device = {
254         .name           = "dsa",
255         .id             = 0,
256         .num_resources  = 0,
257         .resource       = kirkwood_switch_resources,
258 };
259
260 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
261 {
262         int i;
263
264         if (irq != NO_IRQ) {
265                 kirkwood_switch_resources[0].start = irq;
266                 kirkwood_switch_resources[0].end = irq;
267                 kirkwood_switch_device.num_resources = 1;
268         }
269
270         d->netdev = &kirkwood_ge00.dev;
271         for (i = 0; i < d->nr_chips; i++)
272                 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
273         kirkwood_switch_device.dev.platform_data = d;
274
275         platform_device_register(&kirkwood_switch_device);
276 }
277
278
279 /*****************************************************************************
280  * NAND flash
281  ****************************************************************************/
282 static struct resource kirkwood_nand_resource = {
283         .flags          = IORESOURCE_MEM,
284         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
285         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
286                                 KIRKWOOD_NAND_MEM_SIZE - 1,
287 };
288
289 static struct orion_nand_data kirkwood_nand_data = {
290         .cle            = 0,
291         .ale            = 1,
292         .width          = 8,
293 };
294
295 static struct platform_device kirkwood_nand_flash = {
296         .name           = "orion_nand",
297         .id             = -1,
298         .dev            = {
299                 .platform_data  = &kirkwood_nand_data,
300         },
301         .resource       = &kirkwood_nand_resource,
302         .num_resources  = 1,
303 };
304
305 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
306                                int chip_delay)
307 {
308         kirkwood_clk_ctrl |= CGC_RUNIT;
309         kirkwood_nand_data.parts = parts;
310         kirkwood_nand_data.nr_parts = nr_parts;
311         kirkwood_nand_data.chip_delay = chip_delay;
312         platform_device_register(&kirkwood_nand_flash);
313 }
314
315 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
316                                    int (*dev_ready)(struct mtd_info *))
317 {
318         kirkwood_clk_ctrl |= CGC_RUNIT;
319         kirkwood_nand_data.parts = parts;
320         kirkwood_nand_data.nr_parts = nr_parts;
321         kirkwood_nand_data.dev_ready = dev_ready;
322         platform_device_register(&kirkwood_nand_flash);
323 }
324
325 /*****************************************************************************
326  * SoC RTC
327  ****************************************************************************/
328 static struct resource kirkwood_rtc_resource = {
329         .start  = RTC_PHYS_BASE,
330         .end    = RTC_PHYS_BASE + SZ_16 - 1,
331         .flags  = IORESOURCE_MEM,
332 };
333
334 static void __init kirkwood_rtc_init(void)
335 {
336         platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
337 }
338
339
340 /*****************************************************************************
341  * SATA
342  ****************************************************************************/
343 static struct resource kirkwood_sata_resources[] = {
344         {
345                 .name   = "sata base",
346                 .start  = SATA_PHYS_BASE,
347                 .end    = SATA_PHYS_BASE + 0x5000 - 1,
348                 .flags  = IORESOURCE_MEM,
349         }, {
350                 .name   = "sata irq",
351                 .start  = IRQ_KIRKWOOD_SATA,
352                 .end    = IRQ_KIRKWOOD_SATA,
353                 .flags  = IORESOURCE_IRQ,
354         },
355 };
356
357 static struct platform_device kirkwood_sata = {
358         .name           = "sata_mv",
359         .id             = 0,
360         .dev            = {
361                 .coherent_dma_mask      = 0xffffffff,
362         },
363         .num_resources  = ARRAY_SIZE(kirkwood_sata_resources),
364         .resource       = kirkwood_sata_resources,
365 };
366
367 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
368 {
369         kirkwood_clk_ctrl |= CGC_SATA0;
370         if (sata_data->n_ports > 1)
371                 kirkwood_clk_ctrl |= CGC_SATA1;
372         sata_data->dram = &kirkwood_mbus_dram_info;
373         kirkwood_sata.dev.platform_data = sata_data;
374         platform_device_register(&kirkwood_sata);
375 }
376
377
378 /*****************************************************************************
379  * SD/SDIO/MMC
380  ****************************************************************************/
381 static struct resource mvsdio_resources[] = {
382         [0] = {
383                 .start  = SDIO_PHYS_BASE,
384                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
385                 .flags  = IORESOURCE_MEM,
386         },
387         [1] = {
388                 .start  = IRQ_KIRKWOOD_SDIO,
389                 .end    = IRQ_KIRKWOOD_SDIO,
390                 .flags  = IORESOURCE_IRQ,
391         },
392 };
393
394 static u64 mvsdio_dmamask = 0xffffffffUL;
395
396 static struct platform_device kirkwood_sdio = {
397         .name           = "mvsdio",
398         .id             = -1,
399         .dev            = {
400                 .dma_mask = &mvsdio_dmamask,
401                 .coherent_dma_mask = 0xffffffff,
402         },
403         .num_resources  = ARRAY_SIZE(mvsdio_resources),
404         .resource       = mvsdio_resources,
405 };
406
407 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
408 {
409         u32 dev, rev;
410
411         kirkwood_pcie_id(&dev, &rev);
412         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
413                 mvsdio_data->clock = 100000000;
414         else
415                 mvsdio_data->clock = 200000000;
416         mvsdio_data->dram = &kirkwood_mbus_dram_info;
417         kirkwood_clk_ctrl |= CGC_SDIO;
418         kirkwood_sdio.dev.platform_data = mvsdio_data;
419         platform_device_register(&kirkwood_sdio);
420 }
421
422
423 /*****************************************************************************
424  * SPI
425  ****************************************************************************/
426 static struct orion_spi_info kirkwood_spi_plat_data = {
427 };
428
429 static struct resource kirkwood_spi_resources[] = {
430         {
431                 .start  = SPI_PHYS_BASE,
432                 .end    = SPI_PHYS_BASE + SZ_512 - 1,
433                 .flags  = IORESOURCE_MEM,
434         },
435 };
436
437 static struct platform_device kirkwood_spi = {
438         .name           = "orion_spi",
439         .id             = 0,
440         .resource       = kirkwood_spi_resources,
441         .dev            = {
442                 .platform_data  = &kirkwood_spi_plat_data,
443         },
444         .num_resources  = ARRAY_SIZE(kirkwood_spi_resources),
445 };
446
447 void __init kirkwood_spi_init()
448 {
449         kirkwood_clk_ctrl |= CGC_RUNIT;
450         platform_device_register(&kirkwood_spi);
451 }
452
453
454 /*****************************************************************************
455  * I2C
456  ****************************************************************************/
457 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
458         .freq_m         = 8, /* assumes 166 MHz TCLK */
459         .freq_n         = 3,
460         .timeout        = 1000, /* Default timeout of 1 second */
461 };
462
463 static struct resource kirkwood_i2c_resources[] = {
464         {
465                 .start  = I2C_PHYS_BASE,
466                 .end    = I2C_PHYS_BASE + 0x1f,
467                 .flags  = IORESOURCE_MEM,
468         }, {
469                 .start  = IRQ_KIRKWOOD_TWSI,
470                 .end    = IRQ_KIRKWOOD_TWSI,
471                 .flags  = IORESOURCE_IRQ,
472         },
473 };
474
475 static struct platform_device kirkwood_i2c = {
476         .name           = MV64XXX_I2C_CTLR_NAME,
477         .id             = 0,
478         .num_resources  = ARRAY_SIZE(kirkwood_i2c_resources),
479         .resource       = kirkwood_i2c_resources,
480         .dev            = {
481                 .platform_data  = &kirkwood_i2c_pdata,
482         },
483 };
484
485 void __init kirkwood_i2c_init(void)
486 {
487         platform_device_register(&kirkwood_i2c);
488 }
489
490
491 /*****************************************************************************
492  * UART0
493  ****************************************************************************/
494 static struct plat_serial8250_port kirkwood_uart0_data[] = {
495         {
496                 .mapbase        = UART0_PHYS_BASE,
497                 .membase        = (char *)UART0_VIRT_BASE,
498                 .irq            = IRQ_KIRKWOOD_UART_0,
499                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
500                 .iotype         = UPIO_MEM,
501                 .regshift       = 2,
502                 .uartclk        = 0,
503         }, {
504         },
505 };
506
507 static struct resource kirkwood_uart0_resources[] = {
508         {
509                 .start          = UART0_PHYS_BASE,
510                 .end            = UART0_PHYS_BASE + 0xff,
511                 .flags          = IORESOURCE_MEM,
512         }, {
513                 .start          = IRQ_KIRKWOOD_UART_0,
514                 .end            = IRQ_KIRKWOOD_UART_0,
515                 .flags          = IORESOURCE_IRQ,
516         },
517 };
518
519 static struct platform_device kirkwood_uart0 = {
520         .name                   = "serial8250",
521         .id                     = 0,
522         .dev                    = {
523                 .platform_data  = kirkwood_uart0_data,
524         },
525         .resource               = kirkwood_uart0_resources,
526         .num_resources          = ARRAY_SIZE(kirkwood_uart0_resources),
527 };
528
529 void __init kirkwood_uart0_init(void)
530 {
531         platform_device_register(&kirkwood_uart0);
532 }
533
534
535 /*****************************************************************************
536  * UART1
537  ****************************************************************************/
538 static struct plat_serial8250_port kirkwood_uart1_data[] = {
539         {
540                 .mapbase        = UART1_PHYS_BASE,
541                 .membase        = (char *)UART1_VIRT_BASE,
542                 .irq            = IRQ_KIRKWOOD_UART_1,
543                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
544                 .iotype         = UPIO_MEM,
545                 .regshift       = 2,
546                 .uartclk        = 0,
547         }, {
548         },
549 };
550
551 static struct resource kirkwood_uart1_resources[] = {
552         {
553                 .start          = UART1_PHYS_BASE,
554                 .end            = UART1_PHYS_BASE + 0xff,
555                 .flags          = IORESOURCE_MEM,
556         }, {
557                 .start          = IRQ_KIRKWOOD_UART_1,
558                 .end            = IRQ_KIRKWOOD_UART_1,
559                 .flags          = IORESOURCE_IRQ,
560         },
561 };
562
563 static struct platform_device kirkwood_uart1 = {
564         .name                   = "serial8250",
565         .id                     = 1,
566         .dev                    = {
567                 .platform_data  = kirkwood_uart1_data,
568         },
569         .resource               = kirkwood_uart1_resources,
570         .num_resources          = ARRAY_SIZE(kirkwood_uart1_resources),
571 };
572
573 void __init kirkwood_uart1_init(void)
574 {
575         platform_device_register(&kirkwood_uart1);
576 }
577
578
579 /*****************************************************************************
580  * Cryptographic Engines and Security Accelerator (CESA)
581  ****************************************************************************/
582
583 static struct resource kirkwood_crypto_res[] = {
584         {
585                 .name   = "regs",
586                 .start  = CRYPTO_PHYS_BASE,
587                 .end    = CRYPTO_PHYS_BASE + 0xffff,
588                 .flags  = IORESOURCE_MEM,
589         }, {
590                 .name   = "sram",
591                 .start  = KIRKWOOD_SRAM_PHYS_BASE,
592                 .end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
593                 .flags  = IORESOURCE_MEM,
594         }, {
595                 .name   = "crypto interrupt",
596                 .start  = IRQ_KIRKWOOD_CRYPTO,
597                 .end    = IRQ_KIRKWOOD_CRYPTO,
598                 .flags  = IORESOURCE_IRQ,
599         },
600 };
601
602 static struct platform_device kirkwood_crypto_device = {
603         .name           = "mv_crypto",
604         .id             = -1,
605         .num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
606         .resource       = kirkwood_crypto_res,
607 };
608
609 void __init kirkwood_crypto_init(void)
610 {
611         kirkwood_clk_ctrl |= CGC_CRYPTO;
612         platform_device_register(&kirkwood_crypto_device);
613 }
614
615
616 /*****************************************************************************
617  * XOR
618  ****************************************************************************/
619 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
620         .dram           = &kirkwood_mbus_dram_info,
621 };
622
623 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
624
625
626 /*****************************************************************************
627  * XOR0
628  ****************************************************************************/
629 static struct resource kirkwood_xor0_shared_resources[] = {
630         {
631                 .name   = "xor 0 low",
632                 .start  = XOR0_PHYS_BASE,
633                 .end    = XOR0_PHYS_BASE + 0xff,
634                 .flags  = IORESOURCE_MEM,
635         }, {
636                 .name   = "xor 0 high",
637                 .start  = XOR0_HIGH_PHYS_BASE,
638                 .end    = XOR0_HIGH_PHYS_BASE + 0xff,
639                 .flags  = IORESOURCE_MEM,
640         },
641 };
642
643 static struct platform_device kirkwood_xor0_shared = {
644         .name           = MV_XOR_SHARED_NAME,
645         .id             = 0,
646         .dev            = {
647                 .platform_data = &kirkwood_xor_shared_data,
648         },
649         .num_resources  = ARRAY_SIZE(kirkwood_xor0_shared_resources),
650         .resource       = kirkwood_xor0_shared_resources,
651 };
652
653 static struct resource kirkwood_xor00_resources[] = {
654         [0] = {
655                 .start  = IRQ_KIRKWOOD_XOR_00,
656                 .end    = IRQ_KIRKWOOD_XOR_00,
657                 .flags  = IORESOURCE_IRQ,
658         },
659 };
660
661 static struct mv_xor_platform_data kirkwood_xor00_data = {
662         .shared         = &kirkwood_xor0_shared,
663         .hw_id          = 0,
664         .pool_size      = PAGE_SIZE,
665 };
666
667 static struct platform_device kirkwood_xor00_channel = {
668         .name           = MV_XOR_NAME,
669         .id             = 0,
670         .num_resources  = ARRAY_SIZE(kirkwood_xor00_resources),
671         .resource       = kirkwood_xor00_resources,
672         .dev            = {
673                 .dma_mask               = &kirkwood_xor_dmamask,
674                 .coherent_dma_mask      = DMA_BIT_MASK(64),
675                 .platform_data          = &kirkwood_xor00_data,
676         },
677 };
678
679 static struct resource kirkwood_xor01_resources[] = {
680         [0] = {
681                 .start  = IRQ_KIRKWOOD_XOR_01,
682                 .end    = IRQ_KIRKWOOD_XOR_01,
683                 .flags  = IORESOURCE_IRQ,
684         },
685 };
686
687 static struct mv_xor_platform_data kirkwood_xor01_data = {
688         .shared         = &kirkwood_xor0_shared,
689         .hw_id          = 1,
690         .pool_size      = PAGE_SIZE,
691 };
692
693 static struct platform_device kirkwood_xor01_channel = {
694         .name           = MV_XOR_NAME,
695         .id             = 1,
696         .num_resources  = ARRAY_SIZE(kirkwood_xor01_resources),
697         .resource       = kirkwood_xor01_resources,
698         .dev            = {
699                 .dma_mask               = &kirkwood_xor_dmamask,
700                 .coherent_dma_mask      = DMA_BIT_MASK(64),
701                 .platform_data          = &kirkwood_xor01_data,
702         },
703 };
704
705 static void __init kirkwood_xor0_init(void)
706 {
707         kirkwood_clk_ctrl |= CGC_XOR0;
708         platform_device_register(&kirkwood_xor0_shared);
709
710         /*
711          * two engines can't do memset simultaneously, this limitation
712          * satisfied by removing memset support from one of the engines.
713          */
714         dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
715         dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
716         platform_device_register(&kirkwood_xor00_channel);
717
718         dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
719         dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
720         dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
721         platform_device_register(&kirkwood_xor01_channel);
722 }
723
724
725 /*****************************************************************************
726  * XOR1
727  ****************************************************************************/
728 static struct resource kirkwood_xor1_shared_resources[] = {
729         {
730                 .name   = "xor 1 low",
731                 .start  = XOR1_PHYS_BASE,
732                 .end    = XOR1_PHYS_BASE + 0xff,
733                 .flags  = IORESOURCE_MEM,
734         }, {
735                 .name   = "xor 1 high",
736                 .start  = XOR1_HIGH_PHYS_BASE,
737                 .end    = XOR1_HIGH_PHYS_BASE + 0xff,
738                 .flags  = IORESOURCE_MEM,
739         },
740 };
741
742 static struct platform_device kirkwood_xor1_shared = {
743         .name           = MV_XOR_SHARED_NAME,
744         .id             = 1,
745         .dev            = {
746                 .platform_data = &kirkwood_xor_shared_data,
747         },
748         .num_resources  = ARRAY_SIZE(kirkwood_xor1_shared_resources),
749         .resource       = kirkwood_xor1_shared_resources,
750 };
751
752 static struct resource kirkwood_xor10_resources[] = {
753         [0] = {
754                 .start  = IRQ_KIRKWOOD_XOR_10,
755                 .end    = IRQ_KIRKWOOD_XOR_10,
756                 .flags  = IORESOURCE_IRQ,
757         },
758 };
759
760 static struct mv_xor_platform_data kirkwood_xor10_data = {
761         .shared         = &kirkwood_xor1_shared,
762         .hw_id          = 0,
763         .pool_size      = PAGE_SIZE,
764 };
765
766 static struct platform_device kirkwood_xor10_channel = {
767         .name           = MV_XOR_NAME,
768         .id             = 2,
769         .num_resources  = ARRAY_SIZE(kirkwood_xor10_resources),
770         .resource       = kirkwood_xor10_resources,
771         .dev            = {
772                 .dma_mask               = &kirkwood_xor_dmamask,
773                 .coherent_dma_mask      = DMA_BIT_MASK(64),
774                 .platform_data          = &kirkwood_xor10_data,
775         },
776 };
777
778 static struct resource kirkwood_xor11_resources[] = {
779         [0] = {
780                 .start  = IRQ_KIRKWOOD_XOR_11,
781                 .end    = IRQ_KIRKWOOD_XOR_11,
782                 .flags  = IORESOURCE_IRQ,
783         },
784 };
785
786 static struct mv_xor_platform_data kirkwood_xor11_data = {
787         .shared         = &kirkwood_xor1_shared,
788         .hw_id          = 1,
789         .pool_size      = PAGE_SIZE,
790 };
791
792 static struct platform_device kirkwood_xor11_channel = {
793         .name           = MV_XOR_NAME,
794         .id             = 3,
795         .num_resources  = ARRAY_SIZE(kirkwood_xor11_resources),
796         .resource       = kirkwood_xor11_resources,
797         .dev            = {
798                 .dma_mask               = &kirkwood_xor_dmamask,
799                 .coherent_dma_mask      = DMA_BIT_MASK(64),
800                 .platform_data          = &kirkwood_xor11_data,
801         },
802 };
803
804 static void __init kirkwood_xor1_init(void)
805 {
806         kirkwood_clk_ctrl |= CGC_XOR1;
807         platform_device_register(&kirkwood_xor1_shared);
808
809         /*
810          * two engines can't do memset simultaneously, this limitation
811          * satisfied by removing memset support from one of the engines.
812          */
813         dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
814         dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
815         platform_device_register(&kirkwood_xor10_channel);
816
817         dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
818         dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
819         dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
820         platform_device_register(&kirkwood_xor11_channel);
821 }
822
823
824 /*****************************************************************************
825  * Watchdog
826  ****************************************************************************/
827 static struct orion_wdt_platform_data kirkwood_wdt_data = {
828         .tclk           = 0,
829 };
830
831 static struct platform_device kirkwood_wdt_device = {
832         .name           = "orion_wdt",
833         .id             = -1,
834         .dev            = {
835                 .platform_data  = &kirkwood_wdt_data,
836         },
837         .num_resources  = 0,
838 };
839
840 static void __init kirkwood_wdt_init(void)
841 {
842         kirkwood_wdt_data.tclk = kirkwood_tclk;
843         platform_device_register(&kirkwood_wdt_device);
844 }
845
846
847 /*****************************************************************************
848  * Time handling
849  ****************************************************************************/
850 void __init kirkwood_init_early(void)
851 {
852         orion_time_set_base(TIMER_VIRT_BASE);
853 }
854
855 int kirkwood_tclk;
856
857 static int __init kirkwood_find_tclk(void)
858 {
859         u32 dev, rev;
860
861         kirkwood_pcie_id(&dev, &rev);
862
863         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
864                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
865                         return 200000000;
866
867         return 166666667;
868 }
869
870 static void __init kirkwood_timer_init(void)
871 {
872         kirkwood_tclk = kirkwood_find_tclk();
873
874         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
875                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
876 }
877
878 struct sys_timer kirkwood_timer = {
879         .init = kirkwood_timer_init,
880 };
881
882 /*****************************************************************************
883  * Audio
884  ****************************************************************************/
885 static struct resource kirkwood_i2s_resources[] = {
886         [0] = {
887                 .start  = AUDIO_PHYS_BASE,
888                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
889                 .flags  = IORESOURCE_MEM,
890         },
891         [1] = {
892                 .start  = IRQ_KIRKWOOD_I2S,
893                 .end    = IRQ_KIRKWOOD_I2S,
894                 .flags  = IORESOURCE_IRQ,
895         },
896 };
897
898 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
899         .dram        = &kirkwood_mbus_dram_info,
900         .burst       = 128,
901 };
902
903 static struct platform_device kirkwood_i2s_device = {
904         .name           = "kirkwood-i2s",
905         .id             = -1,
906         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
907         .resource       = kirkwood_i2s_resources,
908         .dev            = {
909                 .platform_data  = &kirkwood_i2s_data,
910         },
911 };
912
913 static struct platform_device kirkwood_pcm_device = {
914         .name           = "kirkwood-pcm-audio",
915         .id             = -1,
916 };
917
918 void __init kirkwood_audio_init(void)
919 {
920         kirkwood_clk_ctrl |= CGC_AUDIO;
921         platform_device_register(&kirkwood_i2s_device);
922         platform_device_register(&kirkwood_pcm_device);
923 }
924
925 /*****************************************************************************
926  * General
927  ****************************************************************************/
928 /*
929  * Identify device ID and revision.
930  */
931 static char * __init kirkwood_id(void)
932 {
933         u32 dev, rev;
934
935         kirkwood_pcie_id(&dev, &rev);
936
937         if (dev == MV88F6281_DEV_ID) {
938                 if (rev == MV88F6281_REV_Z0)
939                         return "MV88F6281-Z0";
940                 else if (rev == MV88F6281_REV_A0)
941                         return "MV88F6281-A0";
942                 else if (rev == MV88F6281_REV_A1)
943                         return "MV88F6281-A1";
944                 else
945                         return "MV88F6281-Rev-Unsupported";
946         } else if (dev == MV88F6192_DEV_ID) {
947                 if (rev == MV88F6192_REV_Z0)
948                         return "MV88F6192-Z0";
949                 else if (rev == MV88F6192_REV_A0)
950                         return "MV88F6192-A0";
951                 else if (rev == MV88F6192_REV_A1)
952                         return "MV88F6192-A1";
953                 else
954                         return "MV88F6192-Rev-Unsupported";
955         } else if (dev == MV88F6180_DEV_ID) {
956                 if (rev == MV88F6180_REV_A0)
957                         return "MV88F6180-Rev-A0";
958                 else if (rev == MV88F6180_REV_A1)
959                         return "MV88F6180-Rev-A1";
960                 else
961                         return "MV88F6180-Rev-Unsupported";
962         } else if (dev == MV88F6282_DEV_ID) {
963                 if (rev == MV88F6282_REV_A0)
964                         return "MV88F6282-Rev-A0";
965                 else
966                         return "MV88F6282-Rev-Unsupported";
967         } else {
968                 return "Device-Unknown";
969         }
970 }
971
972 static void __init kirkwood_l2_init(void)
973 {
974 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
975         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
976         feroceon_l2_init(1);
977 #else
978         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
979         feroceon_l2_init(0);
980 #endif
981 }
982
983 void __init kirkwood_init(void)
984 {
985         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
986                 kirkwood_id(), kirkwood_tclk);
987         kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
988         kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
989         kirkwood_spi_plat_data.tclk = kirkwood_tclk;
990         kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
991         kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
992         kirkwood_i2s_data.tclk = kirkwood_tclk;
993
994         /*
995          * Disable propagation of mbus errors to the CPU local bus,
996          * as this causes mbus errors (which can occur for example
997          * for PCI aborts) to throw CPU aborts, which we're not set
998          * up to deal with.
999          */
1000         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
1001
1002         kirkwood_setup_cpu_mbus();
1003
1004 #ifdef CONFIG_CACHE_FEROCEON_L2
1005         kirkwood_l2_init();
1006 #endif
1007
1008         /* internal devices that every board has */
1009         kirkwood_rtc_init();
1010         kirkwood_wdt_init();
1011         kirkwood_xor0_init();
1012         kirkwood_xor1_init();
1013         kirkwood_crypto_init();
1014
1015 #ifdef CONFIG_KEXEC 
1016         kexec_reinit = kirkwood_enable_pcie;
1017 #endif
1018 }
1019
1020 static int __init kirkwood_clock_gate(void)
1021 {
1022         unsigned int curr = readl(CLOCK_GATING_CTRL);
1023         u32 dev, rev;
1024
1025         kirkwood_pcie_id(&dev, &rev);
1026         printk(KERN_DEBUG "Gating clock of unused units\n");
1027         printk(KERN_DEBUG "before: 0x%08x\n", curr);
1028
1029         /* Make sure those units are accessible */
1030         writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
1031
1032         /* For SATA: first shutdown the phy */
1033         if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
1034                 /* Disable PLL and IVREF */
1035                 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
1036                 /* Disable PHY */
1037                 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
1038         }
1039         if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
1040                 /* Disable PLL and IVREF */
1041                 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
1042                 /* Disable PHY */
1043                 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
1044         }
1045         
1046         /* For PCIe: first shutdown the phy */
1047         if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
1048                 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
1049                 while (1)
1050                         if (readl(PCIE_STATUS) & 0x1)
1051                                 break;
1052                 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
1053         }
1054
1055         /* For PCIe 1: first shutdown the phy */
1056         if (dev == MV88F6282_DEV_ID) {
1057                 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
1058                         writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
1059                         while (1)
1060                                 if (readl(PCIE1_STATUS) & 0x1)
1061                                         break;
1062                         writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
1063                 }
1064         } else  /* keep this bit set for devices that don't have PCIe1 */
1065                 kirkwood_clk_ctrl |= CGC_PEX1;
1066
1067         /* Now gate clock the required units */
1068         writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
1069         printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
1070
1071         return 0;
1072 }
1073 late_initcall(kirkwood_clock_gate);