Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6.git] / arch / arm / mach-ixp4xx / ixdp425-setup.c
1 /*
2  * arch/arm/mach-ixp4xx/ixdp425-setup.c
3  *
4  * IXDP425/IXCDP1100 board-setup
5  *
6  * Copyright (C) 2003-2005 MontaVista Software, Inc.
7  *
8  * Author: Deepak Saxena <dsaxena@plexity.net>
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/serial.h>
15 #include <linux/tty.h>
16 #include <linux/serial_8250.h>
17 #include <linux/slab.h>
18 #include <linux/i2c-gpio.h>
19 #include <linux/io.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/nand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/delay.h>
24 #include <asm/types.h>
25 #include <asm/setup.h>
26 #include <asm/memory.h>
27 #include <mach/hardware.h>
28 #include <asm/mach-types.h>
29 #include <asm/irq.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/flash.h>
32
33 #define IXDP425_SDA_PIN         7
34 #define IXDP425_SCL_PIN         6
35
36 /* NAND Flash pins */
37 #define IXDP425_NAND_NCE_PIN    12
38
39 #define IXDP425_NAND_CMD_BYTE   0x01
40 #define IXDP425_NAND_ADDR_BYTE  0x02
41
42 static struct flash_platform_data ixdp425_flash_data = {
43         .map_name       = "cfi_probe",
44         .width          = 2,
45 };
46
47 static struct resource ixdp425_flash_resource = {
48         .flags          = IORESOURCE_MEM,
49 };
50
51 static struct platform_device ixdp425_flash = {
52         .name           = "IXP4XX-Flash",
53         .id             = 0,
54         .dev            = {
55                 .platform_data = &ixdp425_flash_data,
56         },
57         .num_resources  = 1,
58         .resource       = &ixdp425_flash_resource,
59 };
60
61 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
62     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
63
64 #ifdef CONFIG_MTD_PARTITIONS
65 const char *part_probes[] = { "cmdlinepart", NULL };
66
67 static struct mtd_partition ixdp425_partitions[] = {
68         {
69                 .name   = "ixp400 NAND FS 0",
70                 .offset = 0,
71                 .size   = SZ_8M
72         }, {
73                 .name   = "ixp400 NAND FS 1",
74                 .offset = MTDPART_OFS_APPEND,
75                 .size   = MTDPART_SIZ_FULL
76         },
77 };
78 #endif
79
80 static void
81 ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
82 {
83         struct nand_chip *this = mtd->priv;
84         int offset = (int)this->priv;
85
86         if (ctrl & NAND_CTRL_CHANGE) {
87                 if (ctrl & NAND_NCE) {
88                         gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
89                         udelay(5);
90                 } else
91                         gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);
92
93                 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
94                 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
95                 this->priv = (void *)offset;
96         }
97
98         if (cmd != NAND_CMD_NONE)
99                 writeb(cmd, this->IO_ADDR_W + offset);
100 }
101
102 static struct platform_nand_data ixdp425_flash_nand_data = {
103         .chip = {
104                 .chip_delay             = 30,
105                 .options                = NAND_NO_AUTOINCR,
106 #ifdef CONFIG_MTD_PARTITIONS
107                 .part_probe_types       = part_probes,
108                 .partitions             = ixdp425_partitions,
109                 .nr_partitions          = ARRAY_SIZE(ixdp425_partitions),
110 #endif
111         },
112         .ctrl = {
113                 .cmd_ctrl               = ixdp425_flash_nand_cmd_ctrl
114         }
115 };
116
117 static struct resource ixdp425_flash_nand_resource = {
118         .flags          = IORESOURCE_MEM,
119 };
120
121 static struct platform_device ixdp425_flash_nand = {
122         .name           = "gen_nand",
123         .id             = -1,
124         .dev            = {
125                 .platform_data = &ixdp425_flash_nand_data,
126         },
127         .num_resources  = 1,
128         .resource       = &ixdp425_flash_nand_resource,
129 };
130 #endif  /* CONFIG_MTD_NAND_PLATFORM */
131
132 static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
133         .sda_pin        = IXDP425_SDA_PIN,
134         .scl_pin        = IXDP425_SCL_PIN,
135 };
136
137 static struct platform_device ixdp425_i2c_gpio = {
138         .name           = "i2c-gpio",
139         .id             = 0,
140         .dev     = {
141                 .platform_data  = &ixdp425_i2c_gpio_data,
142         },
143 };
144
145 static struct resource ixdp425_uart_resources[] = {
146         {
147                 .start          = IXP4XX_UART1_BASE_PHYS,
148                 .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
149                 .flags          = IORESOURCE_MEM
150         },
151         {
152                 .start          = IXP4XX_UART2_BASE_PHYS,
153                 .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
154                 .flags          = IORESOURCE_MEM
155         }
156 };
157
158 static struct plat_serial8250_port ixdp425_uart_data[] = {
159         {
160                 .mapbase        = IXP4XX_UART1_BASE_PHYS,
161                 .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
162                 .irq            = IRQ_IXP4XX_UART1,
163                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
164                 .iotype         = UPIO_MEM,
165                 .regshift       = 2,
166                 .uartclk        = IXP4XX_UART_XTAL,
167         },
168         {
169                 .mapbase        = IXP4XX_UART2_BASE_PHYS,
170                 .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
171                 .irq            = IRQ_IXP4XX_UART2,
172                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
173                 .iotype         = UPIO_MEM,
174                 .regshift       = 2,
175                 .uartclk        = IXP4XX_UART_XTAL,
176         },
177         { },
178 };
179
180 static struct platform_device ixdp425_uart = {
181         .name                   = "serial8250",
182         .id                     = PLAT8250_DEV_PLATFORM,
183         .dev.platform_data      = ixdp425_uart_data,
184         .num_resources          = 2,
185         .resource               = ixdp425_uart_resources
186 };
187
188 /* Built-in 10/100 Ethernet MAC interfaces */
189 static struct eth_plat_info ixdp425_plat_eth[] = {
190         {
191                 .phy            = 0,
192                 .rxq            = 3,
193                 .txreadyq       = 20,
194         }, {
195                 .phy            = 1,
196                 .rxq            = 4,
197                 .txreadyq       = 21,
198         }
199 };
200
201 static struct platform_device ixdp425_eth[] = {
202         {
203                 .name                   = "ixp4xx_eth",
204                 .id                     = IXP4XX_ETH_NPEB,
205                 .dev.platform_data      = ixdp425_plat_eth,
206         }, {
207                 .name                   = "ixp4xx_eth",
208                 .id                     = IXP4XX_ETH_NPEC,
209                 .dev.platform_data      = ixdp425_plat_eth + 1,
210         }
211 };
212
213 static struct platform_device *ixdp425_devices[] __initdata = {
214         &ixdp425_i2c_gpio,
215         &ixdp425_flash,
216 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
217     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
218         &ixdp425_flash_nand,
219 #endif
220         &ixdp425_uart,
221         &ixdp425_eth[0],
222         &ixdp425_eth[1],
223 };
224
225 static void __init ixdp425_init(void)
226 {
227         ixp4xx_sys_init();
228
229         ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
230         ixdp425_flash_resource.end =
231                 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
232
233 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
234     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
235         ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
236         ixdp425_flash_nand_resource.end   = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
237
238         gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);
239
240         /* Configure expansion bus for NAND Flash */
241         *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
242                           IXP4XX_EXP_BUS_STROBE_T(1) |  /* extend by 1 clock */
243                           IXP4XX_EXP_BUS_CYCLES(0) |    /* Intel cycles */
244                           IXP4XX_EXP_BUS_SIZE(0) |      /* 512bytes addr space*/
245                           IXP4XX_EXP_BUS_WR_EN |
246                           IXP4XX_EXP_BUS_BYTE_EN;       /* 8 bit data bus */
247 #endif
248
249         if (cpu_is_ixp43x()) {
250                 ixdp425_uart.num_resources = 1;
251                 ixdp425_uart_data[1].flags = 0;
252         }
253
254         platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
255 }
256
257 #ifdef CONFIG_ARCH_IXDP425
258 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
259         /* Maintainer: MontaVista Software, Inc. */
260         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
261         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
262         .map_io         = ixp4xx_map_io,
263         .init_irq       = ixp4xx_init_irq,
264         .timer          = &ixp4xx_timer,
265         .boot_params    = 0x0100,
266         .init_machine   = ixdp425_init,
267 MACHINE_END
268 #endif
269
270 #ifdef CONFIG_MACH_IXDP465
271 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
272         /* Maintainer: MontaVista Software, Inc. */
273         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
274         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
275         .map_io         = ixp4xx_map_io,
276         .init_irq       = ixp4xx_init_irq,
277         .timer          = &ixp4xx_timer,
278         .boot_params    = 0x0100,
279         .init_machine   = ixdp425_init,
280 MACHINE_END
281 #endif
282
283 #ifdef CONFIG_ARCH_PRPMC1100
284 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
285         /* Maintainer: MontaVista Software, Inc. */
286         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
287         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
288         .map_io         = ixp4xx_map_io,
289         .init_irq       = ixp4xx_init_irq,
290         .timer          = &ixp4xx_timer,
291         .boot_params    = 0x0100,
292         .init_machine   = ixdp425_init,
293 MACHINE_END
294 #endif
295
296 #ifdef CONFIG_MACH_KIXRP435
297 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
298         /* Maintainer: MontaVista Software, Inc. */
299         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
300         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
301         .map_io         = ixp4xx_map_io,
302         .init_irq       = ixp4xx_init_irq,
303         .timer          = &ixp4xx_timer,
304         .boot_params    = 0x0100,
305         .init_machine   = ixdp425_init,
306 MACHINE_END
307 #endif