[ARM] 3388/1: ixp23xx: add core ixp23xx support
[linux-2.6.git] / arch / arm / mach-ixp23xx / ixdp2351.c
1 /*
2  * arch/arm/mach-ixp23xx/ixdp2351.c
3  *
4  * IXDP2351 board-specific routines
5  *
6  * Author: Deepak Saxena <dsaxena@plexity.net>
7  *
8  * Copyright 2005 (c) MontaVista Software, Inc.
9  *
10  * Based on 2.4 code Copyright 2004 (c) Intel Corporation
11  *
12  * This file is licensed under the terms of the GNU General Public
13  * License version 2. This program is licensed "as is" without any
14  * warranty of any kind, whether express or implied.
15  */
16
17 #include <linux/config.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/sched.h>
22 #include <linux/interrupt.h>
23 #include <linux/serial.h>
24 #include <linux/tty.h>
25 #include <linux/bitops.h>
26 #include <linux/ioport.h>
27 #include <linux/serial.h>
28 #include <linux/serial_8250.h>
29 #include <linux/serial_core.h>
30 #include <linux/device.h>
31 #include <linux/mm.h>
32 #include <linux/pci.h>
33 #include <linux/mtd/physmap.h>
34
35 #include <asm/types.h>
36 #include <asm/setup.h>
37 #include <asm/memory.h>
38 #include <asm/hardware.h>
39 #include <asm/mach-types.h>
40 #include <asm/irq.h>
41 #include <asm/system.h>
42 #include <asm/tlbflush.h>
43 #include <asm/pgtable.h>
44
45 #include <asm/mach/map.h>
46 #include <asm/mach/irq.h>
47 #include <asm/mach/arch.h>
48 #include <asm/mach/irq.h>
49 #include <asm/mach/pci.h>
50
51 /*
52  * IXDP2351 Interrupt Handling
53  */
54 static void ixdp2351_inta_mask(unsigned int irq)
55 {
56         *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(irq);
57 }
58
59 static void ixdp2351_inta_unmask(unsigned int irq)
60 {
61         *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq);
62 }
63
64 static void ixdp2351_inta_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
65 {
66         u16 ex_interrupt =
67                 *IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID;
68         int i;
69
70         desc->chip->mask(irq);
71
72         for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
73                 if (ex_interrupt & (1 << i)) {
74                         struct irqdesc *cpld_desc;
75                         int cpld_irq =
76                                 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
77                         cpld_desc = irq_desc + cpld_irq;
78                         cpld_desc->handle(cpld_irq, cpld_desc, regs);
79                 }
80         }
81
82         desc->chip->unmask(irq);
83 }
84
85 static struct irqchip ixdp2351_inta_chip = {
86         .ack    = ixdp2351_inta_mask,
87         .mask   = ixdp2351_inta_mask,
88         .unmask = ixdp2351_inta_unmask
89 };
90
91 static void ixdp2351_intb_mask(unsigned int irq)
92 {
93         *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(irq);
94 }
95
96 static void ixdp2351_intb_unmask(unsigned int irq)
97 {
98         *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq);
99 }
100
101 static void ixdp2351_intb_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
102 {
103         u16 ex_interrupt =
104                 *IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID;
105         int i;
106
107         desc->chip->ack(irq);
108
109         for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
110                 if (ex_interrupt & (1 << i)) {
111                         struct irqdesc *cpld_desc;
112                         int cpld_irq =
113                                 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
114                         cpld_desc = irq_desc + cpld_irq;
115                         cpld_desc->handle(cpld_irq, cpld_desc, regs);
116                 }
117         }
118
119         desc->chip->unmask(irq);
120 }
121
122 static struct irqchip ixdp2351_intb_chip = {
123         .ack    = ixdp2351_intb_mask,
124         .mask   = ixdp2351_intb_mask,
125         .unmask = ixdp2351_intb_unmask
126 };
127
128 void ixdp2351_init_irq(void)
129 {
130         int irq;
131
132         /* Mask all interrupts from CPLD, disable simulation */
133         *IXDP2351_CPLD_INTA_MASK_SET_REG = (u16) -1;
134         *IXDP2351_CPLD_INTB_MASK_SET_REG = (u16) -1;
135         *IXDP2351_CPLD_INTA_SIM_REG = 0;
136         *IXDP2351_CPLD_INTB_SIM_REG = 0;
137
138         ixp23xx_init_irq();
139
140         for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE);
141              irq <
142              IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + IXDP2351_INTA_IRQ_NUM);
143              irq++) {
144                 if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) {
145                         set_irq_flags(irq, IRQF_VALID);
146                         set_irq_handler(irq, do_level_IRQ);
147                         set_irq_chip(irq, &ixdp2351_inta_chip);
148                 }
149         }
150
151         for (irq = IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE);
152              irq <
153              IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + IXDP2351_INTB_IRQ_NUM);
154              irq++) {
155                 if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) {
156                         set_irq_flags(irq, IRQF_VALID);
157                         set_irq_handler(irq, do_level_IRQ);
158                         set_irq_chip(irq, &ixdp2351_intb_chip);
159                 }
160         }
161
162         set_irq_chained_handler(IRQ_IXP23XX_INTA, &ixdp2351_inta_handler);
163         set_irq_chained_handler(IRQ_IXP23XX_INTB, &ixdp2351_intb_handler);
164 }
165
166 /*
167  * IXDP2351 PCI
168  */
169
170 /*
171  * This board does not do normal PCI IRQ routing, or any
172  * sort of swizzling, so we just need to check where on the
173  * bus the device is and figure out what CPLD pin it is
174  * being routed to.
175  */
176 #define DEVPIN(dev, pin) ((pin) | ((dev) << 3))
177
178 static int __init ixdp2351_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
179 {
180         u8 bus = dev->bus->number;
181         u32 devpin = DEVPIN(PCI_SLOT(dev->devfn), pin);
182         struct pci_bus *tmp_bus = dev->bus;
183
184         /* Primary bus, no interrupts here */
185         if (!bus)
186                 return -1;
187
188         /* Lookup first leaf in bus tree */
189         while ((tmp_bus->parent != NULL) && (tmp_bus->parent->parent != NULL))
190                 tmp_bus = tmp_bus->parent;
191
192         /* Select between known bridges */
193         switch (tmp_bus->self->devfn | (tmp_bus->self->bus->number << 8)) {
194                 /* Device is located after first bridge */
195         case 0x0008:
196                 if (tmp_bus == dev->bus) {
197                         /* Device is located directy after first bridge */
198                         switch (devpin) {
199                                 /* Onboard 82546 */
200                         case DEVPIN(1, 1):      /* Onboard 82546 ch 0 */
201                                 return IRQ_IXDP2351_INTA_82546;
202                         case DEVPIN(1, 2):      /* Onboard 82546 ch 1 */
203                                 return IRQ_IXDP2351_INTB_82546;
204                                 /* PMC SLOT */
205                         case DEVPIN(0, 1):      /* PMCP INTA# */
206                         case DEVPIN(2, 4):      /* PMCS INTD# */
207                                 return IRQ_IXDP2351_SPCI_PMC_INTA;
208                         case DEVPIN(0, 2):      /* PMCP INTB# */
209                         case DEVPIN(2, 1):      /* PMCS INTA# */
210                                 return IRQ_IXDP2351_SPCI_PMC_INTB;
211                         case DEVPIN(0, 3):      /* PMCP INTC# */
212                         case DEVPIN(2, 2):      /* PMCS INTB# */
213                                 return IRQ_IXDP2351_SPCI_PMC_INTC;
214                         case DEVPIN(0, 4):      /* PMCP INTD# */
215                         case DEVPIN(2, 3):      /* PMCS INTC# */
216                                 return IRQ_IXDP2351_SPCI_PMC_INTD;
217                         }
218                 } else {
219                         /* Device is located indirectly after first bridge */
220                         /* Not supported now */
221                         return -1;
222                 }
223                 break;
224         case 0x0010:
225                 if (tmp_bus == dev->bus) {
226                         /* Device is located directy after second bridge */
227                         /* Secondary bus of second bridge */
228                         switch (devpin) {
229                         case DEVPIN(0, 1):      /* DB#0 */
230                         case DEVPIN(0, 2):
231                         case DEVPIN(0, 3):
232                         case DEVPIN(0, 4):
233                                 return IRQ_IXDP2351_SPCI_DB_0;
234                         case DEVPIN(1, 1):      /* DB#1 */
235                         case DEVPIN(1, 2):
236                         case DEVPIN(1, 3):
237                         case DEVPIN(1, 4):
238                                 return IRQ_IXDP2351_SPCI_DB_1;
239                         case DEVPIN(2, 1):      /* FIC1 */
240                         case DEVPIN(2, 2):
241                         case DEVPIN(2, 3):
242                         case DEVPIN(2, 4):
243                         case DEVPIN(3, 1):      /* FIC2 */
244                         case DEVPIN(3, 2):
245                         case DEVPIN(3, 3):
246                         case DEVPIN(3, 4):
247                                 return IRQ_IXDP2351_SPCI_FIC;
248                         }
249                 } else {
250                         /* Device is located indirectly after second bridge */
251                         /* Not supported now */
252                         return -1;
253                 }
254                 break;
255         }
256
257         return -1;
258 }
259
260 struct hw_pci ixdp2351_pci __initdata = {
261         .nr_controllers = 1,
262         .preinit        = ixp23xx_pci_preinit,
263         .setup          = ixp23xx_pci_setup,
264         .scan           = ixp23xx_pci_scan_bus,
265         .map_irq        = ixdp2351_map_irq,
266 };
267
268 int __init ixdp2351_pci_init(void)
269 {
270         if (machine_is_ixdp2351())
271                 pci_common_init(&ixdp2351_pci);
272
273         return 0;
274 }
275
276 subsys_initcall(ixdp2351_pci_init);
277
278 /*
279  * IXDP2351 Static Mapped I/O
280  */
281 static struct map_desc ixdp2351_io_desc[] __initdata = {
282         {
283                 .virtual        = IXDP2351_NP_VIRT_BASE,
284                 .pfn            = __phys_to_pfn((u64)IXDP2351_NP_PHYS_BASE),
285                 .length         = IXDP2351_NP_PHYS_SIZE,
286                 .type           = MT_DEVICE
287         }, {
288                 .virtual        = IXDP2351_BB_BASE_VIRT,
289                 .pfn            = __phys_to_pfn((u64)IXDP2351_BB_BASE_PHYS),
290                 .length         = IXDP2351_BB_SIZE,
291                 .type           = MT_DEVICE
292         }
293 };
294
295 static void __init ixdp2351_map_io(void)
296 {
297         ixp23xx_map_io();
298         iotable_init(ixdp2351_io_desc, ARRAY_SIZE(ixdp2351_io_desc));
299 }
300
301 static void __init ixdp2351_init(void)
302 {
303         physmap_configure(0x90000000, 0x04000000, 1, NULL);
304
305         /*
306          * Mark flash as writeable
307          */
308         IXP23XX_EXP_CS0[0] |= IXP23XX_FLASH_WRITABLE;
309         IXP23XX_EXP_CS0[1] |= IXP23XX_FLASH_WRITABLE;
310         IXP23XX_EXP_CS0[2] |= IXP23XX_FLASH_WRITABLE;
311         IXP23XX_EXP_CS0[3] |= IXP23XX_FLASH_WRITABLE;
312
313         ixp23xx_sys_init();
314 }
315
316 MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
317         /* Maintainer: MontaVista Software, Inc. */
318         .phys_io        = IXP23XX_PERIPHERAL_PHYS,
319         .io_pg_offst    = ((IXP23XX_PERIPHERAL_VIRT >> 18)) & 0xfffc,
320         .map_io         = ixdp2351_map_io,
321         .init_irq       = ixdp2351_init_irq,
322         .timer          = &ixp23xx_timer,
323         .boot_params    = 0x00000100,
324         .init_machine   = ixdp2351_init,
325 MACHINE_END