ARM: Fix Versatile&Integrator includes to behave in the same way as Realview
[linux-2.6.git] / arch / arm / mach-integrator / core.c
1 /*
2  *  linux/arch/arm/mach-integrator/core.c
3  *
4  *  Copyright (C) 2000-2003 Deep Blue Solutions Ltd
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2, as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/spinlock.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/sched.h>
18 #include <linux/smp.h>
19 #include <linux/termios.h>
20 #include <linux/amba/bus.h>
21 #include <linux/amba/serial.h>
22 #include <linux/io.h>
23
24 #include <asm/clkdev.h>
25 #include <mach/clkdev.h>
26 #include <mach/hardware.h>
27 #include <mach/platform.h>
28 #include <asm/irq.h>
29 #include <asm/hardware/arm_timer.h>
30 #include <mach/cm.h>
31 #include <asm/system.h>
32 #include <asm/leds.h>
33 #include <asm/mach/time.h>
34
35 #include "common.h"
36
37 static struct amba_pl010_data integrator_uart_data;
38
39 static struct amba_device rtc_device = {
40         .dev            = {
41                 .init_name = "mb:15",
42         },
43         .res            = {
44                 .start  = INTEGRATOR_RTC_BASE,
45                 .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
46                 .flags  = IORESOURCE_MEM,
47         },
48         .irq            = { IRQ_RTCINT, NO_IRQ },
49         .periphid       = 0x00041030,
50 };
51
52 static struct amba_device uart0_device = {
53         .dev            = {
54                 .init_name = "mb:16",
55                 .platform_data = &integrator_uart_data,
56         },
57         .res            = {
58                 .start  = INTEGRATOR_UART0_BASE,
59                 .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
60                 .flags  = IORESOURCE_MEM,
61         },
62         .irq            = { IRQ_UARTINT0, NO_IRQ },
63         .periphid       = 0x0041010,
64 };
65
66 static struct amba_device uart1_device = {
67         .dev            = {
68                 .init_name = "mb:17",
69                 .platform_data = &integrator_uart_data,
70         },
71         .res            = {
72                 .start  = INTEGRATOR_UART1_BASE,
73                 .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
74                 .flags  = IORESOURCE_MEM,
75         },
76         .irq            = { IRQ_UARTINT1, NO_IRQ },
77         .periphid       = 0x0041010,
78 };
79
80 static struct amba_device kmi0_device = {
81         .dev            = {
82                 .init_name = "mb:18",
83         },
84         .res            = {
85                 .start  = KMI0_BASE,
86                 .end    = KMI0_BASE + SZ_4K - 1,
87                 .flags  = IORESOURCE_MEM,
88         },
89         .irq            = { IRQ_KMIINT0, NO_IRQ },
90         .periphid       = 0x00041050,
91 };
92
93 static struct amba_device kmi1_device = {
94         .dev            = {
95                 .init_name = "mb:19",
96         },
97         .res            = {
98                 .start  = KMI1_BASE,
99                 .end    = KMI1_BASE + SZ_4K - 1,
100                 .flags  = IORESOURCE_MEM,
101         },
102         .irq            = { IRQ_KMIINT1, NO_IRQ },
103         .periphid       = 0x00041050,
104 };
105
106 static struct amba_device *amba_devs[] __initdata = {
107         &rtc_device,
108         &uart0_device,
109         &uart1_device,
110         &kmi0_device,
111         &kmi1_device,
112 };
113
114 /*
115  * These are fixed clocks.
116  */
117 static struct clk clk24mhz = {
118         .rate   = 24000000,
119 };
120
121 static struct clk uartclk = {
122         .rate   = 14745600,
123 };
124
125 static struct clk_lookup lookups[] = {
126         {       /* UART0 */
127                 .dev_id         = "mb:16",
128                 .clk            = &uartclk,
129         }, {    /* UART1 */
130                 .dev_id         = "mb:17",
131                 .clk            = &uartclk,
132         }, {    /* KMI0 */
133                 .dev_id         = "mb:18",
134                 .clk            = &clk24mhz,
135         }, {    /* KMI1 */
136                 .dev_id         = "mb:19",
137                 .clk            = &clk24mhz,
138         }, {    /* MMCI - IntegratorCP */
139                 .dev_id         = "mb:1c",
140                 .clk            = &uartclk,
141         }
142 };
143
144 static int __init integrator_init(void)
145 {
146         int i;
147
148         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
149
150         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
151                 struct amba_device *d = amba_devs[i];
152                 amba_device_register(d, &iomem_resource);
153         }
154
155         return 0;
156 }
157
158 arch_initcall(integrator_init);
159
160 /*
161  * On the Integrator platform, the port RTS and DTR are provided by
162  * bits in the following SC_CTRLS register bits:
163  *        RTS  DTR
164  *  UART0  7    6
165  *  UART1  5    4
166  */
167 #define SC_CTRLC        (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
168 #define SC_CTRLS        (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
169
170 static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
171 {
172         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
173
174         if (dev == &uart0_device) {
175                 rts_mask = 1 << 4;
176                 dtr_mask = 1 << 5;
177         } else {
178                 rts_mask = 1 << 6;
179                 dtr_mask = 1 << 7;
180         }
181
182         if (mctrl & TIOCM_RTS)
183                 ctrlc |= rts_mask;
184         else
185                 ctrls |= rts_mask;
186
187         if (mctrl & TIOCM_DTR)
188                 ctrlc |= dtr_mask;
189         else
190                 ctrls |= dtr_mask;
191
192         __raw_writel(ctrls, SC_CTRLS);
193         __raw_writel(ctrlc, SC_CTRLC);
194 }
195
196 static struct amba_pl010_data integrator_uart_data = {
197         .set_mctrl = integrator_uart_set_mctrl,
198 };
199
200 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
201
202 static DEFINE_SPINLOCK(cm_lock);
203
204 /**
205  * cm_control - update the CM_CTRL register.
206  * @mask: bits to change
207  * @set: bits to set
208  */
209 void cm_control(u32 mask, u32 set)
210 {
211         unsigned long flags;
212         u32 val;
213
214         spin_lock_irqsave(&cm_lock, flags);
215         val = readl(CM_CTRL) & ~mask;
216         writel(val | set, CM_CTRL);
217         spin_unlock_irqrestore(&cm_lock, flags);
218 }
219
220 EXPORT_SYMBOL(cm_control);
221
222 /*
223  * Where is the timer (VA)?
224  */
225 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
226 #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
227 #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
228 #define VA_IC_BASE     IO_ADDRESS(INTEGRATOR_IC_BASE) 
229
230 /*
231  * How long is the timer interval?
232  */
233 #define TIMER_INTERVAL  (TICKS_PER_uSEC * mSEC_10)
234 #if TIMER_INTERVAL >= 0x100000
235 #define TICKS2USECS(x)  (256 * (x) / TICKS_PER_uSEC)
236 #elif TIMER_INTERVAL >= 0x10000
237 #define TICKS2USECS(x)  (16 * (x) / TICKS_PER_uSEC)
238 #else
239 #define TICKS2USECS(x)  ((x) / TICKS_PER_uSEC)
240 #endif
241
242 static unsigned long timer_reload;
243
244 /*
245  * Returns number of ms since last clock interrupt.  Note that interrupts
246  * will have been disabled by do_gettimeoffset()
247  */
248 unsigned long integrator_gettimeoffset(void)
249 {
250         unsigned long ticks1, ticks2, status;
251
252         /*
253          * Get the current number of ticks.  Note that there is a race
254          * condition between us reading the timer and checking for
255          * an interrupt.  We get around this by ensuring that the
256          * counter has not reloaded between our two reads.
257          */
258         ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
259         do {
260                 ticks1 = ticks2;
261                 status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
262                 ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
263         } while (ticks2 > ticks1);
264
265         /*
266          * Number of ticks since last interrupt.
267          */
268         ticks1 = timer_reload - ticks2;
269
270         /*
271          * Interrupt pending?  If so, we've reloaded once already.
272          */
273         if (status & (1 << IRQ_TIMERINT1))
274                 ticks1 += timer_reload;
275
276         /*
277          * Convert the ticks to usecs
278          */
279         return TICKS2USECS(ticks1);
280 }
281
282 /*
283  * IRQ handler for the timer
284  */
285 static irqreturn_t
286 integrator_timer_interrupt(int irq, void *dev_id)
287 {
288         /*
289          * clear the interrupt
290          */
291         writel(1, TIMER1_VA_BASE + TIMER_INTCLR);
292
293         timer_tick();
294
295         return IRQ_HANDLED;
296 }
297
298 static struct irqaction integrator_timer_irq = {
299         .name           = "Integrator Timer Tick",
300         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
301         .handler        = integrator_timer_interrupt,
302 };
303
304 /*
305  * Set up timer interrupt, and return the current time in seconds.
306  */
307 void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
308 {
309         unsigned int timer_ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
310
311         timer_reload = reload;
312         timer_ctrl |= ctrl;
313
314         if (timer_reload > 0x100000) {
315                 timer_reload >>= 8;
316                 timer_ctrl |= TIMER_CTRL_DIV256;
317         } else if (timer_reload > 0x010000) {
318                 timer_reload >>= 4;
319                 timer_ctrl |= TIMER_CTRL_DIV16;
320         }
321
322         /*
323          * Initialise to a known state (all timers off)
324          */
325         writel(0, TIMER0_VA_BASE + TIMER_CTRL);
326         writel(0, TIMER1_VA_BASE + TIMER_CTRL);
327         writel(0, TIMER2_VA_BASE + TIMER_CTRL);
328
329         writel(timer_reload, TIMER1_VA_BASE + TIMER_LOAD);
330         writel(timer_reload, TIMER1_VA_BASE + TIMER_VALUE);
331         writel(timer_ctrl, TIMER1_VA_BASE + TIMER_CTRL);
332
333         /*
334          * Make irqs happen for the system timer
335          */
336         setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
337 }