ARM: 5992/1: ep93xx: pass platform startup data as __initdata
[linux-2.6.git] / arch / arm / mach-ep93xx / core.c
1 /*
2  * arch/arm/mach-ep93xx/core.c
3  * Core routines for Cirrus EP93xx chips.
4  *
5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7  *
8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9  * role in the ep93xx linux community.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-gpio.h>
34
35 #include <mach/hardware.h>
36 #include <mach/fb.h>
37 #include <mach/ep93xx_keypad.h>
38
39 #include <asm/mach/map.h>
40 #include <asm/mach/time.h>
41
42 #include <asm/hardware/vic.h>
43
44
45 /*************************************************************************
46  * Static I/O mappings that are needed for all EP93xx platforms
47  *************************************************************************/
48 static struct map_desc ep93xx_io_desc[] __initdata = {
49         {
50                 .virtual        = EP93XX_AHB_VIRT_BASE,
51                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
52                 .length         = EP93XX_AHB_SIZE,
53                 .type           = MT_DEVICE,
54         }, {
55                 .virtual        = EP93XX_APB_VIRT_BASE,
56                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
57                 .length         = EP93XX_APB_SIZE,
58                 .type           = MT_DEVICE,
59         },
60 };
61
62 void __init ep93xx_map_io(void)
63 {
64         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
65 }
66
67
68 /*************************************************************************
69  * Timer handling for EP93xx
70  *************************************************************************
71  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
72  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
73  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
74  * is free-running, and can't generate interrupts.
75  *
76  * The 508 kHz timers are ideal for use for the timer interrupt, as the
77  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
78  * bit timers (timer 1) since we don't need more than 16 bits of reload
79  * value as long as HZ >= 8.
80  *
81  * The higher clock rate of timer 4 makes it a better choice than the
82  * other timers for use in gettimeoffset(), while the fact that it can't
83  * generate interrupts means we don't have to worry about not being able
84  * to use this timer for something else.  We also use timer 4 for keeping
85  * track of lost jiffies.
86  */
87 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
88 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
89 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
90 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
91 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
92 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
93 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
94 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
95 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
96 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
97 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
98 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
99 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
100 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
101 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
102 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
103 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
104 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
105 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
106
107 #define EP93XX_TIMER123_CLOCK           508469
108 #define EP93XX_TIMER4_CLOCK             983040
109
110 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
111 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
112
113 static unsigned int last_jiffy_time;
114
115 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
116 {
117         /* Writing any value clears the timer interrupt */
118         __raw_writel(1, EP93XX_TIMER1_CLEAR);
119
120         /* Recover lost jiffies */
121         while ((signed long)
122                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
123                                                 >= TIMER4_TICKS_PER_JIFFY) {
124                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
125                 timer_tick();
126         }
127
128         return IRQ_HANDLED;
129 }
130
131 static struct irqaction ep93xx_timer_irq = {
132         .name           = "ep93xx timer",
133         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
134         .handler        = ep93xx_timer_interrupt,
135 };
136
137 static void __init ep93xx_timer_init(void)
138 {
139         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
140                     EP93XX_TIMER123_CONTROL_CLKSEL;
141
142         /* Enable periodic HZ timer.  */
143         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
144         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
145         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
146                         EP93XX_TIMER1_CONTROL);
147
148         /* Enable lost jiffy timer.  */
149         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
150                         EP93XX_TIMER4_VALUE_HIGH);
151
152         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
153 }
154
155 static unsigned long ep93xx_gettimeoffset(void)
156 {
157         int offset;
158
159         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
160
161         /* Calculate (1000000 / 983040) * offset.  */
162         return offset + (53 * offset / 3072);
163 }
164
165 struct sys_timer ep93xx_timer = {
166         .init           = ep93xx_timer_init,
167         .offset         = ep93xx_gettimeoffset,
168 };
169
170
171 /*************************************************************************
172  * EP93xx IRQ handling
173  *************************************************************************/
174 extern void ep93xx_gpio_init_irq(void);
175
176 void __init ep93xx_init_irq(void)
177 {
178         vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
179         vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
180
181         ep93xx_gpio_init_irq();
182 }
183
184
185 /*************************************************************************
186  * EP93xx System Controller Software Locked register handling
187  *************************************************************************/
188
189 /*
190  * syscon_swlock prevents anything else from writing to the syscon
191  * block while a software locked register is being written.
192  */
193 static DEFINE_SPINLOCK(syscon_swlock);
194
195 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
196 {
197         unsigned long flags;
198
199         spin_lock_irqsave(&syscon_swlock, flags);
200
201         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
202         __raw_writel(val, reg);
203
204         spin_unlock_irqrestore(&syscon_swlock, flags);
205 }
206 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
207
208 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
209 {
210         unsigned long flags;
211         unsigned int val;
212
213         spin_lock_irqsave(&syscon_swlock, flags);
214
215         val = __raw_readl(EP93XX_SYSCON_DEVCFG);
216         val |= set_bits;
217         val &= ~clear_bits;
218         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
219         __raw_writel(val, EP93XX_SYSCON_DEVCFG);
220
221         spin_unlock_irqrestore(&syscon_swlock, flags);
222 }
223 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
224
225
226 /*************************************************************************
227  * EP93xx peripheral handling
228  *************************************************************************/
229 #define EP93XX_UART_MCR_OFFSET          (0x0100)
230
231 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
232                                   void __iomem *base, unsigned int mctrl)
233 {
234         unsigned int mcr;
235
236         mcr = 0;
237         if (!(mctrl & TIOCM_RTS))
238                 mcr |= 2;
239         if (!(mctrl & TIOCM_DTR))
240                 mcr |= 1;
241
242         __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
243 }
244
245 static struct amba_pl010_data ep93xx_uart_data = {
246         .set_mctrl      = ep93xx_uart_set_mctrl,
247 };
248
249 static struct amba_device uart1_device = {
250         .dev            = {
251                 .init_name      = "apb:uart1",
252                 .platform_data  = &ep93xx_uart_data,
253         },
254         .res            = {
255                 .start  = EP93XX_UART1_PHYS_BASE,
256                 .end    = EP93XX_UART1_PHYS_BASE + 0x0fff,
257                 .flags  = IORESOURCE_MEM,
258         },
259         .irq            = { IRQ_EP93XX_UART1, NO_IRQ },
260         .periphid       = 0x00041010,
261 };
262
263 static struct amba_device uart2_device = {
264         .dev            = {
265                 .init_name      = "apb:uart2",
266                 .platform_data  = &ep93xx_uart_data,
267         },
268         .res            = {
269                 .start  = EP93XX_UART2_PHYS_BASE,
270                 .end    = EP93XX_UART2_PHYS_BASE + 0x0fff,
271                 .flags  = IORESOURCE_MEM,
272         },
273         .irq            = { IRQ_EP93XX_UART2, NO_IRQ },
274         .periphid       = 0x00041010,
275 };
276
277 static struct amba_device uart3_device = {
278         .dev            = {
279                 .init_name      = "apb:uart3",
280                 .platform_data  = &ep93xx_uart_data,
281         },
282         .res            = {
283                 .start  = EP93XX_UART3_PHYS_BASE,
284                 .end    = EP93XX_UART3_PHYS_BASE + 0x0fff,
285                 .flags  = IORESOURCE_MEM,
286         },
287         .irq            = { IRQ_EP93XX_UART3, NO_IRQ },
288         .periphid       = 0x00041010,
289 };
290
291
292 static struct resource ep93xx_rtc_resource[] = {
293         {
294                 .start          = EP93XX_RTC_PHYS_BASE,
295                 .end            = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
296                 .flags          = IORESOURCE_MEM,
297         },
298 };
299
300 static struct platform_device ep93xx_rtc_device = {
301         .name           = "ep93xx-rtc",
302         .id             = -1,
303         .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
304         .resource       = ep93xx_rtc_resource,
305 };
306
307
308 static struct resource ep93xx_ohci_resources[] = {
309         [0] = {
310                 .start  = EP93XX_USB_PHYS_BASE,
311                 .end    = EP93XX_USB_PHYS_BASE + 0x0fff,
312                 .flags  = IORESOURCE_MEM,
313         },
314         [1] = {
315                 .start  = IRQ_EP93XX_USB,
316                 .end    = IRQ_EP93XX_USB,
317                 .flags  = IORESOURCE_IRQ,
318         },
319 };
320
321
322 static struct platform_device ep93xx_ohci_device = {
323         .name           = "ep93xx-ohci",
324         .id             = -1,
325         .dev            = {
326                 .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
327                 .coherent_dma_mask      = DMA_BIT_MASK(32),
328         },
329         .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
330         .resource       = ep93xx_ohci_resources,
331 };
332
333
334 /*************************************************************************
335  * EP93xx ethernet peripheral handling
336  *************************************************************************/
337 static struct ep93xx_eth_data ep93xx_eth_data;
338
339 static struct resource ep93xx_eth_resource[] = {
340         {
341                 .start  = EP93XX_ETHERNET_PHYS_BASE,
342                 .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
343                 .flags  = IORESOURCE_MEM,
344         }, {
345                 .start  = IRQ_EP93XX_ETHERNET,
346                 .end    = IRQ_EP93XX_ETHERNET,
347                 .flags  = IORESOURCE_IRQ,
348         }
349 };
350
351 static struct platform_device ep93xx_eth_device = {
352         .name           = "ep93xx-eth",
353         .id             = -1,
354         .dev            = {
355                 .platform_data  = &ep93xx_eth_data,
356         },
357         .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
358         .resource       = ep93xx_eth_resource,
359 };
360
361 /**
362  * ep93xx_register_eth - Register the built-in ethernet platform device.
363  * @data:       platform specific ethernet configuration (__initdata)
364  * @copy_addr:  flag indicating that the MAC address should be copied
365  *              from the IndAd registers (as programmed by the bootloader)
366  */
367 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
368 {
369         if (copy_addr)
370                 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
371
372         ep93xx_eth_data = *data;
373         platform_device_register(&ep93xx_eth_device);
374 }
375
376
377 /*************************************************************************
378  * EP93xx i2c peripheral handling
379  *************************************************************************/
380 static struct i2c_gpio_platform_data ep93xx_i2c_data;
381
382 static struct platform_device ep93xx_i2c_device = {
383         .name           = "i2c-gpio",
384         .id             = 0,
385         .dev            = {
386                 .platform_data  = &ep93xx_i2c_data,
387         },
388 };
389
390 /**
391  * ep93xx_register_i2c - Register the i2c platform device.
392  * @data:       platform specific i2c-gpio configuration (__initdata)
393  * @devices:    platform specific i2c bus device information (__initdata)
394  * @num:        the number of devices on the i2c bus
395  */
396 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
397                                 struct i2c_board_info *devices, int num)
398 {
399         /*
400          * Set the EEPROM interface pin drive type control.
401          * Defines the driver type for the EECLK and EEDAT pins as either
402          * open drain, which will require an external pull-up, or a normal
403          * CMOS driver.
404          */
405         if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
406                 pr_warning("sda != EEDAT, open drain has no effect\n");
407         if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
408                 pr_warning("scl != EECLK, open drain has no effect\n");
409
410         __raw_writel((data->sda_is_open_drain << 1) |
411                      (data->scl_is_open_drain << 0),
412                      EP93XX_GPIO_EEDRIVE);
413
414         ep93xx_i2c_data = *data;
415         i2c_register_board_info(0, devices, num);
416         platform_device_register(&ep93xx_i2c_device);
417 }
418
419
420 /*************************************************************************
421  * EP93xx LEDs
422  *************************************************************************/
423 static struct gpio_led ep93xx_led_pins[] = {
424         {
425                 .name   = "platform:grled",
426                 .gpio   = EP93XX_GPIO_LINE_GRLED,
427         }, {
428                 .name   = "platform:rdled",
429                 .gpio   = EP93XX_GPIO_LINE_RDLED,
430         },
431 };
432
433 static struct gpio_led_platform_data ep93xx_led_data = {
434         .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
435         .leds           = ep93xx_led_pins,
436 };
437
438 static struct platform_device ep93xx_leds = {
439         .name           = "leds-gpio",
440         .id             = -1,
441         .dev            = {
442                 .platform_data  = &ep93xx_led_data,
443         },
444 };
445
446
447 /*************************************************************************
448  * EP93xx pwm peripheral handling
449  *************************************************************************/
450 static struct resource ep93xx_pwm0_resource[] = {
451         {
452                 .start  = EP93XX_PWM_PHYS_BASE,
453                 .end    = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
454                 .flags  = IORESOURCE_MEM,
455         },
456 };
457
458 static struct platform_device ep93xx_pwm0_device = {
459         .name           = "ep93xx-pwm",
460         .id             = 0,
461         .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
462         .resource       = ep93xx_pwm0_resource,
463 };
464
465 static struct resource ep93xx_pwm1_resource[] = {
466         {
467                 .start  = EP93XX_PWM_PHYS_BASE + 0x20,
468                 .end    = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
469                 .flags  = IORESOURCE_MEM,
470         },
471 };
472
473 static struct platform_device ep93xx_pwm1_device = {
474         .name           = "ep93xx-pwm",
475         .id             = 1,
476         .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
477         .resource       = ep93xx_pwm1_resource,
478 };
479
480 void __init ep93xx_register_pwm(int pwm0, int pwm1)
481 {
482         if (pwm0)
483                 platform_device_register(&ep93xx_pwm0_device);
484
485         /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
486         if (pwm1)
487                 platform_device_register(&ep93xx_pwm1_device);
488 }
489
490 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
491 {
492         int err;
493
494         if (pdev->id == 0) {
495                 err = 0;
496         } else if (pdev->id == 1) {
497                 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
498                                    dev_name(&pdev->dev));
499                 if (err)
500                         return err;
501                 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
502                 if (err)
503                         goto fail;
504
505                 /* PWM 1 output on EGPIO[14] */
506                 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
507         } else {
508                 err = -ENODEV;
509         }
510
511         return err;
512
513 fail:
514         gpio_free(EP93XX_GPIO_LINE_EGPIO14);
515         return err;
516 }
517 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
518
519 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
520 {
521         if (pdev->id == 1) {
522                 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
523                 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
524
525                 /* EGPIO[14] used for GPIO */
526                 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
527         }
528 }
529 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
530
531
532 /*************************************************************************
533  * EP93xx video peripheral handling
534  *************************************************************************/
535 static struct ep93xxfb_mach_info ep93xxfb_data;
536
537 static struct resource ep93xx_fb_resource[] = {
538         {
539                 .start          = EP93XX_RASTER_PHYS_BASE,
540                 .end            = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
541                 .flags          = IORESOURCE_MEM,
542         },
543 };
544
545 static struct platform_device ep93xx_fb_device = {
546         .name                   = "ep93xx-fb",
547         .id                     = -1,
548         .dev                    = {
549                 .platform_data          = &ep93xxfb_data,
550                 .coherent_dma_mask      = DMA_BIT_MASK(32),
551                 .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
552         },
553         .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
554         .resource               = ep93xx_fb_resource,
555 };
556
557 /**
558  * ep93xx_register_fb - Register the framebuffer platform device.
559  * @data:       platform specific framebuffer configuration (__initdata)
560  */
561 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
562 {
563         ep93xxfb_data = *data;
564         platform_device_register(&ep93xx_fb_device);
565 }
566
567
568 /*************************************************************************
569  * EP93xx matrix keypad peripheral handling
570  *************************************************************************/
571 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
572
573 static struct resource ep93xx_keypad_resource[] = {
574         {
575                 .start  = EP93XX_KEY_MATRIX_PHYS_BASE,
576                 .end    = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
577                 .flags  = IORESOURCE_MEM,
578         }, {
579                 .start  = IRQ_EP93XX_KEY,
580                 .end    = IRQ_EP93XX_KEY,
581                 .flags  = IORESOURCE_IRQ,
582         },
583 };
584
585 static struct platform_device ep93xx_keypad_device = {
586         .name           = "ep93xx-keypad",
587         .id             = -1,
588         .dev            = {
589                 .platform_data  = &ep93xx_keypad_data,
590         },
591         .num_resources  = ARRAY_SIZE(ep93xx_keypad_resource),
592         .resource       = ep93xx_keypad_resource,
593 };
594
595 /**
596  * ep93xx_register_keypad - Register the keypad platform device.
597  * @data:       platform specific keypad configuration (__initdata)
598  */
599 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
600 {
601         ep93xx_keypad_data = *data;
602         platform_device_register(&ep93xx_keypad_device);
603 }
604
605 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
606 {
607         int err;
608         int i;
609
610         for (i = 0; i < 8; i++) {
611                 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
612                 if (err)
613                         goto fail_gpio_c;
614                 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
615                 if (err)
616                         goto fail_gpio_d;
617         }
618
619         /* Enable the keypad controller; GPIO ports C and D used for keypad */
620         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
621                                  EP93XX_SYSCON_DEVCFG_GONK);
622
623         return 0;
624
625 fail_gpio_d:
626         gpio_free(EP93XX_GPIO_LINE_C(i));
627 fail_gpio_c:
628         for ( ; i >= 0; --i) {
629                 gpio_free(EP93XX_GPIO_LINE_C(i));
630                 gpio_free(EP93XX_GPIO_LINE_D(i));
631         }
632         return err;
633 }
634 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
635
636 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
637 {
638         int i;
639
640         for (i = 0; i < 8; i++) {
641                 gpio_free(EP93XX_GPIO_LINE_C(i));
642                 gpio_free(EP93XX_GPIO_LINE_D(i));
643         }
644
645         /* Disable the keypad controller; GPIO ports C and D used for GPIO */
646         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
647                                EP93XX_SYSCON_DEVCFG_GONK);
648 }
649 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
650
651
652 extern void ep93xx_gpio_init(void);
653
654 void __init ep93xx_init_devices(void)
655 {
656         /* Disallow access to MaverickCrunch initially */
657         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
658
659         ep93xx_gpio_init();
660
661         amba_device_register(&uart1_device, &iomem_resource);
662         amba_device_register(&uart2_device, &iomem_resource);
663         amba_device_register(&uart3_device, &iomem_resource);
664
665         platform_device_register(&ep93xx_rtc_device);
666         platform_device_register(&ep93xx_ohci_device);
667         platform_device_register(&ep93xx_leds);
668 }