Merge branch 'next' into for-linus-3.0
[linux-2.6.git] / arch / arm / mach-ep93xx / core.c
1 /*
2  * arch/arm/mach-ep93xx/core.c
3  * Core routines for Cirrus EP93xx chips.
4  *
5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7  *
8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9  * role in the ep93xx linux community.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-gpio.h>
35 #include <linux/spi/spi.h>
36
37 #include <mach/hardware.h>
38 #include <mach/fb.h>
39 #include <mach/ep93xx_keypad.h>
40 #include <mach/ep93xx_spi.h>
41
42 #include <asm/mach/map.h>
43 #include <asm/mach/time.h>
44
45 #include <asm/hardware/vic.h>
46
47
48 /*************************************************************************
49  * Static I/O mappings that are needed for all EP93xx platforms
50  *************************************************************************/
51 static struct map_desc ep93xx_io_desc[] __initdata = {
52         {
53                 .virtual        = EP93XX_AHB_VIRT_BASE,
54                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
55                 .length         = EP93XX_AHB_SIZE,
56                 .type           = MT_DEVICE,
57         }, {
58                 .virtual        = EP93XX_APB_VIRT_BASE,
59                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
60                 .length         = EP93XX_APB_SIZE,
61                 .type           = MT_DEVICE,
62         },
63 };
64
65 void __init ep93xx_map_io(void)
66 {
67         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
68 }
69
70
71 /*************************************************************************
72  * Timer handling for EP93xx
73  *************************************************************************
74  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
75  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
76  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
77  * is free-running, and can't generate interrupts.
78  *
79  * The 508 kHz timers are ideal for use for the timer interrupt, as the
80  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
81  * bit timers (timer 1) since we don't need more than 16 bits of reload
82  * value as long as HZ >= 8.
83  *
84  * The higher clock rate of timer 4 makes it a better choice than the
85  * other timers for use in gettimeoffset(), while the fact that it can't
86  * generate interrupts means we don't have to worry about not being able
87  * to use this timer for something else.  We also use timer 4 for keeping
88  * track of lost jiffies.
89  */
90 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
91 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
92 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
93 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
94 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
95 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
96 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
97 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
98 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
99 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
100 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
101 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
102 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
103 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
104 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
105 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
106 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
107 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
108 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
109
110 #define EP93XX_TIMER123_CLOCK           508469
111 #define EP93XX_TIMER4_CLOCK             983040
112
113 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
114 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
115
116 static unsigned int last_jiffy_time;
117
118 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
119 {
120         /* Writing any value clears the timer interrupt */
121         __raw_writel(1, EP93XX_TIMER1_CLEAR);
122
123         /* Recover lost jiffies */
124         while ((signed long)
125                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
126                                                 >= TIMER4_TICKS_PER_JIFFY) {
127                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
128                 timer_tick();
129         }
130
131         return IRQ_HANDLED;
132 }
133
134 static struct irqaction ep93xx_timer_irq = {
135         .name           = "ep93xx timer",
136         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
137         .handler        = ep93xx_timer_interrupt,
138 };
139
140 static void __init ep93xx_timer_init(void)
141 {
142         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
143                     EP93XX_TIMER123_CONTROL_CLKSEL;
144
145         /* Enable periodic HZ timer.  */
146         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
147         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
148         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
149                         EP93XX_TIMER1_CONTROL);
150
151         /* Enable lost jiffy timer.  */
152         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
153                         EP93XX_TIMER4_VALUE_HIGH);
154
155         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
156 }
157
158 static unsigned long ep93xx_gettimeoffset(void)
159 {
160         int offset;
161
162         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
163
164         /* Calculate (1000000 / 983040) * offset.  */
165         return offset + (53 * offset / 3072);
166 }
167
168 struct sys_timer ep93xx_timer = {
169         .init           = ep93xx_timer_init,
170         .offset         = ep93xx_gettimeoffset,
171 };
172
173
174 /*************************************************************************
175  * EP93xx IRQ handling
176  *************************************************************************/
177 extern void ep93xx_gpio_init_irq(void);
178
179 void __init ep93xx_init_irq(void)
180 {
181         vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
182         vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
183
184         ep93xx_gpio_init_irq();
185 }
186
187
188 /*************************************************************************
189  * EP93xx System Controller Software Locked register handling
190  *************************************************************************/
191
192 /*
193  * syscon_swlock prevents anything else from writing to the syscon
194  * block while a software locked register is being written.
195  */
196 static DEFINE_SPINLOCK(syscon_swlock);
197
198 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
199 {
200         unsigned long flags;
201
202         spin_lock_irqsave(&syscon_swlock, flags);
203
204         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
205         __raw_writel(val, reg);
206
207         spin_unlock_irqrestore(&syscon_swlock, flags);
208 }
209 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
210
211 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
212 {
213         unsigned long flags;
214         unsigned int val;
215
216         spin_lock_irqsave(&syscon_swlock, flags);
217
218         val = __raw_readl(EP93XX_SYSCON_DEVCFG);
219         val &= ~clear_bits;
220         val |= set_bits;
221         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
222         __raw_writel(val, EP93XX_SYSCON_DEVCFG);
223
224         spin_unlock_irqrestore(&syscon_swlock, flags);
225 }
226 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
227
228 /**
229  * ep93xx_chip_revision() - returns the EP93xx chip revision
230  *
231  * See <mach/platform.h> for more information.
232  */
233 unsigned int ep93xx_chip_revision(void)
234 {
235         unsigned int v;
236
237         v = __raw_readl(EP93XX_SYSCON_SYSCFG);
238         v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
239         v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
240         return v;
241 }
242
243 /*************************************************************************
244  * EP93xx peripheral handling
245  *************************************************************************/
246 #define EP93XX_UART_MCR_OFFSET          (0x0100)
247
248 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
249                                   void __iomem *base, unsigned int mctrl)
250 {
251         unsigned int mcr;
252
253         mcr = 0;
254         if (mctrl & TIOCM_RTS)
255                 mcr |= 2;
256         if (mctrl & TIOCM_DTR)
257                 mcr |= 1;
258
259         __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
260 }
261
262 static struct amba_pl010_data ep93xx_uart_data = {
263         .set_mctrl      = ep93xx_uart_set_mctrl,
264 };
265
266 static struct amba_device uart1_device = {
267         .dev            = {
268                 .init_name      = "apb:uart1",
269                 .platform_data  = &ep93xx_uart_data,
270         },
271         .res            = {
272                 .start  = EP93XX_UART1_PHYS_BASE,
273                 .end    = EP93XX_UART1_PHYS_BASE + 0x0fff,
274                 .flags  = IORESOURCE_MEM,
275         },
276         .irq            = { IRQ_EP93XX_UART1, NO_IRQ },
277         .periphid       = 0x00041010,
278 };
279
280 static struct amba_device uart2_device = {
281         .dev            = {
282                 .init_name      = "apb:uart2",
283                 .platform_data  = &ep93xx_uart_data,
284         },
285         .res            = {
286                 .start  = EP93XX_UART2_PHYS_BASE,
287                 .end    = EP93XX_UART2_PHYS_BASE + 0x0fff,
288                 .flags  = IORESOURCE_MEM,
289         },
290         .irq            = { IRQ_EP93XX_UART2, NO_IRQ },
291         .periphid       = 0x00041010,
292 };
293
294 static struct amba_device uart3_device = {
295         .dev            = {
296                 .init_name      = "apb:uart3",
297                 .platform_data  = &ep93xx_uart_data,
298         },
299         .res            = {
300                 .start  = EP93XX_UART3_PHYS_BASE,
301                 .end    = EP93XX_UART3_PHYS_BASE + 0x0fff,
302                 .flags  = IORESOURCE_MEM,
303         },
304         .irq            = { IRQ_EP93XX_UART3, NO_IRQ },
305         .periphid       = 0x00041010,
306 };
307
308
309 static struct resource ep93xx_rtc_resource[] = {
310         {
311                 .start          = EP93XX_RTC_PHYS_BASE,
312                 .end            = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
313                 .flags          = IORESOURCE_MEM,
314         },
315 };
316
317 static struct platform_device ep93xx_rtc_device = {
318         .name           = "ep93xx-rtc",
319         .id             = -1,
320         .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
321         .resource       = ep93xx_rtc_resource,
322 };
323
324
325 static struct resource ep93xx_ohci_resources[] = {
326         [0] = {
327                 .start  = EP93XX_USB_PHYS_BASE,
328                 .end    = EP93XX_USB_PHYS_BASE + 0x0fff,
329                 .flags  = IORESOURCE_MEM,
330         },
331         [1] = {
332                 .start  = IRQ_EP93XX_USB,
333                 .end    = IRQ_EP93XX_USB,
334                 .flags  = IORESOURCE_IRQ,
335         },
336 };
337
338
339 static struct platform_device ep93xx_ohci_device = {
340         .name           = "ep93xx-ohci",
341         .id             = -1,
342         .dev            = {
343                 .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
344                 .coherent_dma_mask      = DMA_BIT_MASK(32),
345         },
346         .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
347         .resource       = ep93xx_ohci_resources,
348 };
349
350
351 /*************************************************************************
352  * EP93xx physmap'ed flash
353  *************************************************************************/
354 static struct physmap_flash_data ep93xx_flash_data;
355
356 static struct resource ep93xx_flash_resource = {
357         .flags          = IORESOURCE_MEM,
358 };
359
360 static struct platform_device ep93xx_flash = {
361         .name           = "physmap-flash",
362         .id             = 0,
363         .dev            = {
364                 .platform_data  = &ep93xx_flash_data,
365         },
366         .num_resources  = 1,
367         .resource       = &ep93xx_flash_resource,
368 };
369
370 /**
371  * ep93xx_register_flash() - Register the external flash device.
372  * @width:      bank width in octets
373  * @start:      resource start address
374  * @size:       resource size
375  */
376 void __init ep93xx_register_flash(unsigned int width,
377                                   resource_size_t start, resource_size_t size)
378 {
379         ep93xx_flash_data.width         = width;
380
381         ep93xx_flash_resource.start     = start;
382         ep93xx_flash_resource.end       = start + size - 1;
383
384         platform_device_register(&ep93xx_flash);
385 }
386
387
388 /*************************************************************************
389  * EP93xx ethernet peripheral handling
390  *************************************************************************/
391 static struct ep93xx_eth_data ep93xx_eth_data;
392
393 static struct resource ep93xx_eth_resource[] = {
394         {
395                 .start  = EP93XX_ETHERNET_PHYS_BASE,
396                 .end    = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
397                 .flags  = IORESOURCE_MEM,
398         }, {
399                 .start  = IRQ_EP93XX_ETHERNET,
400                 .end    = IRQ_EP93XX_ETHERNET,
401                 .flags  = IORESOURCE_IRQ,
402         }
403 };
404
405 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
406
407 static struct platform_device ep93xx_eth_device = {
408         .name           = "ep93xx-eth",
409         .id             = -1,
410         .dev            = {
411                 .platform_data          = &ep93xx_eth_data,
412                 .coherent_dma_mask      = DMA_BIT_MASK(32),
413                 .dma_mask               = &ep93xx_eth_dma_mask,
414         },
415         .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
416         .resource       = ep93xx_eth_resource,
417 };
418
419 /**
420  * ep93xx_register_eth - Register the built-in ethernet platform device.
421  * @data:       platform specific ethernet configuration (__initdata)
422  * @copy_addr:  flag indicating that the MAC address should be copied
423  *              from the IndAd registers (as programmed by the bootloader)
424  */
425 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
426 {
427         if (copy_addr)
428                 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
429
430         ep93xx_eth_data = *data;
431         platform_device_register(&ep93xx_eth_device);
432 }
433
434
435 /*************************************************************************
436  * EP93xx i2c peripheral handling
437  *************************************************************************/
438 static struct i2c_gpio_platform_data ep93xx_i2c_data;
439
440 static struct platform_device ep93xx_i2c_device = {
441         .name           = "i2c-gpio",
442         .id             = 0,
443         .dev            = {
444                 .platform_data  = &ep93xx_i2c_data,
445         },
446 };
447
448 /**
449  * ep93xx_register_i2c - Register the i2c platform device.
450  * @data:       platform specific i2c-gpio configuration (__initdata)
451  * @devices:    platform specific i2c bus device information (__initdata)
452  * @num:        the number of devices on the i2c bus
453  */
454 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
455                                 struct i2c_board_info *devices, int num)
456 {
457         /*
458          * Set the EEPROM interface pin drive type control.
459          * Defines the driver type for the EECLK and EEDAT pins as either
460          * open drain, which will require an external pull-up, or a normal
461          * CMOS driver.
462          */
463         if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
464                 pr_warning("sda != EEDAT, open drain has no effect\n");
465         if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
466                 pr_warning("scl != EECLK, open drain has no effect\n");
467
468         __raw_writel((data->sda_is_open_drain << 1) |
469                      (data->scl_is_open_drain << 0),
470                      EP93XX_GPIO_EEDRIVE);
471
472         ep93xx_i2c_data = *data;
473         i2c_register_board_info(0, devices, num);
474         platform_device_register(&ep93xx_i2c_device);
475 }
476
477 /*************************************************************************
478  * EP93xx SPI peripheral handling
479  *************************************************************************/
480 static struct ep93xx_spi_info ep93xx_spi_master_data;
481
482 static struct resource ep93xx_spi_resources[] = {
483         {
484                 .start  = EP93XX_SPI_PHYS_BASE,
485                 .end    = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
486                 .flags  = IORESOURCE_MEM,
487         },
488         {
489                 .start  = IRQ_EP93XX_SSP,
490                 .end    = IRQ_EP93XX_SSP,
491                 .flags  = IORESOURCE_IRQ,
492         },
493 };
494
495 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
496
497 static struct platform_device ep93xx_spi_device = {
498         .name           = "ep93xx-spi",
499         .id             = 0,
500         .dev            = {
501                 .platform_data          = &ep93xx_spi_master_data,
502                 .coherent_dma_mask      = DMA_BIT_MASK(32),
503                 .dma_mask               = &ep93xx_spi_dma_mask,
504         },
505         .num_resources  = ARRAY_SIZE(ep93xx_spi_resources),
506         .resource       = ep93xx_spi_resources,
507 };
508
509 /**
510  * ep93xx_register_spi() - registers spi platform device
511  * @info: ep93xx board specific spi master info (__initdata)
512  * @devices: SPI devices to register (__initdata)
513  * @num: number of SPI devices to register
514  *
515  * This function registers platform device for the EP93xx SPI controller and
516  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
517  */
518 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
519                                 struct spi_board_info *devices, int num)
520 {
521         /*
522          * When SPI is used, we need to make sure that I2S is muxed off from
523          * SPI pins.
524          */
525         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
526
527         ep93xx_spi_master_data = *info;
528         spi_register_board_info(devices, num);
529         platform_device_register(&ep93xx_spi_device);
530 }
531
532 /*************************************************************************
533  * EP93xx LEDs
534  *************************************************************************/
535 static struct gpio_led ep93xx_led_pins[] = {
536         {
537                 .name   = "platform:grled",
538                 .gpio   = EP93XX_GPIO_LINE_GRLED,
539         }, {
540                 .name   = "platform:rdled",
541                 .gpio   = EP93XX_GPIO_LINE_RDLED,
542         },
543 };
544
545 static struct gpio_led_platform_data ep93xx_led_data = {
546         .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
547         .leds           = ep93xx_led_pins,
548 };
549
550 static struct platform_device ep93xx_leds = {
551         .name           = "leds-gpio",
552         .id             = -1,
553         .dev            = {
554                 .platform_data  = &ep93xx_led_data,
555         },
556 };
557
558
559 /*************************************************************************
560  * EP93xx pwm peripheral handling
561  *************************************************************************/
562 static struct resource ep93xx_pwm0_resource[] = {
563         {
564                 .start  = EP93XX_PWM_PHYS_BASE,
565                 .end    = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
566                 .flags  = IORESOURCE_MEM,
567         },
568 };
569
570 static struct platform_device ep93xx_pwm0_device = {
571         .name           = "ep93xx-pwm",
572         .id             = 0,
573         .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
574         .resource       = ep93xx_pwm0_resource,
575 };
576
577 static struct resource ep93xx_pwm1_resource[] = {
578         {
579                 .start  = EP93XX_PWM_PHYS_BASE + 0x20,
580                 .end    = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
581                 .flags  = IORESOURCE_MEM,
582         },
583 };
584
585 static struct platform_device ep93xx_pwm1_device = {
586         .name           = "ep93xx-pwm",
587         .id             = 1,
588         .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
589         .resource       = ep93xx_pwm1_resource,
590 };
591
592 void __init ep93xx_register_pwm(int pwm0, int pwm1)
593 {
594         if (pwm0)
595                 platform_device_register(&ep93xx_pwm0_device);
596
597         /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
598         if (pwm1)
599                 platform_device_register(&ep93xx_pwm1_device);
600 }
601
602 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
603 {
604         int err;
605
606         if (pdev->id == 0) {
607                 err = 0;
608         } else if (pdev->id == 1) {
609                 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
610                                    dev_name(&pdev->dev));
611                 if (err)
612                         return err;
613                 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
614                 if (err)
615                         goto fail;
616
617                 /* PWM 1 output on EGPIO[14] */
618                 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
619         } else {
620                 err = -ENODEV;
621         }
622
623         return err;
624
625 fail:
626         gpio_free(EP93XX_GPIO_LINE_EGPIO14);
627         return err;
628 }
629 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
630
631 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
632 {
633         if (pdev->id == 1) {
634                 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
635                 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
636
637                 /* EGPIO[14] used for GPIO */
638                 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
639         }
640 }
641 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
642
643
644 /*************************************************************************
645  * EP93xx video peripheral handling
646  *************************************************************************/
647 static struct ep93xxfb_mach_info ep93xxfb_data;
648
649 static struct resource ep93xx_fb_resource[] = {
650         {
651                 .start          = EP93XX_RASTER_PHYS_BASE,
652                 .end            = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
653                 .flags          = IORESOURCE_MEM,
654         },
655 };
656
657 static struct platform_device ep93xx_fb_device = {
658         .name                   = "ep93xx-fb",
659         .id                     = -1,
660         .dev                    = {
661                 .platform_data          = &ep93xxfb_data,
662                 .coherent_dma_mask      = DMA_BIT_MASK(32),
663                 .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
664         },
665         .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
666         .resource               = ep93xx_fb_resource,
667 };
668
669 static struct platform_device ep93xx_bl_device = {
670         .name           = "ep93xx-bl",
671         .id             = -1,
672 };
673
674 /**
675  * ep93xx_register_fb - Register the framebuffer platform device.
676  * @data:       platform specific framebuffer configuration (__initdata)
677  */
678 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
679 {
680         ep93xxfb_data = *data;
681         platform_device_register(&ep93xx_fb_device);
682         platform_device_register(&ep93xx_bl_device);
683 }
684
685
686 /*************************************************************************
687  * EP93xx matrix keypad peripheral handling
688  *************************************************************************/
689 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
690
691 static struct resource ep93xx_keypad_resource[] = {
692         {
693                 .start  = EP93XX_KEY_MATRIX_PHYS_BASE,
694                 .end    = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
695                 .flags  = IORESOURCE_MEM,
696         }, {
697                 .start  = IRQ_EP93XX_KEY,
698                 .end    = IRQ_EP93XX_KEY,
699                 .flags  = IORESOURCE_IRQ,
700         },
701 };
702
703 static struct platform_device ep93xx_keypad_device = {
704         .name           = "ep93xx-keypad",
705         .id             = -1,
706         .dev            = {
707                 .platform_data  = &ep93xx_keypad_data,
708         },
709         .num_resources  = ARRAY_SIZE(ep93xx_keypad_resource),
710         .resource       = ep93xx_keypad_resource,
711 };
712
713 /**
714  * ep93xx_register_keypad - Register the keypad platform device.
715  * @data:       platform specific keypad configuration (__initdata)
716  */
717 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
718 {
719         ep93xx_keypad_data = *data;
720         platform_device_register(&ep93xx_keypad_device);
721 }
722
723 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
724 {
725         int err;
726         int i;
727
728         for (i = 0; i < 8; i++) {
729                 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
730                 if (err)
731                         goto fail_gpio_c;
732                 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
733                 if (err)
734                         goto fail_gpio_d;
735         }
736
737         /* Enable the keypad controller; GPIO ports C and D used for keypad */
738         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
739                                  EP93XX_SYSCON_DEVCFG_GONK);
740
741         return 0;
742
743 fail_gpio_d:
744         gpio_free(EP93XX_GPIO_LINE_C(i));
745 fail_gpio_c:
746         for ( ; i >= 0; --i) {
747                 gpio_free(EP93XX_GPIO_LINE_C(i));
748                 gpio_free(EP93XX_GPIO_LINE_D(i));
749         }
750         return err;
751 }
752 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
753
754 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
755 {
756         int i;
757
758         for (i = 0; i < 8; i++) {
759                 gpio_free(EP93XX_GPIO_LINE_C(i));
760                 gpio_free(EP93XX_GPIO_LINE_D(i));
761         }
762
763         /* Disable the keypad controller; GPIO ports C and D used for GPIO */
764         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
765                                EP93XX_SYSCON_DEVCFG_GONK);
766 }
767 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
768
769 /*************************************************************************
770  * EP93xx I2S audio peripheral handling
771  *************************************************************************/
772 static struct resource ep93xx_i2s_resource[] = {
773         {
774                 .start  = EP93XX_I2S_PHYS_BASE,
775                 .end    = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
776                 .flags  = IORESOURCE_MEM,
777         },
778 };
779
780 static struct platform_device ep93xx_i2s_device = {
781         .name           = "ep93xx-i2s",
782         .id             = -1,
783         .num_resources  = ARRAY_SIZE(ep93xx_i2s_resource),
784         .resource       = ep93xx_i2s_resource,
785 };
786
787 static struct platform_device ep93xx_pcm_device = {
788         .name           = "ep93xx-pcm-audio",
789         .id             = -1,
790 };
791
792 void __init ep93xx_register_i2s(void)
793 {
794         platform_device_register(&ep93xx_i2s_device);
795         platform_device_register(&ep93xx_pcm_device);
796 }
797
798 #define EP93XX_SYSCON_DEVCFG_I2S_MASK   (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
799                                          EP93XX_SYSCON_DEVCFG_I2SONAC97)
800
801 #define EP93XX_I2SCLKDIV_MASK           (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
802                                          EP93XX_SYSCON_I2SCLKDIV_SPOL)
803
804 int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
805 {
806         unsigned val;
807
808         /* Sanity check */
809         if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
810                 return -EINVAL;
811         if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
812                 return -EINVAL;
813
814         /* Must have only one of I2SONSSP/I2SONAC97 set */
815         if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
816             (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
817                 return -EINVAL;
818
819         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
820         ep93xx_devcfg_set_bits(i2s_pins);
821
822         /*
823          * This is potentially racy with the clock api for i2s_mclk, sclk and 
824          * lrclk. Since the i2s driver is the only user of those clocks we
825          * rely on it to prevent parallel use of this function and the 
826          * clock api for the i2s clocks.
827          */
828         val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
829         val &= ~EP93XX_I2SCLKDIV_MASK;
830         val |= i2s_config;
831         ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
832
833         return 0;
834 }
835 EXPORT_SYMBOL(ep93xx_i2s_acquire);
836
837 void ep93xx_i2s_release(void)
838 {
839         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
840 }
841 EXPORT_SYMBOL(ep93xx_i2s_release);
842
843 /*************************************************************************
844  * EP93xx AC97 audio peripheral handling
845  *************************************************************************/
846 static struct resource ep93xx_ac97_resources[] = {
847         {
848                 .start  = EP93XX_AAC_PHYS_BASE,
849                 .end    = EP93XX_AAC_PHYS_BASE + 0xac - 1,
850                 .flags  = IORESOURCE_MEM,
851         },
852         {
853                 .start  = IRQ_EP93XX_AACINTR,
854                 .end    = IRQ_EP93XX_AACINTR,
855                 .flags  = IORESOURCE_IRQ,
856         },
857 };
858
859 static struct platform_device ep93xx_ac97_device = {
860         .name           = "ep93xx-ac97",
861         .id             = -1,
862         .num_resources  = ARRAY_SIZE(ep93xx_ac97_resources),
863         .resource       = ep93xx_ac97_resources,
864 };
865
866 void __init ep93xx_register_ac97(void)
867 {
868         /*
869          * Make sure that the AC97 pins are not used by I2S.
870          */
871         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
872
873         platform_device_register(&ep93xx_ac97_device);
874         platform_device_register(&ep93xx_pcm_device);
875 }
876
877 extern void ep93xx_gpio_init(void);
878
879 void __init ep93xx_init_devices(void)
880 {
881         /* Disallow access to MaverickCrunch initially */
882         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
883
884         ep93xx_gpio_init();
885
886         amba_device_register(&uart1_device, &iomem_resource);
887         amba_device_register(&uart2_device, &iomem_resource);
888         amba_device_register(&uart3_device, &iomem_resource);
889
890         platform_device_register(&ep93xx_rtc_device);
891         platform_device_register(&ep93xx_ohci_device);
892         platform_device_register(&ep93xx_leds);
893 }