Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas...
[linux-2.6.git] / arch / arm / mach-davinci / devices-da8xx.c
1 /*
2  * DA8XX/OMAP L1XX platform device data
3  *
4  * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
5  * Derived from code that was:
6  *      Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  */
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/serial_8250.h>
17
18 #include <mach/cputype.h>
19 #include <mach/common.h>
20 #include <mach/time.h>
21 #include <mach/da8xx.h>
22 #include <mach/cpuidle.h>
23
24 #include "clock.h"
25
26 #define DA8XX_TPCC_BASE                 0x01c00000
27 #define DA850_MMCSD1_BASE               0x01e1b000
28 #define DA850_TPCC1_BASE                0x01e30000
29 #define DA8XX_TPTC0_BASE                0x01c08000
30 #define DA8XX_TPTC1_BASE                0x01c08400
31 #define DA850_TPTC2_BASE                0x01e38000
32 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
33 #define DA8XX_I2C0_BASE                 0x01c22000
34 #define DA8XX_RTC_BASE                  0x01C23000
35 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
36 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
37 #define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
38 #define DA8XX_EMAC_MDIO_BASE            0x01e24000
39 #define DA8XX_GPIO_BASE                 0x01e26000
40 #define DA8XX_I2C1_BASE                 0x01e28000
41 #define DA8XX_SPI0_BASE                 0x01c41000
42 #define DA830_SPI1_BASE                 0x01e12000
43 #define DA850_SPI1_BASE                 0x01f0e000
44
45 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
46 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
47 #define DA8XX_EMAC_RAM_OFFSET           0x0000
48 #define DA8XX_EMAC_CTRL_RAM_SIZE        SZ_8K
49
50 #define DA8XX_DMA_SPI0_RX       EDMA_CTLR_CHAN(0, 14)
51 #define DA8XX_DMA_SPI0_TX       EDMA_CTLR_CHAN(0, 15)
52 #define DA8XX_DMA_MMCSD0_RX     EDMA_CTLR_CHAN(0, 16)
53 #define DA8XX_DMA_MMCSD0_TX     EDMA_CTLR_CHAN(0, 17)
54 #define DA8XX_DMA_SPI1_RX       EDMA_CTLR_CHAN(0, 18)
55 #define DA8XX_DMA_SPI1_TX       EDMA_CTLR_CHAN(0, 19)
56 #define DA850_DMA_MMCSD1_RX     EDMA_CTLR_CHAN(1, 28)
57 #define DA850_DMA_MMCSD1_TX     EDMA_CTLR_CHAN(1, 29)
58
59 void __iomem *da8xx_syscfg0_base;
60 void __iomem *da8xx_syscfg1_base;
61
62 static struct plat_serial8250_port da8xx_serial_pdata[] = {
63         {
64                 .mapbase        = DA8XX_UART0_BASE,
65                 .irq            = IRQ_DA8XX_UARTINT0,
66                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
67                                         UPF_IOREMAP,
68                 .iotype         = UPIO_MEM,
69                 .regshift       = 2,
70         },
71         {
72                 .mapbase        = DA8XX_UART1_BASE,
73                 .irq            = IRQ_DA8XX_UARTINT1,
74                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
75                                         UPF_IOREMAP,
76                 .iotype         = UPIO_MEM,
77                 .regshift       = 2,
78         },
79         {
80                 .mapbase        = DA8XX_UART2_BASE,
81                 .irq            = IRQ_DA8XX_UARTINT2,
82                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
83                                         UPF_IOREMAP,
84                 .iotype         = UPIO_MEM,
85                 .regshift       = 2,
86         },
87         {
88                 .flags  = 0,
89         },
90 };
91
92 struct platform_device da8xx_serial_device = {
93         .name   = "serial8250",
94         .id     = PLAT8250_DEV_PLATFORM,
95         .dev    = {
96                 .platform_data  = da8xx_serial_pdata,
97         },
98 };
99
100 static const s8 da8xx_queue_tc_mapping[][2] = {
101         /* {event queue no, TC no} */
102         {0, 0},
103         {1, 1},
104         {-1, -1}
105 };
106
107 static const s8 da8xx_queue_priority_mapping[][2] = {
108         /* {event queue no, Priority} */
109         {0, 3},
110         {1, 7},
111         {-1, -1}
112 };
113
114 static const s8 da850_queue_tc_mapping[][2] = {
115         /* {event queue no, TC no} */
116         {0, 0},
117         {-1, -1}
118 };
119
120 static const s8 da850_queue_priority_mapping[][2] = {
121         /* {event queue no, Priority} */
122         {0, 3},
123         {-1, -1}
124 };
125
126 static struct edma_soc_info da830_edma_cc0_info = {
127         .n_channel              = 32,
128         .n_region               = 4,
129         .n_slot                 = 128,
130         .n_tc                   = 2,
131         .n_cc                   = 1,
132         .queue_tc_mapping       = da8xx_queue_tc_mapping,
133         .queue_priority_mapping = da8xx_queue_priority_mapping,
134 };
135
136 static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
137         &da830_edma_cc0_info,
138 };
139
140 static struct edma_soc_info da850_edma_cc_info[] = {
141         {
142                 .n_channel              = 32,
143                 .n_region               = 4,
144                 .n_slot                 = 128,
145                 .n_tc                   = 2,
146                 .n_cc                   = 1,
147                 .queue_tc_mapping       = da8xx_queue_tc_mapping,
148                 .queue_priority_mapping = da8xx_queue_priority_mapping,
149         },
150         {
151                 .n_channel              = 32,
152                 .n_region               = 4,
153                 .n_slot                 = 128,
154                 .n_tc                   = 1,
155                 .n_cc                   = 1,
156                 .queue_tc_mapping       = da850_queue_tc_mapping,
157                 .queue_priority_mapping = da850_queue_priority_mapping,
158         },
159 };
160
161 static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
162         &da850_edma_cc_info[0],
163         &da850_edma_cc_info[1],
164 };
165
166 static struct resource da830_edma_resources[] = {
167         {
168                 .name   = "edma_cc0",
169                 .start  = DA8XX_TPCC_BASE,
170                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
171                 .flags  = IORESOURCE_MEM,
172         },
173         {
174                 .name   = "edma_tc0",
175                 .start  = DA8XX_TPTC0_BASE,
176                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
177                 .flags  = IORESOURCE_MEM,
178         },
179         {
180                 .name   = "edma_tc1",
181                 .start  = DA8XX_TPTC1_BASE,
182                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
183                 .flags  = IORESOURCE_MEM,
184         },
185         {
186                 .name   = "edma0",
187                 .start  = IRQ_DA8XX_CCINT0,
188                 .flags  = IORESOURCE_IRQ,
189         },
190         {
191                 .name   = "edma0_err",
192                 .start  = IRQ_DA8XX_CCERRINT,
193                 .flags  = IORESOURCE_IRQ,
194         },
195 };
196
197 static struct resource da850_edma_resources[] = {
198         {
199                 .name   = "edma_cc0",
200                 .start  = DA8XX_TPCC_BASE,
201                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
202                 .flags  = IORESOURCE_MEM,
203         },
204         {
205                 .name   = "edma_tc0",
206                 .start  = DA8XX_TPTC0_BASE,
207                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
208                 .flags  = IORESOURCE_MEM,
209         },
210         {
211                 .name   = "edma_tc1",
212                 .start  = DA8XX_TPTC1_BASE,
213                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
214                 .flags  = IORESOURCE_MEM,
215         },
216         {
217                 .name   = "edma_cc1",
218                 .start  = DA850_TPCC1_BASE,
219                 .end    = DA850_TPCC1_BASE + SZ_32K - 1,
220                 .flags  = IORESOURCE_MEM,
221         },
222         {
223                 .name   = "edma_tc2",
224                 .start  = DA850_TPTC2_BASE,
225                 .end    = DA850_TPTC2_BASE + SZ_1K - 1,
226                 .flags  = IORESOURCE_MEM,
227         },
228         {
229                 .name   = "edma0",
230                 .start  = IRQ_DA8XX_CCINT0,
231                 .flags  = IORESOURCE_IRQ,
232         },
233         {
234                 .name   = "edma0_err",
235                 .start  = IRQ_DA8XX_CCERRINT,
236                 .flags  = IORESOURCE_IRQ,
237         },
238         {
239                 .name   = "edma1",
240                 .start  = IRQ_DA850_CCINT1,
241                 .flags  = IORESOURCE_IRQ,
242         },
243         {
244                 .name   = "edma1_err",
245                 .start  = IRQ_DA850_CCERRINT1,
246                 .flags  = IORESOURCE_IRQ,
247         },
248 };
249
250 static struct platform_device da830_edma_device = {
251         .name           = "edma",
252         .id             = -1,
253         .dev = {
254                 .platform_data = da830_edma_info,
255         },
256         .num_resources  = ARRAY_SIZE(da830_edma_resources),
257         .resource       = da830_edma_resources,
258 };
259
260 static struct platform_device da850_edma_device = {
261         .name           = "edma",
262         .id             = -1,
263         .dev = {
264                 .platform_data = da850_edma_info,
265         },
266         .num_resources  = ARRAY_SIZE(da850_edma_resources),
267         .resource       = da850_edma_resources,
268 };
269
270 int __init da830_register_edma(struct edma_rsv_info *rsv)
271 {
272         da830_edma_cc0_info.rsv = rsv;
273
274         return platform_device_register(&da830_edma_device);
275 }
276
277 int __init da850_register_edma(struct edma_rsv_info *rsv[2])
278 {
279         if (rsv) {
280                 da850_edma_cc_info[0].rsv = rsv[0];
281                 da850_edma_cc_info[1].rsv = rsv[1];
282         }
283
284         return platform_device_register(&da850_edma_device);
285 }
286
287 static struct resource da8xx_i2c_resources0[] = {
288         {
289                 .start  = DA8XX_I2C0_BASE,
290                 .end    = DA8XX_I2C0_BASE + SZ_4K - 1,
291                 .flags  = IORESOURCE_MEM,
292         },
293         {
294                 .start  = IRQ_DA8XX_I2CINT0,
295                 .end    = IRQ_DA8XX_I2CINT0,
296                 .flags  = IORESOURCE_IRQ,
297         },
298 };
299
300 static struct platform_device da8xx_i2c_device0 = {
301         .name           = "i2c_davinci",
302         .id             = 1,
303         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources0),
304         .resource       = da8xx_i2c_resources0,
305 };
306
307 static struct resource da8xx_i2c_resources1[] = {
308         {
309                 .start  = DA8XX_I2C1_BASE,
310                 .end    = DA8XX_I2C1_BASE + SZ_4K - 1,
311                 .flags  = IORESOURCE_MEM,
312         },
313         {
314                 .start  = IRQ_DA8XX_I2CINT1,
315                 .end    = IRQ_DA8XX_I2CINT1,
316                 .flags  = IORESOURCE_IRQ,
317         },
318 };
319
320 static struct platform_device da8xx_i2c_device1 = {
321         .name           = "i2c_davinci",
322         .id             = 2,
323         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources1),
324         .resource       = da8xx_i2c_resources1,
325 };
326
327 int __init da8xx_register_i2c(int instance,
328                 struct davinci_i2c_platform_data *pdata)
329 {
330         struct platform_device *pdev;
331
332         if (instance == 0)
333                 pdev = &da8xx_i2c_device0;
334         else if (instance == 1)
335                 pdev = &da8xx_i2c_device1;
336         else
337                 return -EINVAL;
338
339         pdev->dev.platform_data = pdata;
340         return platform_device_register(pdev);
341 }
342
343 static struct resource da8xx_watchdog_resources[] = {
344         {
345                 .start  = DA8XX_WDOG_BASE,
346                 .end    = DA8XX_WDOG_BASE + SZ_4K - 1,
347                 .flags  = IORESOURCE_MEM,
348         },
349 };
350
351 struct platform_device da8xx_wdt_device = {
352         .name           = "watchdog",
353         .id             = -1,
354         .num_resources  = ARRAY_SIZE(da8xx_watchdog_resources),
355         .resource       = da8xx_watchdog_resources,
356 };
357
358 int __init da8xx_register_watchdog(void)
359 {
360         return platform_device_register(&da8xx_wdt_device);
361 }
362
363 static struct resource da8xx_emac_resources[] = {
364         {
365                 .start  = DA8XX_EMAC_CPPI_PORT_BASE,
366                 .end    = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
367                 .flags  = IORESOURCE_MEM,
368         },
369         {
370                 .start  = IRQ_DA8XX_C0_RX_THRESH_PULSE,
371                 .end    = IRQ_DA8XX_C0_RX_THRESH_PULSE,
372                 .flags  = IORESOURCE_IRQ,
373         },
374         {
375                 .start  = IRQ_DA8XX_C0_RX_PULSE,
376                 .end    = IRQ_DA8XX_C0_RX_PULSE,
377                 .flags  = IORESOURCE_IRQ,
378         },
379         {
380                 .start  = IRQ_DA8XX_C0_TX_PULSE,
381                 .end    = IRQ_DA8XX_C0_TX_PULSE,
382                 .flags  = IORESOURCE_IRQ,
383         },
384         {
385                 .start  = IRQ_DA8XX_C0_MISC_PULSE,
386                 .end    = IRQ_DA8XX_C0_MISC_PULSE,
387                 .flags  = IORESOURCE_IRQ,
388         },
389 };
390
391 struct emac_platform_data da8xx_emac_pdata = {
392         .ctrl_reg_offset        = DA8XX_EMAC_CTRL_REG_OFFSET,
393         .ctrl_mod_reg_offset    = DA8XX_EMAC_MOD_REG_OFFSET,
394         .ctrl_ram_offset        = DA8XX_EMAC_RAM_OFFSET,
395         .ctrl_ram_size          = DA8XX_EMAC_CTRL_RAM_SIZE,
396         .version                = EMAC_VERSION_2,
397 };
398
399 static struct platform_device da8xx_emac_device = {
400         .name           = "davinci_emac",
401         .id             = 1,
402         .dev = {
403                 .platform_data  = &da8xx_emac_pdata,
404         },
405         .num_resources  = ARRAY_SIZE(da8xx_emac_resources),
406         .resource       = da8xx_emac_resources,
407 };
408
409 static struct resource da8xx_mdio_resources[] = {
410         {
411                 .start  = DA8XX_EMAC_MDIO_BASE,
412                 .end    = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
413                 .flags  = IORESOURCE_MEM,
414         },
415 };
416
417 static struct platform_device da8xx_mdio_device = {
418         .name           = "davinci_mdio",
419         .id             = 0,
420         .num_resources  = ARRAY_SIZE(da8xx_mdio_resources),
421         .resource       = da8xx_mdio_resources,
422 };
423
424 int __init da8xx_register_emac(void)
425 {
426         int ret;
427
428         ret = platform_device_register(&da8xx_mdio_device);
429         if (ret < 0)
430                 return ret;
431         ret = platform_device_register(&da8xx_emac_device);
432         if (ret < 0)
433                 return ret;
434         ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
435                             NULL, &da8xx_emac_device.dev);
436         return ret;
437 }
438
439 static struct resource da830_mcasp1_resources[] = {
440         {
441                 .name   = "mcasp1",
442                 .start  = DAVINCI_DA830_MCASP1_REG_BASE,
443                 .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
444                 .flags  = IORESOURCE_MEM,
445         },
446         /* TX event */
447         {
448                 .start  = DAVINCI_DA830_DMA_MCASP1_AXEVT,
449                 .end    = DAVINCI_DA830_DMA_MCASP1_AXEVT,
450                 .flags  = IORESOURCE_DMA,
451         },
452         /* RX event */
453         {
454                 .start  = DAVINCI_DA830_DMA_MCASP1_AREVT,
455                 .end    = DAVINCI_DA830_DMA_MCASP1_AREVT,
456                 .flags  = IORESOURCE_DMA,
457         },
458 };
459
460 static struct platform_device da830_mcasp1_device = {
461         .name           = "davinci-mcasp",
462         .id             = 1,
463         .num_resources  = ARRAY_SIZE(da830_mcasp1_resources),
464         .resource       = da830_mcasp1_resources,
465 };
466
467 static struct resource da850_mcasp_resources[] = {
468         {
469                 .name   = "mcasp",
470                 .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
471                 .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
472                 .flags  = IORESOURCE_MEM,
473         },
474         /* TX event */
475         {
476                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
477                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
478                 .flags  = IORESOURCE_DMA,
479         },
480         /* RX event */
481         {
482                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
483                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
484                 .flags  = IORESOURCE_DMA,
485         },
486 };
487
488 static struct platform_device da850_mcasp_device = {
489         .name           = "davinci-mcasp",
490         .id             = 0,
491         .num_resources  = ARRAY_SIZE(da850_mcasp_resources),
492         .resource       = da850_mcasp_resources,
493 };
494
495 struct platform_device davinci_pcm_device = {
496         .name   = "davinci-pcm-audio",
497         .id     = -1,
498 };
499
500 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
501 {
502         platform_device_register(&davinci_pcm_device);
503
504         /* DA830/OMAP-L137 has 3 instances of McASP */
505         if (cpu_is_davinci_da830() && id == 1) {
506                 da830_mcasp1_device.dev.platform_data = pdata;
507                 platform_device_register(&da830_mcasp1_device);
508         } else if (cpu_is_davinci_da850()) {
509                 da850_mcasp_device.dev.platform_data = pdata;
510                 platform_device_register(&da850_mcasp_device);
511         }
512 }
513
514 static const struct display_panel disp_panel = {
515         QVGA,
516         16,
517         16,
518         COLOR_ACTIVE,
519 };
520
521 static struct lcd_ctrl_config lcd_cfg = {
522         &disp_panel,
523         .ac_bias                = 255,
524         .ac_bias_intrpt         = 0,
525         .dma_burst_sz           = 16,
526         .bpp                    = 16,
527         .fdd                    = 255,
528         .tft_alt_mode           = 0,
529         .stn_565_mode           = 0,
530         .mono_8bit_mode         = 0,
531         .invert_line_clock      = 1,
532         .invert_frm_clock       = 1,
533         .sync_edge              = 0,
534         .sync_ctrl              = 1,
535         .raster_order           = 0,
536 };
537
538 struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
539         .manu_name              = "sharp",
540         .controller_data        = &lcd_cfg,
541         .type                   = "Sharp_LCD035Q3DG01",
542 };
543
544 struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
545         .manu_name              = "sharp",
546         .controller_data        = &lcd_cfg,
547         .type                   = "Sharp_LK043T1DG01",
548 };
549
550 static struct resource da8xx_lcdc_resources[] = {
551         [0] = { /* registers */
552                 .start  = DA8XX_LCD_CNTRL_BASE,
553                 .end    = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
554                 .flags  = IORESOURCE_MEM,
555         },
556         [1] = { /* interrupt */
557                 .start  = IRQ_DA8XX_LCDINT,
558                 .end    = IRQ_DA8XX_LCDINT,
559                 .flags  = IORESOURCE_IRQ,
560         },
561 };
562
563 static struct platform_device da8xx_lcdc_device = {
564         .name           = "da8xx_lcdc",
565         .id             = 0,
566         .num_resources  = ARRAY_SIZE(da8xx_lcdc_resources),
567         .resource       = da8xx_lcdc_resources,
568 };
569
570 int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
571 {
572         da8xx_lcdc_device.dev.platform_data = pdata;
573         return platform_device_register(&da8xx_lcdc_device);
574 }
575
576 static struct resource da8xx_mmcsd0_resources[] = {
577         {               /* registers */
578                 .start  = DA8XX_MMCSD0_BASE,
579                 .end    = DA8XX_MMCSD0_BASE + SZ_4K - 1,
580                 .flags  = IORESOURCE_MEM,
581         },
582         {               /* interrupt */
583                 .start  = IRQ_DA8XX_MMCSDINT0,
584                 .end    = IRQ_DA8XX_MMCSDINT0,
585                 .flags  = IORESOURCE_IRQ,
586         },
587         {               /* DMA RX */
588                 .start  = DA8XX_DMA_MMCSD0_RX,
589                 .end    = DA8XX_DMA_MMCSD0_RX,
590                 .flags  = IORESOURCE_DMA,
591         },
592         {               /* DMA TX */
593                 .start  = DA8XX_DMA_MMCSD0_TX,
594                 .end    = DA8XX_DMA_MMCSD0_TX,
595                 .flags  = IORESOURCE_DMA,
596         },
597 };
598
599 static struct platform_device da8xx_mmcsd0_device = {
600         .name           = "davinci_mmc",
601         .id             = 0,
602         .num_resources  = ARRAY_SIZE(da8xx_mmcsd0_resources),
603         .resource       = da8xx_mmcsd0_resources,
604 };
605
606 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
607 {
608         da8xx_mmcsd0_device.dev.platform_data = config;
609         return platform_device_register(&da8xx_mmcsd0_device);
610 }
611
612 #ifdef CONFIG_ARCH_DAVINCI_DA850
613 static struct resource da850_mmcsd1_resources[] = {
614         {               /* registers */
615                 .start  = DA850_MMCSD1_BASE,
616                 .end    = DA850_MMCSD1_BASE + SZ_4K - 1,
617                 .flags  = IORESOURCE_MEM,
618         },
619         {               /* interrupt */
620                 .start  = IRQ_DA850_MMCSDINT0_1,
621                 .end    = IRQ_DA850_MMCSDINT0_1,
622                 .flags  = IORESOURCE_IRQ,
623         },
624         {               /* DMA RX */
625                 .start  = DA850_DMA_MMCSD1_RX,
626                 .end    = DA850_DMA_MMCSD1_RX,
627                 .flags  = IORESOURCE_DMA,
628         },
629         {               /* DMA TX */
630                 .start  = DA850_DMA_MMCSD1_TX,
631                 .end    = DA850_DMA_MMCSD1_TX,
632                 .flags  = IORESOURCE_DMA,
633         },
634 };
635
636 static struct platform_device da850_mmcsd1_device = {
637         .name           = "davinci_mmc",
638         .id             = 1,
639         .num_resources  = ARRAY_SIZE(da850_mmcsd1_resources),
640         .resource       = da850_mmcsd1_resources,
641 };
642
643 int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
644 {
645         da850_mmcsd1_device.dev.platform_data = config;
646         return platform_device_register(&da850_mmcsd1_device);
647 }
648 #endif
649
650 static struct resource da8xx_rtc_resources[] = {
651         {
652                 .start          = DA8XX_RTC_BASE,
653                 .end            = DA8XX_RTC_BASE + SZ_4K - 1,
654                 .flags          = IORESOURCE_MEM,
655         },
656         { /* timer irq */
657                 .start          = IRQ_DA8XX_RTC,
658                 .end            = IRQ_DA8XX_RTC,
659                 .flags          = IORESOURCE_IRQ,
660         },
661         { /* alarm irq */
662                 .start          = IRQ_DA8XX_RTC,
663                 .end            = IRQ_DA8XX_RTC,
664                 .flags          = IORESOURCE_IRQ,
665         },
666 };
667
668 static struct platform_device da8xx_rtc_device = {
669         .name           = "omap_rtc",
670         .id             = -1,
671         .num_resources  = ARRAY_SIZE(da8xx_rtc_resources),
672         .resource       = da8xx_rtc_resources,
673 };
674
675 int da8xx_register_rtc(void)
676 {
677         int ret;
678         void __iomem *base;
679
680         base = ioremap(DA8XX_RTC_BASE, SZ_4K);
681         if (WARN_ON(!base))
682                 return -ENOMEM;
683
684         /* Unlock the rtc's registers */
685         __raw_writel(0x83e70b13, base + 0x6c);
686         __raw_writel(0x95a4f1e0, base + 0x70);
687
688         iounmap(base);
689
690         ret = platform_device_register(&da8xx_rtc_device);
691         if (!ret)
692                 /* Atleast on DA850, RTC is a wakeup source */
693                 device_init_wakeup(&da8xx_rtc_device.dev, true);
694
695         return ret;
696 }
697
698 static void __iomem *da8xx_ddr2_ctlr_base;
699 void __iomem * __init da8xx_get_mem_ctlr(void)
700 {
701         if (da8xx_ddr2_ctlr_base)
702                 return da8xx_ddr2_ctlr_base;
703
704         da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
705         if (!da8xx_ddr2_ctlr_base)
706                 pr_warning("%s: Unable to map DDR2 controller", __func__);
707
708         return da8xx_ddr2_ctlr_base;
709 }
710
711 static struct resource da8xx_cpuidle_resources[] = {
712         {
713                 .start          = DA8XX_DDR2_CTL_BASE,
714                 .end            = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
715                 .flags          = IORESOURCE_MEM,
716         },
717 };
718
719 /* DA8XX devices support DDR2 power down */
720 static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
721         .ddr2_pdown     = 1,
722 };
723
724
725 static struct platform_device da8xx_cpuidle_device = {
726         .name                   = "cpuidle-davinci",
727         .num_resources          = ARRAY_SIZE(da8xx_cpuidle_resources),
728         .resource               = da8xx_cpuidle_resources,
729         .dev = {
730                 .platform_data  = &da8xx_cpuidle_pdata,
731         },
732 };
733
734 int __init da8xx_register_cpuidle(void)
735 {
736         da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
737
738         return platform_device_register(&da8xx_cpuidle_device);
739 }
740
741 static struct resource da8xx_spi0_resources[] = {
742         [0] = {
743                 .start  = DA8XX_SPI0_BASE,
744                 .end    = DA8XX_SPI0_BASE + SZ_4K - 1,
745                 .flags  = IORESOURCE_MEM,
746         },
747         [1] = {
748                 .start  = IRQ_DA8XX_SPINT0,
749                 .end    = IRQ_DA8XX_SPINT0,
750                 .flags  = IORESOURCE_IRQ,
751         },
752         [2] = {
753                 .start  = DA8XX_DMA_SPI0_RX,
754                 .end    = DA8XX_DMA_SPI0_RX,
755                 .flags  = IORESOURCE_DMA,
756         },
757         [3] = {
758                 .start  = DA8XX_DMA_SPI0_TX,
759                 .end    = DA8XX_DMA_SPI0_TX,
760                 .flags  = IORESOURCE_DMA,
761         },
762 };
763
764 static struct resource da8xx_spi1_resources[] = {
765         [0] = {
766                 .start  = DA830_SPI1_BASE,
767                 .end    = DA830_SPI1_BASE + SZ_4K - 1,
768                 .flags  = IORESOURCE_MEM,
769         },
770         [1] = {
771                 .start  = IRQ_DA8XX_SPINT1,
772                 .end    = IRQ_DA8XX_SPINT1,
773                 .flags  = IORESOURCE_IRQ,
774         },
775         [2] = {
776                 .start  = DA8XX_DMA_SPI1_RX,
777                 .end    = DA8XX_DMA_SPI1_RX,
778                 .flags  = IORESOURCE_DMA,
779         },
780         [3] = {
781                 .start  = DA8XX_DMA_SPI1_TX,
782                 .end    = DA8XX_DMA_SPI1_TX,
783                 .flags  = IORESOURCE_DMA,
784         },
785 };
786
787 struct davinci_spi_platform_data da8xx_spi_pdata[] = {
788         [0] = {
789                 .version        = SPI_VERSION_2,
790                 .intr_line      = 1,
791                 .dma_event_q    = EVENTQ_0,
792         },
793         [1] = {
794                 .version        = SPI_VERSION_2,
795                 .intr_line      = 1,
796                 .dma_event_q    = EVENTQ_0,
797         },
798 };
799
800 static struct platform_device da8xx_spi_device[] = {
801         [0] = {
802                 .name           = "spi_davinci",
803                 .id             = 0,
804                 .num_resources  = ARRAY_SIZE(da8xx_spi0_resources),
805                 .resource       = da8xx_spi0_resources,
806                 .dev            = {
807                         .platform_data = &da8xx_spi_pdata[0],
808                 },
809         },
810         [1] = {
811                 .name           = "spi_davinci",
812                 .id             = 1,
813                 .num_resources  = ARRAY_SIZE(da8xx_spi1_resources),
814                 .resource       = da8xx_spi1_resources,
815                 .dev            = {
816                         .platform_data = &da8xx_spi_pdata[1],
817                 },
818         },
819 };
820
821 int __init da8xx_register_spi(int instance, struct spi_board_info *info,
822                               unsigned len)
823 {
824         int ret;
825
826         if (instance < 0 || instance > 1)
827                 return -EINVAL;
828
829         ret = spi_register_board_info(info, len);
830         if (ret)
831                 pr_warning("%s: failed to register board info for spi %d :"
832                            " %d\n", __func__, instance, ret);
833
834         da8xx_spi_pdata[instance].num_chipselect = len;
835
836         if (instance == 1 && cpu_is_davinci_da850()) {
837                 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
838                 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
839         }
840
841         return platform_device_register(&da8xx_spi_device[instance]);
842 }