Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas...
[linux-2.6.git] / arch / arm / mach-at91 / include / mach / cpu.h
1 /*
2  * arch/arm/mach-at91/include/mach/cpu.h
3  *
4  *  Copyright (C) 2006 SAN People
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12
13 #ifndef __ASM_ARCH_CPU_H
14 #define __ASM_ARCH_CPU_H
15
16 #include <mach/hardware.h>
17 #include <mach/at91_dbgu.h>
18
19
20 #define ARCH_ID_AT91RM9200      0x09290780
21 #define ARCH_ID_AT91SAM9260     0x019803a0
22 #define ARCH_ID_AT91SAM9261     0x019703a0
23 #define ARCH_ID_AT91SAM9263     0x019607a0
24 #define ARCH_ID_AT91SAM9G10     0x019903a0
25 #define ARCH_ID_AT91SAM9G20     0x019905a0
26 #define ARCH_ID_AT91SAM9RL64    0x019b03a0
27 #define ARCH_ID_AT91SAM9G45     0x819b05a0
28 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
29 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
30 #define ARCH_ID_AT91SAM9X5      0x819a05a0
31 #define ARCH_ID_AT91CAP9        0x039A03A0
32
33 #define ARCH_ID_AT91SAM9XE128   0x329973a0
34 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
35 #define ARCH_ID_AT91SAM9XE512   0x329aa3a0
36
37 #define ARCH_ID_AT572D940HF     0x0e0303e0
38
39 #define ARCH_ID_AT91M40800      0x14080044
40 #define ARCH_ID_AT91R40807      0x44080746
41 #define ARCH_ID_AT91M40807      0x14080745
42 #define ARCH_ID_AT91R40008      0x44000840
43
44 static inline unsigned long at91_cpu_identify(void)
45 {
46         return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
47 }
48
49 static inline unsigned long at91_cpu_fully_identify(void)
50 {
51         return at91_sys_read(AT91_DBGU_CIDR);
52 }
53
54 #define ARCH_EXID_AT91SAM9M11   0x00000001
55 #define ARCH_EXID_AT91SAM9M10   0x00000002
56 #define ARCH_EXID_AT91SAM9G46   0x00000003
57 #define ARCH_EXID_AT91SAM9G45   0x00000004
58
59 #define ARCH_EXID_AT91SAM9G15   0x00000000
60 #define ARCH_EXID_AT91SAM9G35   0x00000001
61 #define ARCH_EXID_AT91SAM9X35   0x00000002
62 #define ARCH_EXID_AT91SAM9G25   0x00000003
63 #define ARCH_EXID_AT91SAM9X25   0x00000004
64
65 static inline unsigned long at91_exid_identify(void)
66 {
67         return at91_sys_read(AT91_DBGU_EXID);
68 }
69
70
71 #define ARCH_FAMILY_AT91X92     0x09200000
72 #define ARCH_FAMILY_AT91SAM9    0x01900000
73 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
74
75 static inline unsigned long at91_arch_identify(void)
76 {
77         return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
78 }
79
80 #ifdef CONFIG_ARCH_AT91CAP9
81 #include <mach/at91_pmc.h>
82
83 #define ARCH_REVISION_CAP9_B    0x399
84 #define ARCH_REVISION_CAP9_C    0x601
85
86 static inline unsigned long at91cap9_rev_identify(void)
87 {
88         return (at91_sys_read(AT91_PMC_VER));
89 }
90 #endif
91
92 #ifdef CONFIG_ARCH_AT91RM9200
93 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
94 #else
95 #define cpu_is_at91rm9200()     (0)
96 #endif
97
98 #ifdef CONFIG_ARCH_AT91SAM9260
99 #define cpu_is_at91sam9xe()     (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
100 #define cpu_is_at91sam9260()    ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
101 #else
102 #define cpu_is_at91sam9xe()     (0)
103 #define cpu_is_at91sam9260()    (0)
104 #endif
105
106 #ifdef CONFIG_ARCH_AT91SAM9G20
107 #define cpu_is_at91sam9g20()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
108 #else
109 #define cpu_is_at91sam9g20()    (0)
110 #endif
111
112 #ifdef CONFIG_ARCH_AT91SAM9261
113 #define cpu_is_at91sam9261()    (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
114 #else
115 #define cpu_is_at91sam9261()    (0)
116 #endif
117
118 #ifdef CONFIG_ARCH_AT91SAM9G10
119 #define cpu_is_at91sam9g10()    ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
120 #else
121 #define cpu_is_at91sam9g10()    (0)
122 #endif
123
124 #ifdef CONFIG_ARCH_AT91SAM9263
125 #define cpu_is_at91sam9263()    (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
126 #else
127 #define cpu_is_at91sam9263()    (0)
128 #endif
129
130 #ifdef CONFIG_ARCH_AT91SAM9RL
131 #define cpu_is_at91sam9rl()     (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
132 #else
133 #define cpu_is_at91sam9rl()     (0)
134 #endif
135
136 #ifdef CONFIG_ARCH_AT91SAM9G45
137 #define cpu_is_at91sam9g45()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
138 #define cpu_is_at91sam9g45es()  (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
139 #define cpu_is_at91sam9m10()    (cpu_is_at91sam9g45() && \
140                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
141 #define cpu_is_at91sam9m46()    (cpu_is_at91sam9g45() && \
142                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
143 #define cpu_is_at91sam9m11()    (cpu_is_at91sam9g45() && \
144                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
145 #else
146 #define cpu_is_at91sam9g45()    (0)
147 #define cpu_is_at91sam9g45es()  (0)
148 #define cpu_is_at91sam9m10()    (0)
149 #define cpu_is_at91sam9g46()    (0)
150 #define cpu_is_at91sam9m11()    (0)
151 #endif
152
153 #ifdef CONFIG_ARCH_AT91SAM9X5
154 #define cpu_is_at91sam9x5()     (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
155 #define cpu_is_at91sam9g15()    (cpu_is_at91sam9x5() && \
156                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G15))
157 #define cpu_is_at91sam9g35()    (cpu_is_at91sam9x5() && \
158                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G35))
159 #define cpu_is_at91sam9x35()    (cpu_is_at91sam9x5() && \
160                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
161 #define cpu_is_at91sam9g25()    (cpu_is_at91sam9x5() && \
162                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
163 #define cpu_is_at91sam9x25()    (cpu_is_at91sam9x5() && \
164                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
165 #else
166 #define cpu_is_at91sam9x5()     (0)
167 #define cpu_is_at91sam9g15()    (0)
168 #define cpu_is_at91sam9g35()    (0)
169 #define cpu_is_at91sam9x35()    (0)
170 #define cpu_is_at91sam9g25()    (0)
171 #define cpu_is_at91sam9x25()    (0)
172 #endif
173
174 #ifdef CONFIG_ARCH_AT91CAP9
175 #define cpu_is_at91cap9()       (at91_cpu_identify() == ARCH_ID_AT91CAP9)
176 #define cpu_is_at91cap9_revB()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
177 #define cpu_is_at91cap9_revC()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
178 #else
179 #define cpu_is_at91cap9()       (0)
180 #define cpu_is_at91cap9_revB()  (0)
181 #define cpu_is_at91cap9_revC()  (0)
182 #endif
183
184 #ifdef CONFIG_ARCH_AT572D940HF
185 #define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF)
186 #else
187 #define cpu_is_at572d940hf() (0)
188 #endif
189
190 /*
191  * Since this is ARM, we will never run on any AVR32 CPU. But these
192  * definitions may reduce clutter in common drivers.
193  */
194 #define cpu_is_at32ap7000()     (0)
195
196 #endif