+++ /dev/null
-#
-# Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
-#
-# Permission is hereby granted, free of charge, to any person obtaining
-# a copy of this software and associated documentation files
-# (the "Software"), to deal in the Software without restriction,
-# including without limitation the rights to use, copy, modify, merge,
-# publish, distribute, sublicense, and/or sell copies of the Software,
-# and to permit persons to whom the Software is furnished to do so,
-# subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be
-# included in all copies or substantial portions of the Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-#
-
-LOCAL_PATH := $(call my-dir)
-include $(CLEAR_VARS)
-
-# tos.img is considered to be 32-bit
-ifneq (,$(TARGET_2ND_ARCH))
-LOCAL_2ND_ARCH_VAR_PREFIX := $(TARGET_2ND_ARCH_VAR_PREFIX)
-endif
-
-ifeq (tlk,$(SECURE_OS_BUILD))
-
-ifeq (t124,$(TARGET_TEGRA_VERSION))
-
-$(warning SECURE_OS_BUILD. Making libmonitor.a)
-# building a monitor library
-LOCAL_MODULE := libmonitor
-LOCAL_MODULE_CLASS := STATIC_LIBRARIES
-LOCAL_UNINSTALLABLE_MODULE := true
-LOCAL_BUILT_MODULE_STEM := libmonitor.a
-STANDALONE_MONITOR := false
-MONITOR_LIBRARY := true
-OUTFILE_EXTENSION := .a
-
-else # TARGET_TEGRA_VERSION != t124
-
-$(warning SECURE_OS_BUILD. Making monitor.bin)
-# building a monitor binary
-LOCAL_MODULE := monitor.bin
-LOCAL_MODULE_CLASS := EXECUTABLES
-LOCAL_UNINSTALLABLE_MODULE := true
-LOCAL_BUILT_MODULE_STEM := monitor.bin
-STANDALONE_MONITOR := false
-MONITOR_LIBRARY := false
-
-endif # TARGET_TEGRA_VERSION == t124
-
-else # SECURE_OS_BUILD != tlk
-
-ifeq (t124,$(TARGET_TEGRA_VERSION))
-
-$(warning Non SECURE_OS_BUILD for T124 - Nothing to do)
-# t124, non secure: No nothing
-LOCAL_MODULE :=
-LOCAL_MODULE_CLASS :=
-LOCAL_UNINSTALLABLE_MODULE :=
-LOCAL_BUILT_MODULE_STEM :=
-STANDALONE_MONITOR := false
-MONITOR_LIBRARY := false
-
-else # TARGET_TEGRA_VERSION != t124
-
-$(warning Non SECURE_OS_BUILD. Making monitor.bin and tos.img)
-# building a monitor binary and tos.img
-LOCAL_MODULE := monitor.bin
-LOCAL_MODULE_CLASS := EXECUTABLES
-LOCAL_UNINSTALLABLE_MODULE := true
-LOCAL_BUILT_MODULE_STEM := monitor.bin
-STANDALONE_MONITOR := true
-MONITOR_LIBRARY := false
-
-endif # TARGET_TEGRA_VERSION == t124
-
-endif # SECURE_OS_BUILD == tlk
-
-ifneq (,$(LOCAL_BUILT_MODULE_STEM))
-
-ifeq ($(LOCAL_MODULE_CLASS),EXECUTABLES)
-# monitor.bin_intermediates
-MODULE_INTERMEDIATES := $(call intermediates-dir-for,$(LOCAL_MODULE_CLASS),$(LOCAL_BUILT_MODULE_STEM),,,$(LOCAL_2ND_ARCH_VAR_PREFIX))
-else
-# libmonitor_intermediates
-MODULE_INTERMEDIATES := $(call intermediates-dir-for,$(LOCAL_MODULE_CLASS),$(LOCAL_MODULE),,,$(LOCAL_2ND_ARCH_VAR_PREFIX))
-endif
-
-PROJECT := tegra
-OUTFILE := $(MODULE_INTERMEDIATES)/$(LOCAL_BUILT_MODULE_STEM)
-
-ifeq ($(STANDALONE_MONITOR),true)
-TOSIMAGE := $(PRODUCT_OUT)/tos.img
-ALL_MODULES.$(LOCAL_MODULE).INSTALLED := $(TOSIMAGE)
-endif
-
-ifeq ($(TARGET_ARCH),arm64)
-LK_TOOLCHAIN_PREFIX := prebuilts/gcc/$(HOST_PREBUILT_TAG)/arm/arm-eabi-4.8/bin/arm-eabi-
-LK_TOOLCHAIN_PREFIX64 := $(TARGET_TOOLS_PREFIX)
-else
-LK_TOOLCHAIN_PREFIX := $(ARM_EABI_TOOLCHAIN)/arm-eabi-
-LK_TOOLCHAIN_PREFIX64 := $(ARM_EABI_TOOLCHAIN)/../../../aarch64/aarch64-linux-android-4.8/bin/aarch64-linux-android-
-endif
-
-$(OUTFILE): PRIVATE_CUSTOM_TOOL_ARGS := PROJECT=$(PROJECT) \
- TARGET=$(TARGET_TEGRA_VERSION) \
- TOOLCHAIN_PREFIX=$(abspath $(LK_TOOLCHAIN_PREFIX)) \
- TOOLCHAIN_PREFIX64=$(abspath $(LK_TOOLCHAIN_PREFIX64)) \
- PREFIX=$(abspath $(MODULE_INTERMEDIATES)) \
- STANDALONE_MONITOR=$(STANDALONE_MONITOR) \
- MONITOR_LIBRARY=$(MONITOR_LIBRARY) \
- TOSIMAGE=$(abspath $(TOSIMAGE)) \
- -C $(LOCAL_PATH)
-
-$(OUTFILE): PRIVATE_MODULE := $(LOCAL_MODULE)
-# Depend on tasks when we are doing a full build.
-# For one shot builds, (mm, mmm) do not.
-$(OUTFILE):
- @echo "target Generated: $(PRIVATE_MODULE)"
- @mkdir -p $(dir $@)
- $(hide) $(MAKE) $(PRIVATE_CUSTOM_TOOL_ARGS)
-
-$(TOSIMAGE): $(OUTFILE)
-
-.PHONY: $(OUTFILE)
-
-# Needed to clean tos.img
-PRIVATE_CLEAN_FILES := $(TOSIMAGE)
-
-ifeq ($(LOCAL_2ND_ARCH_VAR_PREFIX),)
-ALL_NVIDIA_MODULES += $(LOCAL_MODULE)
-else
-ALL_NVIDIA_MODULES += $(LOCAL_MODULE)_32
-endif
-include $(BUILD_SYSTEM)/base_rules.mk
-
-# Clean variables
-PROJECT :=
-OUTFILE :=
-TOSIMAGE :=
-LK_TOOLCHAIN_PREFIX :=
-LK_TOOLCHAIN_PREFIX64 :=
-STANDALONE_MONITOR :=
-MONITOR_LIBRARY :=
-OUTFILE_EXTENSION :=
-
-endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ARCH_ARM_H
-#define __ARCH_ARM_H
-
-/* defines used in asm */
-#define MODE_USR 0x10
-#define MODE_FIQ 0x11
-#define MODE_IRQ 0x12
-#define MODE_SVC 0x13
-#define MODE_MON 0x16
-#define MODE_ABT 0x17
-#define MODE_UND 0x1b
-#define MODE_SYS 0x1f
-#define MODE_MASK 0x1f
-
-#define EXC_ARM (0 << 5)
-#define EXC_THUMB (1 << 5)
-
-/* offsets in context_switch_frame */
-#define CSF_OFFSET_R0 0x0
-#define CSF_OFFSET_R1 0x4
-#define CSF_OFFSET_R2 0x8
-#define CSF_OFFSET_R3 0xc
-#define CSF_OFFSET_R4 0x10
-#define CSF_OFFSET_R5 0x14
-#define CSF_OFFSET_R6 0x18
-#define CSF_OFFSET_R7 0x1c
-#define CSF_OFFSET_R8 0x20
-#define CSF_OFFSET_R9 0x24
-#define CSF_OFFSET_R10 0x28
-#define CSF_OFFSET_R11 0x2c
-#define CSF_OFFSET_R12 0x30
-#define CSF_OFFSET_SP 0x34
-#define CSF_OFFSET_LR 0x38
-#define CSF_OFFSET_PC 0x3c
-#define CSF_OFFSET_PSR 0x40
-#define CSF_SIZE (CSF_OFFSET_PSR + 0x4)
-
-#ifndef ASSEMBLY
-
-#include <sys/types.h>
-#include <arch/arm/cores.h>
-#include <kernel/thread.h>
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-#define DSB __asm__ volatile("dsb" ::: "memory")
-#define ISB __asm__ volatile("isb" ::: "memory")
-
-void arm_context_switch(thread_t *old_sp, thread_t *new_sp);
-
-static inline uint32_t read_cpsr() {
- uint32_t cpsr;
-
- __asm__ volatile("mrs %0, cpsr" : "=r" (cpsr));
- return cpsr;
-}
-
-struct arm_iframe {
- uint32_t r[13];
- uint32_t lr; /* lr_svc */
- uint32_t usp; /* sp_usr */
- uint32_t ulr; /* lr_usr */
- uint32_t pc;
- uint32_t spsr; /* spsr_irq */
-};
-
-struct arm_fault_frame {
- uint32_t spsr;
- uint32_t usp;
- uint32_t ulr;
- uint32_t r[13];
- uint32_t pc;
-};
-
-struct context_switch_frame {
- uint32_t r0;
- uint32_t r1;
- uint32_t r2;
- uint32_t r3;
- uint32_t r4;
- uint32_t r5;
- uint32_t r6;
- uint32_t r7;
- uint32_t r8;
- uint32_t r9;
- uint32_t r10;
- uint32_t r11;
- uint32_t r12;
- uint32_t sp; /* sp_usr or sp_svc */
- uint32_t lr; /* lr_usr or lr_svc */
- uint32_t pc; /* restart pc */
- uint32_t psr; /* previous mode */
-};
-
-struct arm_mode_regs {
- uint32_t fiq_r13, fiq_r14;
- uint32_t irq_r13, irq_r14;
- uint32_t svc_r13, svc_r14;
- uint32_t abt_r13, abt_r14;
- uint32_t und_r13, und_r14;
- uint32_t sys_r13, sys_r14;
-};
-
-void arm_save_mode_regs(struct arm_mode_regs *regs);
-
-uint32_t arm_read_sctlr(void);
-void arm_write_sctlr(uint32_t val);
-uint32_t arm_read_actlr(void);
-void arm_write_actlr(uint32_t val);
-uint32_t arm_read_ttbr0(void);
-void arm_write_ttbr0(uint32_t val);
-uint32_t arm_read_contextidr(void);
-void arm_write_contextidr(uint32_t val);
-uint32_t arm_read_ttbr1(void);
-void arm_write_ttbr1(uint32_t val);
-uint32_t arm_read_ttbcr(void);
-void arm_write_ttbcr(uint32_t val);
-uint32_t arm_read_dacr(void);
-void arm_write_dacr(uint32_t val);
-void arm_invalidate_tlb(void);
-void arm_invalidate_tlb_byaddr(addr_t addr);
-void arm_invalidate_tlb_byaddr_asid(addr_t addr, uint32_t asid);
-
-uint32_t arm_get_tls(void);
-void arm_set_tls(uint32_t val);
-uint32_t arm_read_vbar(void);
-void arm_write_vbar(uint32_t val);
-
-/* virt -> phys address translation args */
-enum {
- V2PCWPR,
- V2PCWPW,
- V2PCWUR,
- V2PCWUW,
- V2POWPR,
- V2POWPW,
- V2POWUR,
- V2POWUW
-};
-void arm_write_v2p(uint32_t vaddr, uint32_t type);
-uint64_t arm_read_par(void);
-
-#if ARM_WITH_NEON
-uint32_t arm_get_vfp_fpexc(void);
-void arm_set_vfp_fpexc(uint32_t val);
-uint32_t arm_get_vfp_fpscr(void);
-void arm_set_vfp_fpscr(uint32_t val);
-void arm_save_vfp_dregs(addr_t ctx);
-void arm_restore_vfp_dregs(addr_t ctx);
-#endif
-
-#if defined(__cplusplus)
-}
-#endif
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008-2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ARCH_ARM_OPS_H
-#define __ARCH_ARM_OPS_H
-
-#ifndef ASSEMBLY
-
-#include <compiler.h>
-#include <reg.h>
-
-#if ARM_ISA_ARMV7 || (ARM_ISA_ARMV6 && !__thumb__)
-// override of some routines
-__GNU_INLINE __ALWAYS_INLINE extern inline void arch_enable_ints(void)
-{
- __asm__("cpsie i");
- CF;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline void arch_disable_ints(void)
-{
- __asm__("cpsid i");
- CF;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline int atomic_add(volatile int *ptr, int val)
-{
- int old;
- int temp;
- int test;
-
- do {
- __asm__ volatile(
- "ldrex %[old], [%[ptr]]\n"
- "add %[temp], %[old], %[val]\n"
- "strex %[test], %[temp], [%[ptr]]\n"
- : [old]"=&r" (old), [temp]"=&r" (temp), [test]"=&r" (test)
- : [ptr]"r" (ptr), [val]"r" (val)
- : "memory");
-
- } while (test != 0);
-
- return old;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline int atomic_or(volatile int *ptr, int val)
-{
- int old;
- int temp;
- int test;
-
- do {
- __asm__ volatile(
- "ldrex %[old], [%[ptr]]\n"
- "orr %[temp], %[old], %[val]\n"
- "strex %[test], %[temp], [%[ptr]]\n"
- : [old]"=&r" (old), [temp]"=&r" (temp), [test]"=&r" (test)
- : [ptr]"r" (ptr), [val]"r" (val)
- : "memory");
-
- } while (test != 0);
-
- return old;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline int atomic_and(volatile int *ptr, int val)
-{
- int old;
- int temp;
- int test;
-
- do {
- __asm__ volatile(
- "ldrex %[old], [%[ptr]]\n"
- "and %[temp], %[old], %[val]\n"
- "strex %[test], %[temp], [%[ptr]]\n"
- : [old]"=&r" (old), [temp]"=&r" (temp), [test]"=&r" (test)
- : [ptr]"r" (ptr), [val]"r" (val)
- : "memory");
-
- } while (test != 0);
-
- return old;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline int atomic_swap(volatile int *ptr, int val)
-{
- int old;
- int test;
-
- do {
- __asm__ volatile(
- "ldrex %[old], [%[ptr]]\n"
- "strex %[test], %[val], [%[ptr]]\n"
- : [old]"=&r" (old), [test]"=&r" (test)
- : [ptr]"r" (ptr), [val]"r" (val)
- : "memory");
-
- } while (test != 0);
-
- return old;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline int atomic_cmpxhg(volatile int *ptr, int oldval, int newval)
-{
- int old;
- int test;
-
- do {
- __asm__ volatile(
- "ldrex %[old], [%[ptr]]\n"
- "mov %[test], #0\n"
- "teq %[old], %[oldval]\n"
-#if ARM_ISA_ARMV7M
- "bne 0f\n"
- "strex %[test], %[newval], [%[ptr]]\n"
- "0:\n"
-#else
- "strexeq %[test], %[newval], [%[ptr]]\n"
-#endif
- : [old]"=&r" (old), [test]"=&r" (test)
- : [ptr]"r" (ptr), [oldval]"Ir" (oldval), [newval]"r" (newval)
- : "cc");
-
- } while (test != 0);
-
- return old;
-}
-
-__GNU_INLINE __ALWAYS_INLINE extern inline uint32_t arch_cycle_count(void)
-{
-#if ARM_CPU_CORTEX_M3
-#define DWT_CYCCNT (0xE0001004)
- return *REG32(DWT_CYCCNT);
-#else
- return 0;
-#endif
-}
-
-
-#endif
-
-#endif
-
-#endif
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ARCH_CPU_H
-#define __ARCH_CPU_H
-
-/* arm specific stuff */
-#define PAGE_SIZE 4096
-#define PAGE_MASK (PAGE_SIZE - 1)
-
-#if ARM_CPU_ARM7
-/* irrelevant, no consistent cache */
-#define CACHE_LINE 32
-#elif ARM_CPU_ARM926
-#define CACHE_LINE 32
-#elif ARM_CPU_ARM1136
-#define CACHE_LINE 32
-#elif ARM_CPU_CORTEX_A8
-#define CACHE_LINE 64
-#elif ARM_CPU_CORTEX_M3
-#define CACHE_LINE 32 /* doesn't actually matter */
-#elif ARM_CPU_CORTEX_A9
-#define CACHE_LINE 32
-#elif ARM_CPU_CORTEX_A15
-#define CACHE_LINE 64
-#else
- #error unknown cpu
-#endif
-
-#endif
-
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# default to the regular arm subarch
-SUBARCH := arm
-
-DEFINES += \
- ARM_CPU_$(ARM_CPU)=1
-
-# do set some options based on the cpu core
-HANDLED_CORE := false
-
-ifeq ($(ARM_CPU),cortex-a15)
-DEFINES += \
- ARM_WITH_CP15=1 \
- ARM_WITH_MMU=1 \
- ARM_ISA_ARMv7=1 \
- ARM_ISA_ARMv7A=1 \
- ARM_WITH_VFP=1 \
- ARM_WITH_NEON=1 \
- ARM_WITH_THUMB=1 \
- ARM_WITH_THUMB2=1 \
- ARM_WITH_CACHE=1 \
- ARM_WITH_SCU=0 \
- ARM_WITH_L2=0
-HANDLED_CORE := true
-#CFLAGS += -mfpu=neon -mfloat-abi=softfp
-MODULE_DEPS += $(LOCAL_DIR)/arm/neon
-endif
-ifeq ($(ARM_CPU),cortex-a9)
-DEFINES += \
- ARM_WITH_CP15=1 \
- ARM_WITH_MMU=1 \
- ARM_ISA_ARMv7=1 \
- ARM_ISA_ARMv7A=1 \
- ARM_WITH_VFP=1 \
- ARM_WITH_NEON=1 \
- ARM_WITH_THUMB=1 \
- ARM_WITH_THUMB2=1 \
- ARM_WITH_CACHE=1 \
- ARM_WITH_SCU=1 \
- ARM_WITH_L2=0
-HANDLED_CORE := true
-#CFLAGS += -mfpu=neon -mfloat-abi=softfp
-MODULE_DEPS += $(LOCAL_DIR)/arm/neon
-endif
-
-ifeq ($(ARM_CPU),arm926ej-s)
-DEFINES += \
- ARM_WITH_CP15=1 \
- ARM_WITH_MMU=1 \
- ARM_ISA_ARMv5E=1 \
- ARM_WITH_THUMB=1 \
- ARM_WITH_CACHE=1 \
- ARM_CPU_ARM9=1 \
- ARM_CPU_ARM926=1
-HANDLED_CORE := true
-endif
-
-ifneq ($(HANDLED_CORE),true)
-$(warning $(LOCAL_DIR)/rules.mk doesnt have logic for arm core $(ARM_CPU))
-$(warning this is likely to be broken)
-endif
-
-INCLUDES += \
- -I$(LOCAL_DIR)/include \
- -I$(LOCAL_DIR)/$(SUBARCH)/include
-
-ifeq ($(SUBARCH),arm)
-
-# using either long / short MMU desc support
-ifeq ($(ARM_WITH_LPAE),true)
-DEFINES += \
- ARM_WITH_LPAE=1
-endif
-
-DEFINES += \
- ARCH_DEFAULT_STACK_SIZE=4096
-endif
-
-# If platform sets ARM_USE_MMU_RELOC the image will be built based on
-# VMEMBASE and will create page table entries in start.S to the physmem
-# it's been given (avoiding relocation by copying the image).
-
-ifeq ($(ARM_USE_MMU_RELOC),true)
-DEFINES += \
- ARM_USE_MMU_RELOC=1
-endif
-
-ifeq ($(ARM_USE_CPU_CACHING),true)
-DEFINES += \
- ARM_USE_CPU_CACHING=1
-endif
-
-# make sure some bits were set up
-MEMVARS_SET := 0
-ifeq ($(ARM_USE_MMU_RELOC),true)
-ifneq ($(VMEMBASE),)
-MEMVARS_SET := 1
-endif
-ifneq ($(VMEMSIZE),)
-MEMVARS_SET := 1
-endif
-ifeq ($(MEMVARS_SET),0)
-$(error missing VMEMBASE or VMEMSIZE variable, please set in target rules.mk)
-endif
-else
-ifneq ($(MEMBASE),)
-MEMVARS_SET := 1
-endif
-ifneq ($(MEMSIZE),)
-MEMVARS_SET := 1
-endif
-DEFINES += \
- VMEMBASE=$(MEMBASE)
-endif
-ifeq ($(MEMVARS_SET),0)
-$(error missing MEMBASE or MEMSIZE variable, please set in target rules.mk)
-endif
-
-LIBGCC := $(shell $(TOOLCHAIN_PREFIX)gcc $(MODULE_COMPILEFLAGS) -print-libgcc-file-name)
-$(info LIBGCC = $(LIBGCC))
-
-$(info ARCH_COMPILEFLAGS = $(MODULE_COMPILEFLAGS))
+++ /dev/null
-################################### tell Emacs this is a -*- makefile-gmake -*-
-#
-# Copyright (c) 2014, NVIDIA CORPORATION. All Rights Reserved.
-#
-# NVIDIA CORPORATION and its licensors retain all intellectual property
-# and proprietary rights in and to this software, related documentation
-# and any modifications thereto. Any use, reproduction, disclosure or
-# distribution of this software and related documentation without an express
-# license agreement from NVIDIA CORPORATION is strictly prohibited.
-#
-# tmake for SW Mobile
-#
-# Wrapper makefile to build all variants of the "secure_monitor" parts umbrella
-#
-###############################################################################
-#
-# Default targets
-#
-.PHONY: default build install clean distclean
-
-# NOTE: this needs to be the *FIRST* rule in the makefile!
-default: build
-
-
-###############################################################################
-#
-# Various constants
-#
-ifndef NV_SOURCE
-NV_SOURCE := $(CURDIR)
-endif
-ifndef NV_OUTDIR
-NV_OUTDIR := $(CURDIR)/out
-endif
-
-
-###############################################################################
-#
-# Macro to call component parts umbrella
-#
-define _build
- +$(MAKE) \
- -C $(NV_SOURCE) \
- -f secure_monitor/build/Makefile.secure_monitor \
- NV_OUTDIR=$(NV_BUILD_COMPONENT_OUTDIR)
-endef
-
-###############################################################################
-#
-# Macro to generate one build configuration
-#
-# $(1): target name
-# $(2): same as $(1) but split into words
-define _generate_config
-
-# configuration dependent variables
-$(eval NV_BUILD_COMPONENT_OUTDIR := $(NV_OUTDIR)/$(1))
-$(eval NV_BUILD_COMPONENT_INSTALL_DIR := $(NV_OUTDIR)/install/$(1))
-$(eval NV_BUILD_COMPONENT_SYSTEM := $(word 1,$(2)))
-$(eval NV_BUILD_COMPONENT_BOARD := $(word 2,$(2)))
-
-# forces re-execution of component parts umbrella to check for build changes
-.PHONY: $(1)
-_directories += $(1)
-$(1): NV_BUILD_COMPONENT_CONFIG := \
- NV_TARGET_BOARD=$$(NV_BUILD_COMPONENT_BOARD) \
- NV_BUILD_SYSTEM_TYPE=$$(NV_BUILD_COMPONENT_SYSTEM)
-$(1): | $(NV_BUILD_COMPONENT_OUTDIR)
- $(_build) $$(NV_BUILD_COMPONENT_CONFIG)
-
-$(NV_BUILD_COMPONENT_OUTDIR): | $(NV_OUTDIR)
- mkdir -p $$@
-
-.PHONY: $(NV_BUILD_COMPONENT_INSTALL_DIR)
-$(NV_BUILD_COMPONENT_INSTALL_DIR): NV_BUILD_COMPONENT_BUILD_DIR := $(NV_OUTDIR)/$(1)/nvidia
-$(NV_BUILD_COMPONENT_INSTALL_DIR):
- mkdir -p $$@
- cp \
- $$(NV_BUILD_COMPONENT_BUILD_DIR)/secure_monitor/tos.img \
- $$@
-
-clean distclean::
- $(_build) $$@
-endef
-
-
-###############################################################################
-#
-# Build configuration
-#
-# Configuration naming scheme
-#
-# <system>@<board>
-#
-# system: value for $(NV_BUILD_SYSTEM_TYPE)
-# board: value for $(NV_TARGET_BOARD)
-#
-###############################################################################
-_configurations :=
-
-###############################################################################
-#
-# Android
-#
-# None
-#
-###############################################################################
-#
-# L4T
-#
-# T132
-_configurations += l4t@t132ref
-# T210
-_configurations += l4t@t210ref
-#
-###############################################################################
-#
-# Embedded-Linux
-#
-# None
-#
-###############################################################################
-#
-# Embedded-QNX
-#
-# None
-#
-###############################################################################
-
-_directories :=
-$(foreach c,$(_configurations),$(eval $(call _generate_config,$(subst @,_,$(c)),$(subst @, ,$(c)))))
-
-build: $(_directories)
-
-NV_BUILD_COMPONENT_INSTALLS := $(addprefix $(NV_OUTDIR)/install/,$(_directories))
-
-install: $(NV_BUILD_COMPONENT_INSTALLS) | $(NV_OUTDIR)/install
-
-
-###############################################################################
-#
-# Intermediate directory creation
-#
-$(NV_OUTDIR) $(NV_OUTDIR)/install:
- mkdir -p $@
-
-
-# Local Variables:
-# indent-tabs-mode: t
-# tab-width: 8
-# End:
-# vi: set tabstop=8 noexpandtab:
+++ /dev/null
-################################### tell Emacs this is a -*- makefile-gmake -*-
-#
-# Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
-#
-# NVIDIA CORPORATION and its licensors retain all intellectual property
-# and proprietary rights in and to this software, related documentation
-# and any modifications thereto. Any use, reproduction, disclosure or
-# distribution of this software and related documentation without an express
-# license agreement from NVIDIA CORPORATION is strictly prohibited.
-#
-# tmake for SW Mobile
-#
-# Umbrella parts adaptor to secure_monitor build system (LK based)
-#
-###############################################################################
-#
-# Umbrella build is always started from top-level of the source tree
-#
-ifndef NV_SOURCE
-NV_SOURCE := $(CURDIR)
-endif
-
-#
-# Macro for checking that each variable given in list $(1) is both defined
-# and has a non empty value in it.
-define NV_BUILD_VARIABLES_SANITY_CHECK
-$(foreach var,$(1),$(eval \
-ifndef $(var)
-_missing_vars := 1 $$(info ERROR: variable not set or empty: $(var))
-endif))\
-$(if $(_missing_vars),$(error Environment sanity check failed))
-endef
-
-$(call NV_BUILD_VARIABLES_SANITY_CHECK, NV_BUILD_SYSTEM_TYPE NV_TARGET_BOARD)
-
-#
-# Default targets
-#
-# Define them here to prevent component makefiles from messing with them.
-#
-.PHONY: default build clean distclean systemimage release-info
-.PHONY: build-tools clean-tools distclean-tools # not implemented, but needed
-
-# NOTE: this needs to be the *FIRST* rule in the makefile!
-default: build
-
-#
-# Common bits
-#
-NV_PATH := tmake
-include $(NV_SOURCE)/$(NV_PATH)/umbrella/common.tmk
-include $(NV_SOURCE)/$(NV_PATH)/umbrella/board_soc.tmk
-
-#
-# Cross-compilation toolchain
-#
-NV_BUILD_SECURE_MONITOR_SOURCE := $(NV_SOURCE)/secure_monitor
-
-ifneq ($(filter l4t mods embedded-linux,$(NV_BUILD_SYSTEM_TYPE)),)
-NV_BUILD_SECURE_MONITOR_TOOLCHAIN := $(NV_SOURCE)/prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.8/bin/aarch64-linux-android-
-else
-$(error umbrella: secure_monitor part not supported for build type "$(NV_BUILD_SYSTEM_TYPE)")
-endif
-
-#
-# monitor build
-#
-NV_BUILD_SECURE_MONITOR_OUTDIR := $(NV_INTERMEDIATES_TOP)/secure_monitor
-NV_BUILD_SECURE_MONITOR_IMAGE := $(NV_BUILD_SECURE_MONITOR_OUTDIR)/tos.img
-
-# translate our verbosity and build type to monitor build
-ifeq ($(NV_BUILD_CONFIGURATION_IS_VERBOSE),1)
-_secure_monitor_build_verbosity :=
-else
-_secure_monitor_build_verbosity := @
-endif
-ifeq ($(NV_BUILD_CONFIGURATION_IS_DEBUG),1)
-_secure_monitor_build_type := debug
-else
-_secure_monitor_build_type := release
-endif
-
-# macro to call monitor build
-define _secure_monitor_build
- +$(MAKE) -C $(NV_BUILD_SECURE_MONITOR_SOURCE) \
- PROJECT=tegra \
- TARGET=$(NV_TARGET_SOC) \
- TOOLCHAIN_PREFIX=$(NV_BUILD_SECURE_MONITOR_TOOLCHAIN) \
- TOOLCHAIN_PREFIX64=$(NV_BUILD_SECURE_MONITOR_TOOLCHAIN) \
- TARGET_BUILD_TYPE=$(_secure_monitor_build_type) \
- NOECHO=$(_secure_monitor_build_verbosity) \
- PREFIX=$(NV_BUILD_SECURE_MONITOR_OUTDIR) \
- STANDALONE_MONITOR=true \
- MONITOR_LIBRARY=false \
- TOSIMAGE=$(NV_BUILD_SECURE_MONITOR_IMAGE)
-endef
-
-# standard build: build every component
-ifndef NV_BUILD_COMPONENTS
-build: $(NV_BUILD_SECURE_MONITOR_IMAGE)
-
-# forces re-execution of monitor build system to check for source changes
-.PHONY: $(NV_BUILD_SECURE_MONITOR_IMAGE)
-$(NV_BUILD_SECURE_MONITOR_IMAGE): | $(NV_BUILD_SECURE_MONITOR_OUTDIR)
- $(_secure_monitor_build)
-
-clean distclean::
- $(_secure_monitor_build) $@
-
-else
-# user has requested build of specific components -> skip secure_monitor build
-endif
-
-#
-# Intermediate directory creation
-#
-$(NV_BUILD_SECURE_MONITOR_OUTDIR): | $(NV_INTERMEDIATES_TOP)
-$(NV_INTERMEDIATES_TOP) $(NV_BUILD_SECURE_MONITOR_OUTDIR):
- $(MKDIR_P) $@
-
-
-# Local Variables:
-# indent-tabs-mode: t
-# tab-width: 8
-# End:
-# vi: set tabstop=8 noexpandtab:
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ARCH_OPS_H
-#define __ARCH_OPS_H
-
-#ifndef ASSEMBLY
-
-#include <sys/types.h>
-#include <stddef.h>
-#include <compiler.h>
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-void arch_enable_ints(void);
-void arch_disable_ints(void);
-
-int atomic_swap(volatile int *ptr, int val);
-int atomic_add(volatile int *ptr, int val);
-int atomic_and(volatile int *ptr, int val);
-int atomic_or(volatile int *ptr, int val);
-
-#endif // !ASSEMBLY
-#define ICACHE 1
-#define DCACHE 2
-#define UCACHE (ICACHE|DCACHE)
-#ifndef ASSEMBLY
-
-void arch_disable_cache(uint flags);
-void arch_enable_cache(uint flags);
-
-void arch_clean_cache_range(addr_t start, size_t len);
-void arch_clean_invalidate_cache_range(addr_t start, size_t len);
-void arch_invalidate_cache_range(addr_t start, size_t len);
-void arch_sync_cache_range(addr_t start, size_t len);
-
-void arch_idle(void);
-
-void arch_disable_mmu(void);
-
-void arch_switch_stacks_and_call(addr_t call, addr_t stack) __NO_RETURN;
-
-uint32_t arch_cycle_count(void);
-
-#if defined(__cplusplus)
-}
-#endif
-
-#endif // !ASSEMBLY
-
-#if ARCH_ARM
-#include <arch/arm/ops.h>
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ASM_H
-#define __ASM_H
-
-//#define FUNCTION(x) .global x; .type x,@function; x:
-#define FUNCTION(x) .global x; x:
-
-#endif
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ASSERT_H
-#define __ASSERT_H
-
-#include <compiler.h>
-#include <debug.h>
-
-#define ASSERT(x) \
- do { if (unlikely(!(x))) { panic("ASSERT FAILED at (%s:%d): %s\n", __FILE__, __LINE__, #x); } } while (0)
-
-#if DEBUGLEVEL > 1
-#define DEBUG_ASSERT(x) \
- do { if (unlikely(!(x))) { panic("DEBUG ASSERT FAILED at (%s:%d): %s\n", __FILE__, __LINE__, #x); } } while (0)
-#else
-#define DEBUG_ASSERT(x) \
- do { } while(0)
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __COMPILER_H
-#define __COMPILER_H
-
-#ifndef __ASSEMBLY__
-
-#if __GNUC__
-#define likely(x) __builtin_expect(!!(x), 1)
-#define unlikely(x) __builtin_expect(!!(x), 0)
-#define __UNUSED __attribute__((__unused__))
-#define __PACKED __attribute__((packed))
-#define __ALIGNED(x) __attribute__((aligned(x)))
-#define __PRINTFLIKE(__fmt,__varargs) __attribute__((__format__ (__printf__, __fmt, __varargs)))
-#define __SCANFLIKE(__fmt,__varargs) __attribute__((__format__ (__scanf__, __fmt, __varargs)))
-#define __SECTION(x) __attribute((section(x)))
-#define __PURE __attribute((pure))
-#define __CONST __attribute((const))
-#define __NO_RETURN __attribute__((noreturn))
-#define __MALLOC __attribute__((malloc))
-#define __WEAK __attribute__((weak))
-#define __GNU_INLINE __attribute__((gnu_inline))
-#define __GET_CALLER(x) __builtin_return_address(0)
-#define __GET_FRAME(x) __builtin_frame_address(0)
-#define __NAKED __attribute__((naked))
-#define __ISCONSTANT(x) __builtin_constant_p(x)
-
-#define INCBIN(symname, sizename, filename, section) \
- __asm__ (".section " section "; .align 4; .globl "#symname); \
- __asm__ (""#symname ":\n.incbin \"" filename "\""); \
- __asm__ (".section " section "; .align 1;"); \
- __asm__ (""#symname "_end:"); \
- __asm__ (".section " section "; .align 4; .globl "#sizename); \
- __asm__ (""#sizename ": .long "#symname "_end - "#symname " - 1"); \
- extern unsigned char symname[]; \
- extern unsigned int sizename
-
-#define INCFILE(symname, sizename, filename) INCBIN(symname, sizename, filename, ".rodata")
-
-/* look for gcc 3.0 and above */
-#if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 0)
-#define __ALWAYS_INLINE __attribute__((always_inline))
-#else
-#define __ALWAYS_INLINE
-#endif
-
-/* look for gcc 3.1 and above */
-#if !defined(__DEPRECATED) // seems to be built in in some versions of the compiler
-#if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1)
-#define __DEPRECATED __attribute((deprecated))
-#else
-#define __DEPRECATED
-#endif
-#endif
-
-/* look for gcc 3.3 and above */
-#if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 3)
-/* the may_alias attribute was introduced in gcc 3.3; before that, there
- * was no way to specify aliasiang rules on a type-by-type basis */
-#define __MAY_ALIAS __attribute__((may_alias))
-
-/* nonnull was added in gcc 3.3 as well */
-#define __NONNULL(x) __attribute((nonnull x))
-#else
-#define __MAY_ALIAS
-#define __NONNULL(x)
-#endif
-
-/* look for gcc 3.4 and above */
-#if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
-#define __WARN_UNUSED_RESULT __attribute((warn_unused_result))
-#else
-#define __WARN_UNUSED_RESULT
-#endif
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1)
-#define __EXTERNALLY_VISIBLE __attribute__((externally_visible))
-#else
-#define __EXTERNALLY_VISIBLE
-#endif
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
-#define __UNREACHABLE __builtin_unreachable()
-#else
-#define __UNREACHABLE
-#endif
-
-/* compiler fence */
-#define CF do { __asm__ volatile("" ::: "memory"); } while(0)
-
-#define __WEAK_ALIAS(x) __attribute__((weak, alias(x)))
-#define __ALIAS(x) __attribute__((alias(x)))
-
-#define __EXPORT __attribute__ ((visibility("default")))
-#define __LOCAL __attribute__ ((visibility("hidden")))
-
-#define __THREAD __thread
-
-#define __offsetof(type, field) __builtin_offsetof(type, field)
-
-#else
-
-#define likely(x) (x)
-#define unlikely(x) (x)
-#define __UNUSED
-#define __PACKED
-#define __ALIGNED(x)
-#define __PRINTFLIKE(__fmt,__varargs)
-#define __SCANFLIKE(__fmt,__varargs)
-#define __SECTION(x)
-#define __PURE
-#define __CONST
-#define __NONNULL(x)
-#define __DEPRECATED
-#define __WARN_UNUSED_RESULT
-#define __ALWAYS_INLINE
-#define __MAY_ALIAS
-#define __NO_RETURN
-#endif
-
-#endif
-
-/* TODO: add type check */
-#define countof(a) (sizeof(a) / sizeof((a)[0]))
-
-/* CPP header guards */
-#ifdef __cplusplus
-#define __BEGIN_CDECLS extern "C" {
-#define __END_CDECLS }
-#else
-#define __BEGIN_CDECLS
-#define __END_CDECLS
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008-2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __DEBUG_H
-#define __DEBUG_H
-
-#include <stdarg.h>
-#include <stddef.h>
-#include <compiler.h>
-#include <platform/debug.h>
-#include <printf.h>
-
-__BEGIN_CDECLS
-
-/*
- * It defines the debug level and restricts the number of prints that
- * is to be printed in release or debug builds.
- */
-#if defined(DEBUG)
-#define DEBUGLEVEL DEBUG
-#else
-#define DEBUGLEVEL 2
-#endif
-
-/* Various logging output mechanisms */
-
-/* debug levels */
-#define CRITICAL 0
-#define ALWAYS 0
-#define INFO 1
-#define SPEW 2
-
-/* Shared buffer size */
-#define EARLYBUF_SIZE 4096
-
-struct circular_buffer {
- uint32_t size; /* Indicates the total size of the buffer */
- uint32_t start; /* Starting point of valid data in buffer */
- uint32_t end; /* First character which is empty (can be written to) */
- uint32_t overflow; /* Indicator whether buffer has overflown or not */
- nsaddr_t buf;
-};
-
-extern char early_logbuf[EARLYBUF_SIZE];
-extern int early_char_count;
-
-#if !DISABLE_DEBUG_OUTPUT
-
-/* input/output */
-#define _dputc(c) platform_dputc(c)
-int _dputs(const char *str);
-int _dprintf(const char *fmt, ...) __PRINTFLIKE(1, 2);
-int _dvprintf(const char *fmt, va_list ap);
-
-/* dump memory */
-void hexdump(const void *ptr, size_t len);
-void hexdump8(const void *ptr, size_t len);
-
-#else
-
-/* input/output */
-static inline void _dputc(char c) { }
-static inline int _dputs(const char *str) { return 0; }
-static inline int __PRINTFLIKE(1, 2) _dprintf(const char *fmt, ...) { return 0; }
-static inline int _dvprintf(const char *fmt, va_list ap) { return 0; }
-
-/* dump memory */
-static inline void hexdump(const void *ptr, size_t len) { }
-static inline void hexdump8(const void *ptr, size_t len) { }
-
-#endif /* DISABLE_DEBUG_OUTPUT */
-
-#define dputc(level, str) do { if ((level) <= DEBUGLEVEL) { _dputc(str); } } while (0)
-#define dputs(level, str) do { if ((level) <= DEBUGLEVEL) { _dputs(str); } } while (0)
-#define dprintf(level, x...) do { if ((level) <= DEBUGLEVEL) { _dprintf(x); } } while (0)
-#define dvprintf(level, x...) do { if ((level) <= DEBUGLEVEL) { _dvprintf(x); } } while (0)
-
-/* trace routines */
-#define TRACE_ENTRY printf("%s: entry\n", __PRETTY_FUNCTION__)
-#define TRACE_EXIT printf("%s: exit\n", __PRETTY_FUNCTION__)
-#define TRACE_ENTRY_OBJ printf("%s: entry obj %p\n", __PRETTY_FUNCTION__, this)
-#define TRACE_EXIT_OBJ printf("%s: exit obj %p\n", __PRETTY_FUNCTION__, this)
-#define TRACE printf("%s:%d\n", __PRETTY_FUNCTION__, __LINE__)
-#define TRACEF(str, x...) do { printf("%s:%d: " str, __PRETTY_FUNCTION__, __LINE__, ## x); } while (0)
-
-/* trace routines that work if LOCAL_TRACE is set */
-#define LTRACE_ENTRY do { if (LOCAL_TRACE) { TRACE_ENTRY; } } while (0)
-#define LTRACE_EXIT do { if (LOCAL_TRACE) { TRACE_EXIT; } } while (0)
-#define LTRACE do { if (LOCAL_TRACE) { TRACE; } } while (0)
-#define LTRACEF(x...) do { if (LOCAL_TRACE) { TRACEF(x); } } while (0)
-
-/* systemwide halts */
-void halt(void) __NO_RETURN;
-
-void _panic(void *caller, const char *fmt, ...) __PRINTFLIKE(2, 3) __NO_RETURN;
-#define panic(x...) _panic(__GET_CALLER(), x)
-
-#define PANIC_UNIMPLEMENTED panic("%s unimplemented\n", __PRETTY_FUNCTION__)
-
-/* spin the cpu for a period of (short) time */
-void spin(uint32_t usecs);
-
-__END_CDECLS
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ENDIAN_H
-#define __ENDIAN_H
-
-#include <sys/types.h>
-
-#ifndef LITTLE_ENDIAN
-#define LITTLE_ENDIAN 1234
-#endif
-#ifndef BIG_ENDIAN
-#define BIG_ENDIAN 4321
-#endif
-
-#if __POWERPC__
-#include <ppc_intrinsics.h>
-#endif
-
-#if defined(ARCH_ARM)
-#define BYTE_ORDER LITTLE_ENDIAN
-#endif
-
-#if defined(__i386__) || defined(_X86_)
-#define BYTE_ORDER LITTLE_ENDIAN
-#endif
-
-#ifndef BYTE_ORDER
-#error "need to get the BYTE_ORDER define from somewhere"
-#endif
-
-// define a macro that unconditionally swaps
-#define SWAP_32(x) \
- (((uint32_t)(x) << 24) | (((uint32_t)(x) & 0xff00) << 8) |(((uint32_t)(x) & 0x00ff0000) >> 8) | ((uint32_t)(x) >> 24))
-#define SWAP_16(x) \
- ((((uint16_t)(x) & 0xff) << 8) | ((uint16_t)(x) >> 8))
-
-// standard swap macros
-#if BYTE_ORDER == BIG_ENDIAN
-#define LE32(val) SWAP_32(val)
-#define LE16(val) SWAP_16(val)
-#define BE32(val) (val)
-#define BE16(val) (val)
-#else
-#define LE32(val) (val)
-#define LE16(val) (val)
-#define BE32(val) SWAP_32(val)
-#define BE16(val) SWAP_16(val)
-#endif
-
-#define LE32SWAP(var) (var) = LE32(var);
-#define LE16SWAP(var) (var) = LE16(var);
-#define BE32SWAP(var) (var) = BE32(var);
-#define BE16SWAP(var) (var) = BE16(var);
-
-/* classic network byte swap stuff */
-#define ntohs(n) BE16(n)
-#define htons(h) BE16(h)
-#define ntohl(n) BE32(n)
-#define htonl(h) BE32(h)
-
-// some memory access macros
-#if __POWERPC__
-#define READ_MEM_WORD(ptr) __lwbrx((word *)(ptr), 0)
-#define READ_MEM_HALFWORD(ptr) __lhbrx((halfword *)(ptr), 0)
-#define READ_MEM_BYTE(ptr) (*(byte *)(ptr))
-#define WRITE_MEM_WORD(ptr, data) __stwbrx(data, (word *)(ptr), 0)
-#define WRITE_MEM_HALFWORD(ptr, data) __sthbrx(data, (halfword *)(ptr), 0)
-#define WRITE_MEM_BYTE(ptr, data) (*(byte *)(ptr) = (data))
-#else
-#define READ_MEM_WORD(ptr) SWAPIT_32(*(word *)(ptr))
-#define READ_MEM_HALFWORD(ptr) SWAPIT_16(*(halfword *)(ptr))
-#define READ_MEM_BYTE(ptr) (*(byte *)(ptr))
-#define WRITE_MEM_WORD(ptr, data) (*(word *)(ptr) = SWAPIT_32(data))
-#define WRITE_MEM_HALFWORD(ptr, data) (*(halfword *)(ptr) = SWAPIT_16(data))
-#define WRITE_MEM_BYTE(ptr, data) (*(byte *)(ptr) = (data))
-#endif
-
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ERR_H
-#define __ERR_H
-
-#include <sys/types.h> // for status_t
-
-#define NO_ERROR 0
-#define ERR_GENERIC -1
-#define ERR_NOT_FOUND -2
-#define ERR_NOT_READY -3
-#define ERR_NO_MSG -4
-#define ERR_NO_MEMORY -5
-#define ERR_ALREADY_STARTED -6
-#define ERR_NOT_VALID -7
-#define ERR_INVALID_ARGS -8
-#define ERR_NOT_ENOUGH_BUFFER -9
-#define ERR_NOT_SUSPENDED -10
-#define ERR_OBJECT_DESTROYED -11
-#define ERR_NOT_BLOCKED -12
-#define ERR_TIMED_OUT -13
-#define ERR_ALREADY_EXISTS -14
-#define ERR_CHANNEL_CLOSED -15
-#define ERR_OFFLINE -16
-#define ERR_NOT_ALLOWED -17
-#define ERR_BAD_PATH -18
-#define ERR_ALREADY_MOUNTED -19
-#define ERR_IO -20
-#define ERR_NOT_DIR -21
-#define ERR_NOT_FILE -22
-#define ERR_RECURSE_TOO_DEEP -23
-#define ERR_NOT_SUPPORTED -24
-#define ERR_TOO_BIG -25
-
-#define ERR_TOO_MANY_TASKS -26
-#define ERR_TASK_GENERIC -27
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MONITOR_VECTOR_H
-#define __MONITOR_VECTOR_H
-
-#ifndef ASSEMBLY
-#define UL(x) (x##UL)
-#else
-#define UL(x) (x)
-#endif
-
-#if !defined(ASSEMBLY) && defined(WITH_MONITOR_BIN)
-/*
- * Exported monitor data structures and functions which can be
- * referenced by routines also linked into the monitor binary.
- */
-extern uintptr_t __mon_cpu_return_addr;
-extern uintptr_t __mon_cpu_reset_vector;
-extern uintptr_t __mon_phys_base;
-extern uintptr_t __mon_phys_size;
-
-/* holds arguments/return value during fastcalls */
-struct fastcall_frame {
- uint64_t r[8]; /* r0-r7 */
-};
-
-paddr_t mon_virt_to_phys(void *vaddr);
-void *mon_phys_to_virt(uint64_t paddr);
-
-int mon_mmu_map_mmio(uintptr_t vaddr, uint64_t paddr, uint32_t length);
-void mon_mmu_map_uncached(uintptr_t vaddr, uint64_t paddr, uint32_t length);
-void mon_mmu_unmap(uintptr_t vaddr, uint32_t length);
-
-void mon_atomic_or(volatile uint32_t *ptr, uint32_t bits);
-void mon_atomic_and(volatile uint32_t *ptr, uint32_t bits);
-
-uint32_t mon_get_cpu_id(void);
-
-/*
- * CPU power down sequence as per A57/A53 TRM
- *
- * l2_flush = indicates if L2 flush is required
- *
- */
-void mon_cpu_power_down(int l2_flush);
-
-#endif // !ASSEMBLY && WITH_MONITOR_BIN
-
-
-#define SMC_STDCALL (UL(0) << 31)
-#define SMC_FASTCALL (UL(1) << 31)
-
-#define SMC_CALLING_CONVENTION_32 (UL(0) << 30)
-#define SMC_CALLING_CONVENTION_64 (UL(1) << 30)
-
-#define SMC_OWNER_MASK 0x3F
-#define SMC_OWNER_SHIFT 24
-
-#define SMC_OWNER_ARM_ARCH 0x0
-#define SMC_OWNER_CPU_SERVICE 0x1
-#define SMC_OWNER_SIP_SERVICE 0x2
-#define SMC_OWNER_OEM_SERVICE 0x3
-#define SMC_OWNER_ARM_STD 0x4
-
-#define SMC_OWNER_TRUSTED_BASE 0x30
-#define SMC_OWNER_TRUSTED_SERVICE 0x5
-
-#define SMC_MUST_BE_ZERO_MASK 0xFF
-#define SMC_MUST_BE_ZERO_SHIFT 16
-
-/* legacy when fastcall & MBZ field is all 1s */
-#define SMC_IS_LEGACY \
- (SMC_FASTCALL | (SMC_MUST_BE_ZERO_MASK << SMC_MUST_BE_ZERO_SHIFT))
-
-/* Silicon Partner issued SMCs */
-#define SMC_SIP_CALL (SMC_OWNER_SIP_SERVICE << SMC_OWNER_SHIFT)
-#define SMC_SIP_AARCH_SWITCH (SMC_FASTCALL | SMC_SIP_CALL | 0x4)
-#define SMC_SIP_GET_FIQ_REGS (SMC_FASTCALL | SMC_SIP_CALL | 0x6)
-
-/* Trusted OS issued SMC (i.e. generated from the TLK kernel) */
-#define SMC_TOS_CALL (0x32 << SMC_OWNER_SHIFT)
-#define SMC_TOS_FROM_SECURE (1 << 15)
-#define SMC_TOS_PREEMPT (1 << 12)
-
-#if ARCH_ARM
-/* TOS 32bit secure fastcalls */
-#define SMC_TOS_SECURE (SMC_FASTCALL | SMC_TOS_CALL | \
- SMC_TOS_FROM_SECURE | SMC_CALLING_CONVENTION_32)
-#endif
-#if ARCH_ARM64
-/* TOS 64bit secure fastcalls */
-#define SMC_TOS_SECURE (SMC_FASTCALL | SMC_TOS_CALL | \
- SMC_TOS_FROM_SECURE | SMC_CALLING_CONVENTION_64)
-#endif
-
-/* low byte used as jump table idx */
-#define SMC_TOS_FUNC_ID_MASK 0xFF
-
-/* TOS issued SMCs (update MAX_FUNC_IDX when adding new calls) */
-#define SMC_TOS_COMPLETION (SMC_TOS_SECURE | 0x1)
-#define SMC_TOS_PREEMPT_BY_IRQ (SMC_TOS_SECURE | SMC_TOS_PREEMPT | 0x2)
-#define SMC_TOS_PREEMPT_BY_FS (SMC_TOS_SECURE | SMC_TOS_PREEMPT | 0x3)
-#define SMC_TOS_INITIAL_NS_RETURN (SMC_TOS_SECURE | 0x4)
-#define SMC_TOS_ADDR_TRANSLATE (SMC_TOS_SECURE | 0x5)
-#define SMC_TOS_INIT_SHARED_ADDR (SMC_TOS_SECURE | 0x6)
-#define SMC_TOS_MAX_FUNC_IDX 0x6
-
-/* restart pre-empted SMC handling */
-#define SMC_TOS_RESTART (60 << 24)
-
-/* informs the NS world that we were pre-empted by an irq */
-#define SMC_ERR_PREEMPT_BY_IRQ 0xFFFFFFFD
-#define SMC_ERR_PREEMPT_BY_FS 0xFFFFFFFE
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MALLOC_H
-#define __MALLOC_H
-
-#include <sys/types.h>
-#include <compiler.h>
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-void *malloc(size_t size) __MALLOC;
-void *memalign(size_t boundary, size_t size) __MALLOC;
-void *calloc(size_t count, size_t size) __MALLOC;
-void *realloc(void *ptr, size_t size) __MALLOC;
-void free(void *ptr);
-void free_memalign(void *ptr);
-
-#if defined(__cplusplus)
-}
-#endif
-
-#endif
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_H
-#define __PLATFORM_H
-
-#include <sys/types.h>
-
-lk_time_t current_time(void);
-lk_bigtime_t current_time_hires(void);
-
-/* super early platform initialization, before almost everything */
-void platform_early_init(void);
-
-/* later init, after the kernel has come up */
-void platform_init(void);
-
-/* called by the arch init code to get the platform to set up any mmu mappings it may need */
-void platform_init_mmu_mappings(void);
-
-/* used by platforms to implement their own idle routine */
-void platform_idle(void);
-
-/* return l2x0 base address */
-uint32_t platform_l2x0_base(void);
-
-/* init outer cache */
-void platform_init_outer(void);
-
-/* handle syscall */
-bool platform_syscall_handler(void *arg);
-
-/* Get a random number */
-uint32_t platform_get_rand32(void);
-
-void platform_monitor_init_cpu(void);
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_DEBUG_H
-#define __PLATFORM_DEBUG_H
-
-#include <sys/types.h>
-#include <stdbool.h>
-#include <stdarg.h>
-#include <compiler.h>
-
-__BEGIN_CDECLS
-
-void platform_halt(void) __NO_RETURN;
-void platform_init_debug_port(unsigned int dbg_port);
-void platform_dputc(char c);
-int platform_dgetc(char *c, bool wait);
-
-__END_CDECLS
-
-#endif
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_INTERRUPTS_H
-#define __PLATFORM_INTERRUPTS_H
-
-#include <sys/types.h>
-
-status_t mask_interrupt(unsigned int vector);
-status_t unmask_interrupt(unsigned int vector);
-
-typedef enum handler_return (*int_handler)(void *arg);
-
-void register_int_handler(unsigned int vector, int_handler handler, void *arg);
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __LIB_PRINTF_H
-#define __LIB_PRINTF_H
-
-#include <stdarg.h>
-#include <compiler.h>
-#include <debug.h>
-#include <stddef.h>
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-#if !DISABLE_DEBUG_OUTPUT
-#define printf(x...) _printf(x)
-#else
-static inline int __PRINTFLIKE(1, 2) printf(const char *fmt, ...) { return 0; }
-#endif
-
-int _printf(const char *fmt, ...) __PRINTFLIKE(1, 2);
-int sprintf(char *str, const char *fmt, ...) __PRINTFLIKE(2, 3);
-int snprintf(char *str, size_t len, const char *fmt, ...) __PRINTFLIKE(3, 4);
-int vsprintf(char *str, const char *fmt, va_list ap);
-int vsnprintf(char *str, size_t len, const char *fmt, va_list ap);
-
-/* printf engine that parses the format string and generates output */
-
-/* function pointer to pass the engine,
- * return code is remaining characters in destination (or INT_MAX for infinity)
- */
-typedef int (*_printf_engine_output_func)(char c, void *state);
-
-int _printf_engine(_printf_engine_output_func out, void *state, const char *fmt, va_list ap);
-
-#if defined(__cplusplus)
-}
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __REG_H
-#define __REG_H
-
-#include <sys/types.h>
-
-/* low level macros for accessing memory mapped hardware registers */
-#define REG64(addr) ((volatile uint64_t *)(addr))
-#define REG32(addr) ((volatile uint32_t *)(addr))
-#define REG16(addr) ((volatile uint16_t *)(addr))
-#define REG8(addr) ((volatile uint8_t *)(addr))
-
-#define RMWREG64(addr, startbit, width, val) *REG64(addr) = (*REG64(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit))
-#define RMWREG32(addr, startbit, width, val) *REG32(addr) = (*REG32(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit))
-#define RMWREG16(addr, startbit, width, val) *REG16(addr) = (*REG16(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit))
-#define RMWREG8(addr, startbit, width, val) *REG8(addr) = (*REG8(addr) & ~(((1<<(width)) - 1) << (startbit))) | ((val) << (startbit))
-
-#define writel(v, a) (*REG32(a) = (v))
-#define readl(a) (*REG32(a))
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __STDBOOL_H
-#define __STDBOOL_H
-
-#ifndef __cplusplus
-
-#define bool _Bool
-#define true 1
-#define false 0
-
-#endif
-
-#define __bool_true_false_are_defined 1
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __STDDEF_H
-#define __STDDEF_H
-
-#include <compiler.h> // for __offsetof()
-
-#define offsetof(x, y) __offsetof(x, y)
-
-typedef long ptrdiff_t;
-
-#ifndef _SIZE_T_DEFINED_
-typedef unsigned long size_t;
-#endif
-typedef long ssize_t;
-
-#define NULL 0
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __STDINT_H
-#define __STDINT_H
-
-#include <sys/types.h> // for ULONG_MAX
-
-typedef unsigned char uint8_t;
-typedef unsigned short uint16_t;
-typedef unsigned int uint32_t;
-typedef unsigned long long uint64_t;
-typedef signed char int8_t;
-typedef short int16_t;
-typedef int int32_t;
-typedef long long int64_t;
-
-typedef int8_t int_least8_t;
-typedef int16_t int_least16_t;
-typedef int32_t int_least32_t;
-typedef int64_t int_least64_t;
-typedef uint8_t uint_least8_t;
-typedef uint16_t uint_least16_t;
-typedef uint32_t uint_least32_t;
-typedef uint64_t uint_least64_t;
-
-typedef int8_t int_fast8_t;
-typedef int16_t int_fast16_t;
-typedef int32_t int_fast32_t;
-typedef int64_t int_fast64_t;
-typedef uint8_t uint_fast8_t;
-typedef uint16_t uint_fast16_t;
-typedef uint32_t uint_fast32_t;
-typedef uint64_t uint_fast64_t;
-
-typedef long intptr_t;
-typedef unsigned long uintptr_t;
-
-typedef long long intmax_t;
-typedef unsigned long long uintmax_t;
-
-#define SIZE_MAX ULONG_MAX
-
-#endif
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __STDLIB_H
-#define __STDLIB_H
-
-#include <sys/types.h>
-#include <stddef.h>
-#include <malloc.h>
-#include <printf.h>
-#include <endian.h>
-#include <arch/defines.h>
-
-int atoi(const char *num);
-unsigned int atoui(const char *num);
-long atol(const char *num);
-unsigned long atoul(const char *num);
-
-#define MIN(a, b) (((a) < (b)) ? (a) : (b))
-#define MAX(a, b) (((a) > (b)) ? (a) : (b))
-
-#define ROUNDUP(a, b) (((a) + ((b)-1)) & ~((b)-1))
-#define ROUNDDOWN(a, b) ((a) & ~((b)-1))
-
-/* allocate a buffer on the stack aligned and padded to the cpu's cache line size */
-#define STACKBUF_DMA_ALIGN(var, size) \
- uint8_t __##var[(size) + CACHE_LINE]; uint8_t *var = (uint8_t *)(ROUNDUP((addr_t)__##var, CACHE_LINE))
-
-#endif
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __LIB_STRING_H
-#define __LIB_STRING_H
-
-#include <stddef.h>
-#include <compiler.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void *memchr (void const *, int, size_t) __PURE;
-int memcmp (void const *, const void *, size_t) __PURE;
-void *memcpy (void *, void const *, size_t);
-void *memmove(void *, void const *, size_t);
-void *memset (void *, int, size_t);
-
-char *strcat(char *, char const *);
-char *strchr(char const *, int) __PURE;
-int strcmp(char const *, char const *) __PURE;
-char *strcpy(char *, char const *);
-char const *strerror(int) __CONST;
-size_t strlen(char const *) __PURE;
-char *strncat(char *, char const *, size_t);
-int strncmp(char const *, char const *, size_t) __PURE;
-char *strncpy(char *, char const *, size_t);
-char *strpbrk(char const *, char const *) __PURE;
-char *strrchr(char const *, int) __PURE;
-size_t strspn(char const *, char const *) __PURE;
-size_t strcspn(const char *s, const char *) __PURE;
-char *strstr(char const *, char const *) __PURE;
-char *strtok(char *, char const *);
-int strcoll(const char *s1, const char *s2) __PURE;
-size_t strxfrm(char *dest, const char *src, size_t n) __PURE;
-char *strdup(const char *str) __MALLOC;
-
-#ifdef __cplusplus
-} /* extern "C" */
-#endif
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/* non standard */
-void *bcopy(void const *, void *, size_t);
-void bzero(void *, size_t);
-size_t strlcat(char *, char const *, size_t);
-size_t strlcpy(char *, char const *, size_t);
-int strncasecmp(char const *, char const *, size_t) __PURE;
-int strnicmp(char const *, char const *, size_t) __PURE;
-size_t strnlen(char const *s, size_t count) __PURE;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2008-2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __SYS_TYPES_H
-#define __SYS_TYPES_H
-
-#ifndef __cplusplus
-#define false 0
-#define true 1
-typedef int bool;
-#endif
-
-#include <stddef.h>
-#include <stdint.h>
-
-typedef unsigned char uchar;
-typedef unsigned short ushort;
-typedef unsigned int uint;
-typedef unsigned long ulong;
-typedef unsigned char u_char;
-typedef unsigned short u_short;
-typedef unsigned int u_int;
-typedef unsigned long u_long;
-
-typedef long long off_t;
-
-typedef int status_t;
-
-typedef uintptr_t addr_t;
-typedef uintptr_t vaddr_t;
-typedef uint64_t nsaddr_t;
-
-#ifdef WITH_PADDR_T_64BIT
-typedef uint64_t paddr_t;
-#else
-typedef uintptr_t paddr_t;
-#endif
-
-typedef int kobj_id;
-
-#define USHRT_MAX ((u16)(~0U))
-#define SHRT_MAX ((s16)(USHRT_MAX>>1))
-#define SHRT_MIN ((s16)(-SHRT_MAX - 1))
-#define INT_MAX ((int)(~0U>>1))
-#define INT_MIN (-INT_MAX - 1)
-#define UINT_MAX (~0U)
-#define LONG_MAX ((long)(~0UL>>1))
-#define LONG_MIN (-LONG_MAX - 1)
-#define ULONG_MAX (~0UL)
-#define LLONG_MAX ((long long)(~0ULL>>1))
-#define LLONG_MIN (-LLONG_MAX - 1)
-#define ULLONG_MAX (~0ULL)
-#define INFINITE_TIME ULONG_MAX
-typedef unsigned long lk_time_t;
-typedef unsigned long long lk_bigtime_t;
-
-#define TIME_GTE(a, b) ((long)((a) - (b)) >= 0)
-#define TIME_LTE(a, b) ((long)((a) - (b)) <= 0)
-#define TIME_GT(a, b) ((long)((a) - (b)) > 0)
-#define TIME_LT(a, b) ((long)((a) - (b)) < 0)
-#define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
-
-enum handler_return {
- INT_NO_RESCHEDULE = 0,
- INT_RESCHEDULE,
-};
-
-#endif
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-ifeq ($(SUBARCH),arm)
-
-ASM_STRING_OPS := bcopy bzero memcpy memmove memset
-
-MODULE_SRCS += \
- $(LOCAL_DIR)/memcpy.S \
- $(LOCAL_DIR)/memset.S
-
-# filter out the C implementation
-C_STRING_OPS := $(filter-out $(ASM_STRING_OPS),$(C_STRING_OPS))
-endif
-
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * Neither the name of ARM nor the names of its contributors may be used
- * to endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <asm.h>
-
-/* CLIDR definitions */
-#define LOUIS_SHIFT 21
-#define LOC_SHIFT 24
-#define CLIDR_FIELD_WIDTH 3
-
-/* CSSELR definitions */
-#define LEVEL_SHIFT 1
-
-.macro dcache_line_size reg, tmp
- mrs \tmp, ctr_el0
- ubfx \tmp, \tmp, #16, #4
- mov \reg, #4
- lsl \reg, \reg, \tmp
-.endm
-
- /* ------------------------------------------
- * Clean+Invalidate from base address till
- * size. 'x0' = addr, 'x1' = size
- * ------------------------------------------
- */
-FUNCTION(flush_dcache_range)
- dcache_line_size x2, x3
- add x1, x0, x1
- sub x3, x2, #1
- bic x0, x0, x3
-flush_loop:
- dc civac, x0
- add x0, x0, x2
- cmp x0, x1
- b.lo flush_loop
- dsb sy
- ret
-
-
- /* ------------------------------------------
- * Invalidate from base address till
- * size. 'x0' = addr, 'x1' = size
- * ------------------------------------------
- */
-FUNCTION(inv_dcache_range)
- dcache_line_size x2, x3
- add x1, x0, x1
- sub x3, x2, #1
- bic x0, x0, x3
-inv_loop:
- dc ivac, x0
- add x0, x0, x2
- cmp x0, x1
- b.lo inv_loop
- dsb sy
- ret
-
-
- /* ---------------------------------------------------------------
- * Data cache operations by set/way to the level specified
- *
- * The main function, do_dcsw_op requires:
- * x0: The operation type (0-2), as defined in arch.h
- * x3: The last cache level to operate on
- * x9: clidr_el1
- * and will carry out the operation on each data cache from level 0
- * to the level in x3 in sequence
- *
- * The dcsw_op macro sets up the x3 and x9 parameters based on
- * clidr_el1 cache information before invoking the main function
- * ---------------------------------------------------------------
- */
-
-.macro dcsw_op shift, fw, ls
- mrs x9, clidr_el1
- ubfx x3, x9, \shift, \fw
- lsl x3, x3, \ls
- b do_dcsw_op
-.endm
-
-do_dcsw_op:
- cbz x3, exit
- mov x10, xzr
- adr x14, dcsw_loop_table // compute inner loop address
- add x14, x14, x0, lsl #5 // inner loop is 8x32-bit instructions
- mov x0, x9
- mov w8, #1
-loop1:
- add x2, x10, x10, lsr #1 // work out 3x current cache level
- lsr x1, x0, x2 // extract cache type bits from clidr
- and x1, x1, #7 // mask the bits for current cache only
- cmp x1, #2 // see what cache we have at this level
- b.lt level_done // nothing to do if no cache or icache
-
- msr csselr_el1, x10 // select current cache level in csselr
- isb // isb to sych the new cssr&csidr
- mrs x1, ccsidr_el1 // read the new ccsidr
- and x2, x1, #7 // extract the length of the cache lines
- add x2, x2, #4 // add 4 (line length offset)
- ubfx x4, x1, #3, #10 // maximum way number
- clz w5, w4 // bit position of way size increment
- lsl w9, w4, w5 // w9 = aligned max way number
- lsl w16, w8, w5 // w16 = way number loop decrement
- orr w9, w10, w9 // w9 = combine way and cache number
- ubfx w6, w1, #13, #15 // w6 = max set number
- lsl w17, w8, w2 // w17 = set number loop decrement
- dsb sy // barrier before we start this level
- br x14 // jump to DC operation specific loop
-
-level_done:
- add x10, x10, #2 // increment cache number
- cmp x3, x10
- b.gt loop1
- msr csselr_el1, xzr // select cache level 0 in csselr
- dsb sy // barrier to complete final cache operation
- isb
-exit:
- ret
-
-.macro dcsw_loop _op
-loop2_\_op:
- lsl w7, w6, w2 // w7 = aligned max set number
-
-loop3_\_op:
- orr w11, w9, w7 // combine cache, way and set number
- dc \_op, x11
- subs w7, w7, w17 // decrement set number
- b.ge loop3_\_op
-
- subs x9, x9, x16 // decrement way number
- b.ge loop2_\_op
-
- b level_done
-.endm
-
-dcsw_loop_table:
- dcsw_loop isw
- dcsw_loop cisw
- dcsw_loop csw
-
-FUNCTION(dcsw_op_louis)
- dcsw_op #LOUIS_SHIFT, #CLIDR_FIELD_WIDTH, #LEVEL_SHIFT
-
-
-FUNCTION(dcsw_op_all)
- dcsw_op #LOC_SHIFT, #CLIDR_FIELD_WIDTH, #LEVEL_SHIFT
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ARCH_ARM64_ASM_H
-#define __ARCH_ARM64_ASM_H
-
-/* Cortex A57/A53 CPU IDs */
-#define CORTEX_A57_MP 0xd07
-#define CORTEX_A53_MP 0xd03
-
-/* SMP enable bit */
-#define CPUECTLR_SMP_BIT (1 << 6)
-
-/* Double lock control bit */
-#define OSDLR_DBL_LOCK_BIT 1
-
-#define MODE_EL(x) ((x) << 2)
-
-/* flag indicating in which mode CPU is returned */
-#define MON_CPU_RETURN_64 0x0
-#define MON_CPU_RETURN_32 0x1
-
-/* SPSR_EL3 register fields/settings */
-#define MON_SPSR_EXC_MASKED (0x7 << 6)
-
-/* SCR_EL3 register fields/settings */
-#define MON_SCR_NS_MODE (0x1 << 0)
-#define MON_SCR_EL3FIQ_EN (0x1 << 2)
-#define MON_SCR_RESV1 (0x3 << 4)
-#define MON_SCR_32BIT (0x0 << 10)
-#define MON_SCR_64BIT (0x1 << 10)
-
-/* ARM GIC cpu/dist offsets */
-#define ARM_GIC_GICC_CTLR 0x0
-#define ARM_GIC_GICC_PMR 0x4
-#define ARM_GIC_GICD_IGROUPR0 0x80
-
-/* get CPU index (0 through 3) */
-.macro cpuidx, tmp
- mrs \tmp, mpidr_el1
- and \tmp, \tmp, #0xF
-.endm
-
-/* enter secure EL1 in 32bit mode */
-.macro mon_scr_secure_32, tmp
- mrs \tmp, scr_el3
- bic \tmp, \tmp, #(0x1 << 10) // clear RW
- bic \tmp, \tmp, #(0x1 << 0) // clear NS
- msr scr_el3, \tmp
- isb
-.endm
-
-.macro mon_scr_non_secure_64, tmp
- mrs \tmp, scr_el3
- orr \tmp, \tmp, #(0x1 << 10) // set RW
- orr \tmp, \tmp, #(0x1 << 0) // set NS
- msr scr_el3, \tmp
- isb
-.endm
-
-/*
- * Register aliases.
- */
-lr .req x30 // link register
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __ARCH_ARM_MMU_LDESC_H
-#define __ARCH_ARM_MMU_LDESC_H
-
-#include <arch/defines.h>
-
-#define MMU_MEMORY_SET_ATTR_IDX(val) (((val) & 0x7) << 2)
-
-#define MMU_MEMORY_WRITE_BACK_NO_ALLOCATE 0xE
-#define MMU_MEMORY_WRITE_BACK_ALLOCATE 0xF
-
-/* permissions */
-#define MMU_MEMORY_AP_P_RW_U_NA ((0x0 << 7) | (0x0 << 6))
-#define MMU_MEMORY_AP_P_RW_U_RW ((0x0 << 7) | (0x1 << 6))
-#define MMU_MEMORY_AP_P_RO_U_NA ((0x1 << 7) | (0x0 << 6))
-#define MMU_MEMORY_AP_P_RO_U_RO ((0x1 << 7) | (0x1 << 6))
-
-/* shareable */
-#define MMU_MEMORY_SH_NON_SHAREABLE ((0x0 << 9) | (0x0 << 8))
-#define MMU_MEMORY_SH_OUTER_SHAREABLE ((0x1 << 9) | (0x0 << 8))
-#define MMU_MEMORY_SH_INNER_SHAREABLE ((0x1 << 9) | (0x1 << 8))
-
-#define MMU_MEMORY_NON_GLOBAL (1 << 11)
-#define MMU_MEMORY_ACCESS_FLAG (1 << 10)
-#define MMU_MEMORY_NON_SECURE (1 << 5)
-
-/* tcr */
-#define MMU_MEMORY_TCR_T0SZ(x) ((64 - (x)) << 0)
-#define MMU_MEMORY_TCR_T1SZ(x) ((64 - (x)) << 16)
-
-#define MMU_MEMORY_TCR_SH0_NON_SHARED (0 << 12)
-#define MMU_MEMORY_TCR_TG0_4K (0 << 14)
-#define MMU_MEMORY_TCR_TG0_16K (2 << 14)
-#define MMU_MEMORY_TCR_TG0_64K (1 << 14)
-#define MMU_MEMORY_TCR_PS_40BIT (2 << 16)
-#define MMU_MEMORY_TCR_ASID_IN_TTBR0 (0 << 22)
-#define MMU_MEMORY_TCR_SH1_NON_SHARED (0 << 28)
-#define MMU_MEMORY_TCR_TG1_4K (2 << 30)
-#define MMU_MEMORY_TCR_TG1_16K (1 << 30)
-#define MMU_MEMORY_TCR_TG1_64K (3 << 30)
-#define MMU_MEMORY_TCR_IPS_40BIT (2 << 32)
-#define MMU_MEMORY_TCR_ASID_16BIT (1 << 36)
-
-#define MMU_MEMORY_RGN_NON_CACHEABLE 0
-#define MMU_MEMORY_RGN_WRITE_BACK_ALLOCATE 1
-#define MMU_MEMORY_RGN_WRITE_THROUGH 2
-#define MMU_MEMORY_RGN_WRITE_BACK_NO_ALLOCATE 3
-
-#define MMU_MEMORY_TCR_OUTER_RGN1(val) (((val) & 0x3) << 26)
-#define MMU_MEMORY_TCR_OUTER_RGN0(val) (((val) & 0x3) << 10)
-#define MMU_MEMORY_TCR_INNER_RGN1(val) (((val) & 0x3) << 24)
-#define MMU_MEMORY_TCR_INNER_RGN0(val) (((val) & 0x3) << 8)
-
-/* page granule (using 4K) */
-#define MMU_PAGE_GRANULE_4K (12)
-#define MMU_PAGE_GRANULE_16K (14)
-#define MMU_PAGE_GRANULE_64K (16)
-
-#define MMU_ENTRY_SHIFT (3) /* each entry takes 2^3 (8) bytes */
-#define MMU_ENTRY_PHYS_ADDR_MSB (48) /* block/table holds max 2^48 phys addr */
-
-#define MMU_ENTRIES_PER_LEVEL_BITS (MMU_PAGE_GRANULE - MMU_ENTRY_SHIFT)
-#define MMU_ENTRIES_PER_LEVEL (1 << MMU_ENTRIES_PER_LEVEL_BITS)
-#define MMU_ENTRIES_LEVEL_MASK (MMU_ENTRIES_PER_LEVEL - 1)
-
-#define MMU_L3_INDEX_LSB (MMU_PAGE_GRANULE)
-#define MMU_L2_INDEX_LSB (MMU_L3_INDEX_LSB + MMU_ENTRIES_PER_LEVEL_BITS)
-#define MMU_L1_INDEX_LSB (MMU_L2_INDEX_LSB + MMU_ENTRIES_PER_LEVEL_BITS)
-#define MMU_L0_INDEX_LSB (MMU_L1_INDEX_LSB + MMU_ENTRIES_PER_LEVEL_BITS)
-
-/* table descriptor level 2 */
-#define MMU_MEMORY_TTBR_L2_VADDR_SHIFT MMU_L2_INDEX_LSB
-#define MMU_MEMORY_TTBR_L2_INDEX_BITS MMU_ENTRIES_PER_LEVEL_BITS
-#define MMU_MEMORY_TTBR_L2_INDEX_MASK MMU_ENTRIES_LEVEL_MASK
-#define MMU_MEMORY_TTBR_L2_SIZE (1 << (MMU_MEMORY_TTBR_L2_INDEX_BITS + 3))
-
-#define MMU_L2_BLOCK_SHIFT (MMU_L2_INDEX_LSB)
-#define MMU_L2_BLOCK_SIZE (1 << MMU_L2_BLOCK_SHIFT)
-
-/* table descriptor level 3 */
-#define MMU_MEMORY_TTBR_L3_VADDR_SHIFT MMU_PAGE_GRANULE
-#define MMU_MEMORY_TTBR_L3_INDEX_BITS MMU_ENTRIES_PER_LEVEL_BITS
-#define MMU_MEMORY_TTBR_L3_INDEX_MASK MMU_ENTRIES_LEVEL_MASK
-#define MMU_MEMORY_TTBR_L3_SIZE (1 << (MMU_MEMORY_TTBR_L3_INDEX_BITS + 3))
-
-/* phys address of next table (for level 2/level 3 tables) */
-#define MMU_MEMORY_TABLE_ADDR_ALIGN (1 << MMU_PAGE_GRANULE)
-#define MMU_MEMORY_TABLE_ADDR_BITS (MMU_ENTRY_PHYS_ADDR_MSB - MMU_PAGE_GRANULE)
-#define MMU_MEMORY_TABLE_ADDR_MASK (((1UL << MMU_MEMORY_TABLE_ADDR_BITS) - 1) \
- << MMU_PAGE_GRANULE)
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __MONITOR_MACROS_H
-#define __MONITOR_MACROS_H
-
-/* number of regs of each type */
-#define NUM_GPR_REGS 28
-#define NUM_MMU_REGS 6
-#define NUM_SYS_REGS 7
-
-#define NUM_CTX_REGS (NUM_GPR_REGS + NUM_MMU_REGS + NUM_SYS_REGS)
-
-/* byte offsets with context buffer */
-#define CTX_GPR_OFFSET 0
-#define CTX_MMU_OFFSET (NUM_GPR_REGS << 0x3)
-#define CTX_SYS_OFFSET (CTX_MMU_OFFSET + (NUM_MMU_REGS << 0x3))
-
-.macro mon_save_el1_gpr, ctxptr
- /* save general purpose CPU state */
- stp x4, x5, [\ctxptr, #CTX_GPR_OFFSET]
- stp x6, x7, [\ctxptr, #(CTX_GPR_OFFSET + 0x10)]
- stp x8, x9, [\ctxptr, #(CTX_GPR_OFFSET + 0x20)]
- stp x10, x11, [\ctxptr, #(CTX_GPR_OFFSET + 0x30)]
- stp x12, x13, [\ctxptr, #(CTX_GPR_OFFSET + 0x40)]
- stp x14, x15, [\ctxptr, #(CTX_GPR_OFFSET + 0x50)]
- stp x16, x17, [\ctxptr, #(CTX_GPR_OFFSET + 0x60)]
- stp x18, x19, [\ctxptr, #(CTX_GPR_OFFSET + 0x70)]
- stp x20, x21, [\ctxptr, #(CTX_GPR_OFFSET + 0x80)]
- stp x22, x23, [\ctxptr, #(CTX_GPR_OFFSET + 0x90)]
- stp x24, x25, [\ctxptr, #(CTX_GPR_OFFSET + 0xA0)]
- stp x26, x27, [\ctxptr, #(CTX_GPR_OFFSET + 0xB0)]
- mrs x27, sp_el1
- stp x28, x27, [\ctxptr, #(CTX_GPR_OFFSET + 0xC0)]
- stp x29, x30, [\ctxptr, #(CTX_GPR_OFFSET + 0xD0)]
-.endm
-
-.macro mon_save_el1_mmu, ctxptr
- /* save MMU related CPU state */
-
- .if (\ctxptr == x0 || \ctxptr == x1)
- .error "can't use x0 or x1 as ctxptr (used internally)."
- .endif
-
- mrs x0, mair_el1
- mrs x1, tcr_el1
- stp x0, x1, [\ctxptr, #CTX_MMU_OFFSET]
- mrs x0, ttbr0_el1
- mrs x1, ttbr1_el1
- stp x0, x1, [\ctxptr, #(CTX_MMU_OFFSET + 0x10)]
- mrs x0, contextidr_el1
- mrs x1, sctlr_el1 /* for M bit */
- stp x0, x1, [\ctxptr, #(CTX_MMU_OFFSET + 0x20)]
-.endm
-
-.macro mon_save_el1_sys, ctxptr
- /* save SYS related CPU state */
-
- .if (\ctxptr == x0 || \ctxptr == x1)
- .error "can't use x0 or x1 as ctxptr (used internally)."
- .endif
-
- mrs x0, cpacr_el1
- mrs x1, actlr_el1
- stp x0, x1, [\ctxptr, #CTX_SYS_OFFSET]
- mrs x0, vbar_el1
- mrs x1, tpidr_el1
- stp x0, x1, [\ctxptr, #(CTX_SYS_OFFSET + 0x10)]
- mrs x0, spsr_el3
- mrs x1, elr_el3
- stp x0, x1, [\ctxptr, #(CTX_SYS_OFFSET + 0x20)]
- mrs x0, tpidrro_el0
- str x0, [\ctxptr, #(CTX_SYS_OFFSET + 0x30)]
-.endm
-
-.macro mon_save_el1_regs, ctxptr
- mon_save_el1_gpr \ctxptr
- mon_save_el1_mmu \ctxptr
- mon_save_el1_sys \ctxptr
-.endm
-
-.macro mon_restore_el1_gpr, ctxptr
- /* restore general purpose CPU state */
-
- ldp x4, x5, [\ctxptr, #CTX_GPR_OFFSET]
- ldp x6, x7, [\ctxptr, #(CTX_GPR_OFFSET + 0x10)]
- ldp x8, x9, [\ctxptr, #(CTX_GPR_OFFSET + 0x20)]
- ldp x10, x11, [\ctxptr, #(CTX_GPR_OFFSET + 0x30)]
- ldp x12, x13, [\ctxptr, #(CTX_GPR_OFFSET + 0x40)]
- ldp x14, x15, [\ctxptr, #(CTX_GPR_OFFSET + 0x50)]
- ldp x16, x17, [\ctxptr, #(CTX_GPR_OFFSET + 0x60)]
- ldp x18, x19, [\ctxptr, #(CTX_GPR_OFFSET + 0x70)]
- ldp x20, x21, [\ctxptr, #(CTX_GPR_OFFSET + 0x80)]
- ldp x22, x23, [\ctxptr, #(CTX_GPR_OFFSET + 0x90)]
- ldp x24, x25, [\ctxptr, #(CTX_GPR_OFFSET + 0xA0)]
- ldp x26, x27, [\ctxptr, #(CTX_GPR_OFFSET + 0xB0)]
- ldp x28, x29, [\ctxptr, #(CTX_GPR_OFFSET + 0xC0)]
- msr sp_el1, x29
- ldp x29, x30, [\ctxptr, #(CTX_GPR_OFFSET + 0xD0)]
-.endm
-
-.macro mon_restore_el1_mmu, ctxptr
- /* restore MMU related CPU state */
-
- .if (\ctxptr == x0 || \ctxptr == x1)
- .error "can't use x0 or x1 as ctxptr (used internally)."
- .endif
-
- ldp x0, x1, [\ctxptr, #CTX_MMU_OFFSET]
- msr mair_el1, x0
- msr tcr_el1, x1
- ldp x0, x1, [\ctxptr, #(CTX_MMU_OFFSET + 0x10)]
- msr ttbr0_el1, x0
- msr ttbr1_el1, x1
- ldp x0, x1, [\ctxptr, #(CTX_MMU_OFFSET + 0x20)]
- msr contextidr_el1, x0
- msr sctlr_el1, x1 /* for M bit */
- isb
-.endm
-
-.macro mon_restore_el1_sys, ctxptr
- /* save SYS related CPU state */
-
- .if (\ctxptr == x0 || \ctxptr == x1)
- .error "can't use x0 or x1 as ctxptr (used internally)."
- .endif
-
- ldp x0, x1, [\ctxptr, #CTX_SYS_OFFSET]
- msr cpacr_el1, x0
- msr actlr_el1, x1
- ldp x0, x1, [\ctxptr, #(CTX_SYS_OFFSET + 0x10)]
- msr vbar_el1, x0
- msr tpidr_el1, x1
- ldp x0, x1, [\ctxptr, #(CTX_SYS_OFFSET + 0x20)]
- msr spsr_el3, x0
- msr elr_el3, x1
- ldr x0, [\ctxptr, #(CTX_SYS_OFFSET + 0x30)]
- msr tpidrro_el0, x0
- isb
-.endm
-
-.macro mon_restore_el1_regs, ctxptr
- mon_restore_el1_mmu \ctxptr
- mon_restore_el1_sys \ctxptr
- mon_restore_el1_gpr \ctxptr
-.endm
-
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PSCI_H
-#define __PSCI_H
-
-#ifndef ASSEMBLY
-#include <sys/types.h>
-#endif
-
-#define PSCI_FUNC_ID_VERSION 0x84000000
-#define PSCI_FUNC_ID_CPU_SUSPEND_LEGACY 0x84000001
-#define PSCI_FUNC_ID_CPU_SUSPEND 0xC4000001
-#define PSCI_FUNC_ID_CPU_OFF 0x84000002
-#define PSCI_FUNC_ID_CPU_ON 0xC4000003
-#define PSCI_FUNC_ID_AFFINITY_INFO 0xC4000004
-#define PSCI_FUNC_ID_MIGRATE 0xC4000005
-
-#define PSCI_RETURN_SUCCESS (0)
-#define PSCI_RETURN_NOT_SUPPORTED (-1)
-#define PSCI_RETURN_INVALID_PARAMS (-2)
-#define PSCI_RETURN_DENIED (-3)
-#define PSCI_RETURN_ALREADY_ON (-4)
-#define PSCI_RETURN_ON_PENDING (-5)
-#define PSCI_RETURN_INTERNAL_FAILURE (-6)
-#define PSCI_RETURN_NOT_PRESENT (-7)
-#define PSCI_RETURN_DISABLED (-8)
-
-#define PSCI_POWER_STATE_TYPE_STANDBY 0
-#define PSCI_POWER_STATE_TYPE_POWER_DOWN 1
-
-#define PSCI_POWER_STATE_ID_MASK 0xffff
-#define PSCI_POWER_STATE_ID_SHIFT 0
-#define PSCI_POWER_STATE_TYPE_MASK 0x1
-#define PSCI_POWER_STATE_TYPE_SHIFT 16
-#define PSCI_POWER_STATE_AFFL_MASK 0x3
-#define PSCI_POWER_STATE_AFFL_SHIFT 24
-
-#ifndef ASSEMBLY
-void platform_psci_start(int cpu_id);
-int platform_psci_cpu_suspend(int cpu, uint32_t pwr_state);
-void platform_psci_cpu_resume(int cpu);
-void platform_psci_cpu_off(int cpu, uint32_t pwr_state);
-int platform_psci_cpu_on(int cpu);
-#endif
-
-#endif
+++ /dev/null
-OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
-OUTPUT_ARCH(aarch64)
-
-ENTRY(_start)
-SECTIONS
-{
- . = %MEMBASE%;
-
- /* text/read-only data */
- .text.boot.vectab1 : { KEEP(*(.text.boot.vectab1)) }
- .text.boot.vectab2 : { KEEP(*(.text.boot.vectab2)) }
- .text.boot : { KEEP(*(.text.boot)) }
- .text : { *(.text .text.* .glue_7* .gnu.linkonce.t.*) } =0x9090
-
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) *(.rel.gnu.linkonce.t*) }
- .rela.text : { *(.rela.text) *(.rela.gnu.linkonce.t*) }
- .rel.data : { *(.rel.data) *(.rel.gnu.linkonce.d*) }
- .rela.data : { *(.rela.data) *(.rela.gnu.linkonce.d*) }
- .rel.rodata : { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
- .rela.rodata : { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.init : { *(.rel.init) }
- .rela.init : { *(.rela.init) }
- .rel.fini : { *(.rel.fini) }
- .rela.fini : { *(.rela.fini) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) } =0x9090
- .plt : { *(.plt) }
-
- /* .ARM.exidx is sorted, so has to go in its own output section. */
- __exidx_start = .;
- .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
- __exidx_end = .;
-
- .rodata : {
- *(.rodata .rodata.* .gnu.linkonce.r.*)
- . = ALIGN(8);
- __rodata_end = . ;
- }
-
- /* writable data */
- __data_start_rom = .;
- /* in one segment binaries, the rom data address is on top of the ram data address */
- __data_start = .;
- .data : SUBALIGN(8) {
- *(.data .data.* .gnu.linkonce.d.*)
- }
-
- __ctor_list = .;
- .ctors : { *(.ctors) }
- __ctor_end = .;
- __dtor_list = .;
- .dtors : { *(.dtors) }
- __dtor_end = .;
- .got : { *(.got.plt) *(.got) }
- .dynamic : { *(.dynamic) }
-
- __data_end = .;
-
- /* unintialized data (in same segment as writable data) */
- .prebss : SUBALIGN(8) { KEEP(*(.bss.prebss.*)) }
- .bss.initial_stack : SUBALIGN(8) { KEEP(*(.bss.initial_stack)) }
- __bss_start = .;
- .bss : SUBALIGN(8) {
- *(.bss .bss.*)
- *(COMMON)
- }
- __bss_end = .;
-
- .bss-filler : {
- /* This .bss-filler section serves two purposes.
- To execute the task in-place, the preceding .bss section needs to
- occupy real space in the image, so when loaded into LK, there's
- memory underneath it. Adding this section after .bss, forces space
- in the file to be allocated.
- This section also rounds .bss to be page-aligned, which is required,
- so when multiple tasks are concatenated together in loading the image,
- the end of the task (before the beginning of the next) has the needed
- page alignment */
- . += (__bss_end - __bss_start);
- BYTE(0);
- . += 1;
- . = ALIGN(0x1000);
- } =0
-
- _end = .;
-
- /* Strip unnecessary stuff */
- /DISCARD/ : { *(.comment .note .eh_frame) }
-}
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <config.h>
-#include <asm.h>
-#include <arch/arm.h>
-#include <arm64/asm.h>
-#include <psci.h>
-#include <arm64/monitor_macros.h>
-
-#define CORTEX_A53_MP_R0 0x410fd03
-#define DCCISW 1
-
-/* called both for cold reset and boot_secondary */
-FUNCTION(mon_init_cpu)
- mrs x4, currentel
- cmp x4, #MODE_EL(3)
- b.ne . // error, if not EL3
-
- /* initialize SCR to secure state */
- mov x3, #(MON_SCR_RESV1 | MON_SCR_64BIT)
- msr scr_el3, x3
- isb
-
- /* set vbar (with phys, to catch setup errors) */
- adr x3, _vector_el3
- msr vbar_el3, x3
-
- /* Check if ARM Cortex-A53 with revisions R0P0, R0P1, R0P2 */
- mrs x3, MIDR_EL1
- lsr x4, x3, #4
- ldr x12, =CORTEX_A53_MP_R0
- cmp x4, x12
-
- b.ne post_a53_erratum
- and x4, x3, #0xf
- cmp x4, #2
- b.gt post_a53_erratum
-
- /*
- * Cortex-A53 erratum 826319: disable evict and writeevict
- * transactions
- */
- mrs x3, s3_1_c15_c0_0
- orr x3, x3, #8 // disable clean/evict
- mov x4, #0x4000
- bic x3, x3, x4 // enable UniqueClean eviction
- msr s3_1_c15_c0_0, x3
-
-post_a53_erratum:
-#if !defined(MONTARGET_DENVER)
- /* set SMPEN for A57/A53 */
- mrs x0, s3_1_c15_c2_1
- orr x0, x0, #CPUECTLR_SMP_BIT
- msr s3_1_c15_c2_1, x0
-#endif
-
- /* enable I cache, disable MMU and alignment checks */
- mrs x4, sctlr_el3
- bic x4, x4, #(1 << 25)
- orr x4, x4, #(1 << 12)
- bic x4, x4, #((1 << 2) | (1 << 1) | (1 << 0))
- msr sctlr_el3, x4
-
- /* set freq for arch general timer */
- ldr x0, =ARM_SYSTEM_COUNTER_FREQ
- msr cntfrq_el0, x0
-
- /* allow non-privileged access to CNTVCT */
- mrs x0, cntkctl_el1
- orr x0, x0, #(1 << 1)
- msr cntkctl_el1, x0
-
- /* enable the cycle count register */
- mrs x0, pmcr_el0
- ubfx x0, x0, #11, #5 // read PMCR.N field
- mov x4, #1
- lsl x0, x4, x0
- sub x0, x0, #1 // mask of event counters
- orr x0, x0, #0x80000000 // disable overflow intrs
- msr pmintenclr_el1, x0
- msr pmuserenr_el0, x4 // enable user mode access
-
- /* mark per-CPU dist GROUP0 intrs non-secure */
- ldr x4, =ARM_GIC_DIST_BASE
- mov w3, #(~0)
- str w3, [x4, ARM_GIC_GICD_IGROUPR0]
-
- /* enables GROUP0/GROUP1 intrs, signals GROUP0 with FIQ */
- ldr x4, =ARM_GIC_CPU_BASE
- mov w3, #((0xF << 5) | (0x1 << 3) | (0x3 << 0))
- str w3, [x4, ARM_GIC_GICC_CTLR]
-
- /* init low pri mask, so NS can set its value */
- mov w3, #0xFF
- str w3, [x4, ARM_GIC_GICC_PMR]
-
- /* disable copro traps to EL3 */
- msr cptr_el3, xzr
-
- cpuidx x12
-
- /* setup per-cpu monitor stack (dividing up single 4K page) */
- msr spsel, #1
- ldr x3, =monitor_stack_top
- lsl x4, x12, #10 // each CPU gets a 1K stack
- sub x3, x3, x4
- mov sp, x3
-
- ret
-
-/*
- * Return to address saved in __mon_cpu_return_addr, in
- * AARCH32 SVC (non-secure) mode.
- */
-FUNCTION(mon_return_aarch32_ns)
- /* load return address */
- cpuidx x1
- adr x2, __mon_cpu_return_addr
- ldr x2, [x2, x1, lsl #3]
-
- msr elr_el3, x2
- mov x2, #(MON_SCR_RESV1 | MON_SCR_32BIT | MON_SCR_NS_MODE)
- msr scr_el3, x2
- mov x2, #(MON_SPSR_EXC_MASKED | MODE_SVC)
- msr spsr_el3, x2
-
- eret
-
-/*
- * Return to address saved in __mon_cpu_return_addr, in
- * AARCH64 EL2 (non-secure) mode.
- */
-FUNCTION(mon_return_aarch64_ns)
- /* load return address */
- cpuidx x1
- adr x2, __mon_cpu_return_addr
- ldr x2, [x2, x1, lsl #3]
-
- msr elr_el3, x2
- mov x2, #(MON_SCR_RESV1 | MON_SCR_64BIT | MON_SCR_NS_MODE)
- orr x2, x2, #MON_SCR_EL3FIQ_EN
- msr scr_el3, x2
- mov x2, #(MON_SPSR_EXC_MASKED | MODE_EL(2))
- msr spsr_el3, x2
-
- eret
-
-/*
- * Routine to setup secondary CPU state and return, leaving
- * the primary CPU to initialize the secureos.
- */
-FUNCTION(boot_secondary)
- bl mon_init_cpu
- bl mon_enable_mmu
-
- /* reload vbar with virt addr */
- adr x0, _vector_el3
- msr vbar_el3, x0
- isb
-
- cpuidx x0
- bl platform_psci_cpu_has_reset
- b mon_return_aarch64_ns
-
-/* get the CPU ID */
-FUNCTION(mon_get_cpu_id)
- mrs x0, midr_el1
- ubfx x0, x0, #4, #12
- ret
-
-.ltorg
-.align 6
-.global __mon_cpu_reset_vector
-__mon_cpu_reset_vector:
-#if !defined(MONTARGET_DENVER)
- /*
- * code in this #if block are approved by HW and recommended
- * by ARM. do NOT touch it.
- */
- mrs x4, s3_1_c15_c2_0
- orr x4, x4, #1
- msr s3_1_c15_c2_0, x4 /* inv BTB when invalidating icache */
- dsb sy
- isb
- ic iallu /* really invalidating icache & BTB */
- dsb sy
- isb
- bic x4, x4, #1
- msr s3_1_c15_c2_0, x4 /* restore original cpuactlr_el1 */
- dsb sy
- isb
- .rept 7
- nop /* wait */
- .endr
-
- mrs x0, oslsr_el1
- and x0, x0, #2 /* extract oslk bit */
- mrs x1, mpidr_el1
- bics xzr, x0, x1, lsr #7 /* 0 if slow cluster or warm reset */
- b.eq __restore_oslock
- mov x0, xzr
- msr oslar_el1, x0 /* os lock stays off across warm reset */
- mov x3, #3
- movz x4, #0x8000, lsl #48
- msr s3_1_c15_c2_0, x4 /* turn off RCG */
- isb
- msr rmr_el3, x3 /* request warm reset */
- isb
- dsb sy
- wfi
- .rept 65
- nop /* these nops are here so that speculative execution */
- /* won't do harm before we are done warm reset */
- /* do not insert instructions here */
- .endr
-__restore_oslock:
- mov x0, #1
- msr oslar_el1, x0
-#endif
- b boot_secondary
-
-.ltorg
-.align 3
-.global __mon_cpu_return_addr
-__mon_cpu_return_addr:
- .rept MONCPUS
- .quad 0
- .endr
-
-.ltorg
-.align 3
-.global __mon_cpu_return_mode
-__mon_cpu_return_mode:
- .rept MONCPUS
- .quad 0
- .endr
-
-/*
- * CPU power down sequence as per A57/A53 TRM
- *
- * x0 - L2 flush?
- *
- */
-FUNCTION(mon_cpu_power_down)
- /* Store L2 cache flush request */
- mov x13, x0
-
- /* 1. Stop allocations to our data cache */
- mrs x0, sctlr_el1
- bic x0, x0, #1 << 2 // clear SCTLR.C
- msr sctlr_el1, x0
- isb
-
- mrs x0, sctlr_el3
- bic x0, x0, #1 << 2 // clear SCTLR.C
- msr sctlr_el3, x0
- isb
-
- mrs x0, midr_el1
- ubfx x0, x0, #4, #12
- cmp x0, #CORTEX_A57_MP
- b.ne not_a57
-
- /* 2. Disable L2 prefetch */
- mrs x0, s3_1_c15_c2_1 // CPUECTLR_EL1
- /* CPUECTLR[38], disable table walk descriptor access L2 prefetch */
- orr x0, x0, #1 << 38
- /*
- * CPUECTLR[36:35] L2 instruction fetch prefetch distance
- * 0 => disable instruction prefetch
- */
- bic x0, x0, #3 << 35
- /*
- * CPUECTLR[33:32] L2 load/store prefetch distance
- * 0 => disable instruction prefetch
- */
- bic x0, x0, #3 << 32
- msr s3_1_c15_c2_1, x0
-
- /* 3. ISB to ensure ectlr write is complete */
- isb
-
- /* 4. DSB to ensure prior prefetches are complete */
- dsb sy
-
-not_a57:
- /* 5. Clean and invalidate L1 and L2 if X13 == 1 */
- mov x0, #DCCISW
- cmp x13, #1
- bne 1f
- bl dcsw_op_all
- b 2f
-1:
- bl dcsw_op_louis
-2:
-
- /* 6. Leave coherency, clear SMPEN */
- mrs x0, s3_1_c15_c2_1
- bic x0, x0, #CPUECTLR_SMP_BIT
- msr s3_1_c15_c2_1, x0
-
- /* 7. Ensure that the system does not send interrupts to us */
- ldr x1, =ARM_GIC_CPU_BASE
- mov w0, #0x1E0
- str w0, [x1]
-
- /* 8. Set the DBGOSDLR.DLK, Double lock control bit */
- mrs x0, osdlr_el1
- orr x0, x0, #OSDLR_DBL_LOCK_BIT
- msr osdlr_el1, x0
-
- /*
- * 9. Execute an ISB instruction to ensure that all of the
- * System register changes from the previous steps have
- * been committed.
- */
- isb
-
- /*
- * 10. Execute a DSB instruction to ensure that all
- * instruction cache, TLB, and branch predictor
- * maintenance operations issued by any processor in the
- * multiprocessor before the SMPEN bit was cleared have
- * completed.
- */
- dsb sy
-
- /* 11. wfi */
-3: wfi
-
- /* we never return here */
- b 3b
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <asm.h>
-#include <arch/arm.h>
-#include <arm64/asm.h>
-#include <lib/monitor/monitor_vector.h>
-
-FUNCTION(monitor_fastcall)
- str lr, [sp, #-16]! // save NS world's LR
-
- /* load fastcall frame */
- stp x6, x7, [sp, #-16]!
- stp x4, x5, [sp, #-16]!
- stp x2, x3, [sp, #-16]!
- stp x0, x1, [sp, #-16]!
-
- /*
- * Find index in fastcall_table. If index >= TRUSTED_BASE,
- * route through TRUSTED_SERVICE (covers OS/APP fastcalls).
- */
- lsr x10, x0, #SMC_OWNER_SHIFT
- and x10, x10, #SMC_OWNER_MASK
- cmp x10, #SMC_OWNER_TRUSTED_BASE
- mov x6, #SMC_OWNER_TRUSTED_SERVICE
- csel x10, x6, x10, ge
-
- /* args for fastcall handler (frame) */
- mov x0, sp
-
- /* call fastcall handler */
- adr x9, fastcall_table
- ldr x10, [x9, x10, lsl #3]
- blr x10
-
- /* restore fastcall frame (returning results) */
- ldp x0, x1, [sp], #16
- ldp x2, x3, [sp], #16
- ldp x4, x5, [sp], #16
- ldp x6, x7, [sp], #16
-
- ldr lr, [sp], #16 // restore NS world's LR
- ldp x9, x10, [sp], #16 // restore scratch
- eret
-
-unimp_fastcall:
- b .
-
-/* fastcall SMCs issued from non-secure */
-fastcall_table:
- .quad unimp_fastcall /* ARM Arch service */
- .quad unimp_fastcall /* CPU service */
- .quad platform_sip_handler /* SIP service */
- .quad unimp_fastcall /* OEM service */
- .quad platform_psci_handler /* ARM Standard service (currently, only PSCI) */
- .quad unimp_fastcall /* Trusted (OS/TA) service */
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <asm.h>
-#include <arm64/asm.h>
-
-/* void mon_atomic_or(uint32_t *ptr, uint32_t bits); */
-FUNCTION(mon_atomic_or)
-1:
- ldxr w2, [x0]
- orr w2, w2, w1
- stxr w3, w2, [x0]
- cbnz w3, 1b
- ret
-
-/* void mon_atomic_and(uint32_t *ptr, uint32_t bits); */
-FUNCTION(mon_atomic_and)
-1:
- ldxr w2, [x0]
- and w2, w2, w1
- stxr w3, w2, [x0]
- cbnz w3, 1b
- ret
-
-/* void *memset(void *s, int c, size_t n); */
-FUNCTION(memset)
- cbz x0, done
-
- /* dup 8bit x1 to 8 byte value */
- orr x1, x1, x1, lsl #8
- orr x1, x1, x1, lsl #16
- orr x1, x1, x1, lsl #32
-
- mov x7, #0xF
- mov x8, x0
-
- /* first write 16 byte chunks */
- bics xzr, x2, x7
- b.eq less_than_16 // memset is < 16 bytes
-
-do_16_bytes:
- stp x1, x1, [x8], #16
- sub x2, x2, #16
-
- bics xzr, x2, x7
- b.ne do_16_bytes
-
-less_than_16:
- cbz x2, done // ended on a 16 byte boundary
-
-do_single_byte:
- /* write trailing bytes */
- strb w1, [x8], #1
- sub x2, x2, 1
- cbnz x2, do_single_byte
-done:
- ret
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <config.h>
-#include <asm.h>
-#include <arm64/asm.h>
-#include <arm64/mmu_ldesc.h>
-
-/* MMU params for monitor mode */
-#define MMU_PAGE_GRANULE MMU_PAGE_GRANULE_4K
-
-/* number of first/second level entries */
-#define NUM_FIRST_LEVEL (1 << (MONBITS - MMU_L1_INDEX_LSB))
-#define NUM_SECOND_LEVEL (1 << (MONBITS - MMU_L2_INDEX_LSB))
-
-/* indices into attr indirect regs */
-#define MMU_MEMORY_STRONGLY_ORDERED 0
-#define MMU_MEMORY_WB_OUTER_NO_ALLOC_INNER_ALLOC 1
-#define MMU_MEMORY_UC_OUTER_UC_INNER 2
-
-/* mmio (index 0) */
-#define MMU_PTE_L2_BLOCK_MMIO_FLAGS \
- (MMU_MEMORY_SET_ATTR_IDX(0) | MMU_MEMORY_ACCESS_FLAG | \
- MMU_MEMORY_AP_P_RW_U_NA | 0x1)
-
-/* mem wb (index 1) */
-#define MMU_PTE_L2_BLOCK_MEM_WB_FLAGS \
- (MMU_MEMORY_SET_ATTR_IDX(1) | MMU_MEMORY_ACCESS_FLAG | \
- MMU_MEMORY_SH_INNER_SHAREABLE | \
- MMU_MEMORY_AP_P_RW_U_NA | 0x1)
-
-/* mem uc (index 2) */
-#define MMU_PTE_L2_BLOCK_MEM_UC_FLAGS \
- (MMU_MEMORY_SET_ATTR_IDX(2) | MMU_MEMORY_ACCESS_FLAG | \
- MMU_MEMORY_AP_P_RW_U_NA | 0x1)
-
-/* value for MAIR register:
- * idx0 = strongly-ordered,
- * idx1 = outer: writeback/no alloc, inner: writeback/alloc
- * idx2 = outer: non-cacheable, inner: non-cacheable
- */
-#define MMU_MEMORY_ATTR_INDIR 0x0044EF00
-
-#define MMU_TCR_FLAGS_EL3 \
- (MMU_MEMORY_TCR_PS_40BIT | \
- MMU_MEMORY_TCR_TG0_4K | \
- MMU_MEMORY_TCR_OUTER_RGN0(MMU_MEMORY_RGN_WRITE_BACK_ALLOCATE) | \
- MMU_MEMORY_TCR_INNER_RGN0(MMU_MEMORY_RGN_WRITE_BACK_ALLOCATE) | \
- MMU_MEMORY_TCR_T0SZ(MONBITS))
-
-.macro mmu_phys_align, base, size, tmp
- mov \tmp, #(MMU_L2_BLOCK_SIZE - 1)
- cbz \size, . // size is zero
- tst \base, \tmp
- b.ne . // base not block aligned
- tst \size, \tmp
- b.ne . // size not block aligned
-.endm
-
-.macro mmu_load_first_level, level1, level2, count
- orr \level2, \level2, #0x3
-1:
- str \level2, [\level1], #(1 << MMU_ENTRY_SHIFT)
- add \level2, \level2, #(1 << MMU_PAGE_GRANULE)
- sub \count, \count, #0x1
- cbnz \count, 1b
-.endm
-
-
-/* corrupts \vaddr, \pgt, \paddr, \length \tmp */
-.macro mmu_map_virt_phys, vaddr, paddr, length, pgt, flags, tmp, tmp2
- mov \tmp, #(MMU_L2_BLOCK_SIZE - 1)
- bic \paddr, \paddr, \tmp // make aligned
- add \paddr, \paddr, \flags
- lsr \vaddr, \vaddr, #MMU_L2_BLOCK_SHIFT
- add \pgt, \pgt, \vaddr, lsl #MMU_ENTRY_SHIFT
- mov \tmp2, #(1 << MMU_L2_BLOCK_SHIFT)
-1:
- ldr \tmp, [\pgt]
- cbnz \tmp, . /* verify vaddr is not mapped */
-
- /* write entry and update */
- str \paddr, [\pgt], #(1 << MMU_ENTRY_SHIFT)
- add \paddr, \paddr, \tmp2
- sub \length, \length, \tmp2
- cbnz \length, 1b
- dsb sy
-.endm
-
-/* corrupts \vaddr, \pgt, \paddr, \length \tmp */
-.macro mmu_unmap_virt, vaddr, length, pgt, tmp
- lsr \vaddr, \vaddr, #MMU_L2_BLOCK_SHIFT
- add \pgt, \pgt, \vaddr, lsl #MMU_ENTRY_SHIFT
- mov \tmp, #(1 << MMU_L2_BLOCK_SHIFT)
-1:
- /* write entry and update */
- str xzr, [\pgt], #(1 << MMU_ENTRY_SHIFT)
- sub \length, \length, \tmp
- cbnz \length, 1b
- dsb sy
-.endm
-
-.macro mmu_roundup, addr, align
- add \addr, \addr, \align
- bic \addr, \addr, \align
-.endm
-
-.macro mmu_rounddown, addr, align
- bic \addr, \addr, \align
-.endm
-
-.macro mmu_map_align, vaddr, paddr, length, eaddr, align
- mov \align, #(MMU_L2_BLOCK_SIZE - 1)
- add \eaddr, \length, \vaddr
-
- /* return aligned vaddr, paddr and length */
- mmu_roundup \eaddr, \align
- mmu_rounddown \vaddr, \align
- mmu_rounddown \paddr, \align
- sub \length, \eaddr, \vaddr
-.endm
-
-.macro mmu_unmap_align, vaddr, length, eaddr, align
- mov \align, #(MMU_L2_BLOCK_SIZE - 1)
- add \eaddr, \length, \vaddr
-
- /* return aligned vaddr, paddr and length */
- mmu_roundup \eaddr, \align
- mmu_rounddown \vaddr, \align
- sub \length, \eaddr, \vaddr
-.endm
-
-/* int mon_mmu_map_mmio(vaddr_t vaddr, paddr_t paddr, uint64_t length) */
-FUNCTION(mon_mmu_map_mmio)
- /* align vaddr/paddr/length to BLOCK size params */
- mmu_map_align x0, x1, x2, x9, x10
-
- /* phys address of mon_second_level */
- adr x3, mon_second_level // virt addr
- ldr x4, __mon_phys_offset
- sub x3, x3, x4 // phys addr
- ldr x4, =MMU_PTE_L2_BLOCK_MMIO_FLAGS
-
- /* create mapping (x5, x6 are scratch) */
- mmu_map_virt_phys x0, x1, x2, x3, x4, x5, x6
- dsb sy
- isb
- tlbi alle3
- dsb sy
- isb
-
- mov x0, xzr
- ret
-
-/* int mon_mmu_map_uncached(vaddr_t vaddr, paddr_t paddr, uint64_t length) */
-FUNCTION(mon_mmu_map_uncached)
- /* align vaddr/paddr/length to BLOCK size params */
- mmu_map_align x0, x1, x2, x9, x10
-
- /* phys address of mon_second_level */
- adr x3, mon_second_level // virt addr
- ldr x4, __mon_phys_offset
- sub x3, x3, x4 // phys addr
- ldr x4, =MMU_PTE_L2_BLOCK_MEM_UC_FLAGS
-
- /* create mapping (x5, x6 are scratch) */
- mmu_map_virt_phys x0, x1, x2, x3, x4, x5, x6
- dsb sy
- isb
- tlbi alle3
- dsb sy
- isb
-
- mov x0, xzr
- ret
-
-/* int mon_mmu_unmap(vaddr_t vaddr, uint64_t length) */
-FUNCTION(mon_mmu_unmap)
- /* align vaddr/length to BLOCK size params */
- mmu_unmap_align x0, x1, x9, x10
-
- /* phys address of mon_second_level */
- adr x3, mon_second_level // virt addr
- ldr x4, __mon_phys_offset
- sub x3, x3, x4 // phys addr
-
- /* unmap vaddr for length (x4 is scratch) */
- mmu_unmap_virt x0, x1, x3, x4
- dsb sy
- isb
- tlbi alle3
- dsb sy
- isb
- ret
-
-/* uint64_t mon_virt_phys_el3(uint64_t vaddr) */
-FUNCTION(mon_virt_phys_el3)
- at s1e3r, x0
- mrs x0, par_el1
- ret
-
-/* void mon_enable_mmu() */
-FUNCTION(mon_enable_mmu)
-spin_wait:
- ldr x1, mon_pagetable_done
- cbz x1, spin_wait // wait for pagetable done
-
- ldr x0, __mon_phys_offset
- add lr, lr, x0 // convert phys LR to virt
-
- ldr x1, =MMU_MEMORY_ATTR_INDIR
- msr mair_el3, x1
- ldr x1, =MMU_TCR_FLAGS_EL3
- msr tcr_el3, x1
-
- adr x4, mon_first_level // phys addr
- msr ttbr0_el3, x4
-
- tlbi alle3
- dsb sy
- isb
-
- mrs x1, sctlr_el3
- orr x1, x1, #1
- orr x1, x1, #(1 << 2)
- msr sctlr_el3, x1 // enable MMU and D cache
- isb
-
- ret
-
-/* void mon_setup_pagetable(uint64_t pbase, uint64 poff, uint64 psize) */
-FUNCTION(mon_setup_pagetable)
- /* check base/size alignment of carveout */
- mmu_phys_align x0, x2, x11
-
- /* phys address of mon_second_level */
- ldr x3, =mon_second_level // virt addr
- sub x3, x3, x1 // phys addr
-
- /* clear mon_second_level */
- mov x4, #NUM_SECOND_LEVEL
- mov x13, x3 // copy mon_second_level
-1:
- stp xzr, xzr, [x13], #16
- sub x4, x4, #2 // 2 entries at a time
- cbnz x4, 1b
-
- adr x4, mon_first_level // phys addr
- mov x5, #NUM_FIRST_LEVEL
- mov x13, x3 // ptr to mon_second_level
- mmu_load_first_level x4, x13, x5
-
- /* map MONBASE -> carveout in mon_second_level */
- ldr x4, =MONBASE // virt
- ldr x5, =MMU_PTE_L2_BLOCK_MEM_WB_FLAGS
- mov x10, x0 // phys (carveout base)
- mov x12, x2 // size
- mov x13, x3 // phys pgt
- mmu_map_virt_phys x4, x10, x12, x13, x5, x6, x7
-
- /* identity map carveout in mon_second_level */
- mov x4, x0 // virt
- mov x10, x0 // phys (carveout base)
- mov x12, x2 // size
- mov x13, x3 // phys pgt
- mmu_map_virt_phys x4, x10, x12, x13, x5, x6, x7
- dsb sy
- isb
-
- /* indicate pagetables are done */
- adr x14, mon_pagetable_done
- mov x15, 0x1
- str x15, [x14]
- ret
-
-/* uint64_t mon_virt_to_phys(uint64_t vaddr) */
-FUNCTION(mon_virt_to_phys)
- ldr x1, __mon_phys_offset
- sub x0, x0, x1
- ret
-
-/* uint64_t mon_phys_to_virt(uint64_t paddr) */
-FUNCTION(mon_phys_to_virt)
- ldr x1, __mon_phys_offset
- add x0, x0, x1
- ret
-
-.align MMU_PAGE_GRANULE
-mon_second_level:
- .rept NUM_SECOND_LEVEL
- .quad 0
- .endr
-
-.align MMU_PAGE_GRANULE
-mon_first_level:
- .rept NUM_FIRST_LEVEL
- .quad 0
- .endr
-
-mon_pagetable_done:
- .quad 0
-
-.align 3
-.global __mon_phys_offset
-__mon_phys_offset:
- .quad 0
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <config.h>
-#include <asm.h>
-#include <arch/arm.h>
-#include <arm64/asm.h>
-#include <arm64/monitor_macros.h>
-
-/* vector entry points */
-.macro vec_entry, label
- .align 7
- b \label
-.endm
-.macro vec_entry_null
- .align 7
- b .
-.endm
-
-.section ".text.boot"
-.align 11
-
-/*
- * Vector offset 0x000 - 0x180 (from Current EL, using SP_EL0)
- */
-FUNCTION(_start)
-FUNCTION(_vector_el3)
-
- /* entry point */
- vec_entry _reset
-
- /* EL3 exception to EL3 (SP_EL0) unexpected */
- vec_entry_null /* IRQ exc SP_EL0 */
- vec_entry_null /* FIQ exc SP_EL0 */
- vec_entry_null /* SERR exc SP_EL0 */
-
-/*
- * Vector offset 0x200 - 0x380 (from Current EL, using SP_ELx)
- */
-.align 9
- /* EL3 exception to EL3 (SP_ELx) unexpected */
- vec_entry_null /* sync exc SP_ELx */
- vec_entry_null /* IRQ exc SP_ELx */
- vec_entry_null /* FIQ exc SP_ELx */
- vec_entry_null /* SERR exc SP_ELx */
-
-/*
- * Vector offset 0x400 - 0x580 (from Lower EL, using AArch64)
- */
-.align 9
- /* EL1 exception to EL3 (AArch64) */
- vec_entry handle_exc_aarch64
- vec_entry_null /* IRQ exc aarch64 - unexpected in EL3 */
- vec_entry handle_fiq_aarch64 /* FIQ exc aarch64 */
- vec_entry_null /* SERR exc aarch64 - unexpected in EL3 */
-
-/*
- * Vector offset 0x600 - 0x680 (from Lower EL, using AArch32)
- */
-.align 9
- /* EL1 exception to EL3 (AArch32) */
- vec_entry handle_exc_aarch32
- vec_entry_null /* IRQ exc aarch32 */
- vec_entry_null /* FIQ exc aarch32 */
- vec_entry_null /* SERR exc aarch32 */
-
-/* void mon_clear_bss(void) */
-FUNCTION(mon_clear_bss)
- adr x0, __bss_start
- adr x1, __bss_end
- subs x1, x1, x0 /* size in bytes */
- b.eq 2f
-1:
- strb wzr, [x0], #1
- sub x1, x1, #1
- cbnz x1, 1b
-2:
- ret
-
-/*
- * Entry from the bootloader.
- *
- * Assuming for now the BL will jump to our _start rather than exception
- * to us (though the latter is doable, given our entry point is where
- * VBAR_EL3 would be setup, so could SMC to us).
- *
- * Setup state so we can return from the EL3 "exception" by pushing
- * the needed state onto the stack (popped during go_nonsecure).
- */
-_reset:
- /* derive/save the phys_base addr */
- adr x9, (. + 0x4)
- sub x10, x9, #(. - _start)
- adr x3, __mon_phys_base
- str x10, [x3] // physbase
-
- /* save mon_phys_offset (v -> p conversions) */
- adr x4, __mon_phys_offset
- ldr x5, =MONBASE
- sub x11, x5, x10
- str x11, [x4] // physoff
-
- /* save per-cpu return addr (from LR) */
- cpuidx x4
- adr x5, __mon_cpu_return_addr
- str lr, [x5, x4, lsl #3]
-
- /*
- * All secondaries, init their CPU state and then return,
- * while only the primary continues on to init the OS. For
- * now, this means only CPU0 can run within the secureos.
- */
- cbnz x4, boot_secondary
-
- /* save carveout size and bootarg ptr */
- adr x3, __mon_phys_size
- str x0, [x3]
- mov x2, x0 // make copy
- adr x3, __mon_bootarg_addr
- str x1, [x3]
-
- /* clear early while serialized */
- bl mon_clear_bss
-
- bl mon_init_cpu
-
- /* setup MMU pagetables, (args: base, off, size) */
- mov x0, x10
- mov x1, x11
- bl mon_setup_pagetable
-
- /* enable MMU */
- bl mon_enable_mmu
-
- /* reload vbar with virtual address */
- adr x0, _vector_el3
- msr vbar_el3, x0
- isb
-
- cpuidx x0
- bl platform_psci_init
-
-#if defined(WITH_EL3_MONITOR_ONLY)
- bl platform_secure_dram_aperture
- b mon_return_aarch64_ns
-#else
- b mon_start_tlk_el1
-#endif
-
-.ltorg
-.align 3
-/*
- * Keep location of where the image was loaded, and how much
- * contiguous memory has been made available.
- */
-.global __mon_phys_base
-__mon_phys_base:
- .quad 0
-
-.global __mon_phys_size
-__mon_phys_size:
- .quad 0
-
-.global __mon_bootarg_addr
-__mon_bootarg_addr:
- .quad 0
-
-.data
-.align 4
-/* stack must be 16 byte aligned */
-monitor_stack:
- .skip 4096
-.global monitor_stack_top
-monitor_stack_top:
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <asm.h>
-#include <arm64/asm.h>
-#include <arm64/monitor_macros.h>
-#include <lib/monitor/monitor_vector.h>
-
-#define EC_BIT_POS 26
-#define EC_WIDTH 6
-
-#define EC_SMC_AARCH32 0x13
-#define EC_SMC_AARCH64 0x17
-
-#define FIQ_STATE_ELR_SPSR 0
-#define FIQ_STATE_SP_EL0_SP_EL1 16
-#define FIQ_STATE_PC_CPSR 32
-
-.macro mon_handle_aarch_switch, scr, scr2
- ldr \scr, =SMC_SIP_AARCH_SWITCH
- cmp \scr, x0
- b.ne 1f // continue, not SMC_SIP_AARCH_SWITCH
-
- /* save address/mode and use during return */
- cpuidx \scr
- adr \scr2, __mon_cpu_return_addr
- str x1, [\scr2, \scr, lsl #3]
- adr \scr2, __mon_cpu_return_mode
- str x2, [\scr2, \scr, lsl #3]
-
- ldp \scr, \scr2, [sp], #16 // restore scratch
- mov x0, xzr // return success
-
- cbz x2, mon_return_aarch64_ns
- b mon_return_aarch32_ns
-1:
-.endm
-
-.macro mon_handle_get_fiq_regs, scr, scr2
- ldr \scr, =SMC_SIP_GET_FIQ_REGS
- cmp \scr, x0
- b.ne 1f // continue, not SMC_SIP_GET_FIQ_REGS
-
- /* regs saved during a fiq exception */
- adr \scr, __fiq_state
- ldp x0, x1, [\scr, #FIQ_STATE_PC_CPSR]
- ldp x2, x3, [\scr, #FIQ_STATE_SP_EL0_SP_EL1]
-
- /* switch non-secure for return */
- mon_scr_non_secure_64 \scr
-
- ldp \scr, \scr2, [sp], #16 // restore scratch
- eret
-1:
-.endm
-
-/*
- * Occurs from either non-secure/secure EL1.
- *
- * If coming from the non-secure world, we may have to save more state
- * depending on if we're going to transition to EL1 in secure mode. This
- * is needed if passing along a standard call SMC, which launches a
- * separate thread.
- *
- * If coming from S-EL1, detectable by NS=0 already, then just need to
- * save the GP regs (all the other NS-EL1 state has been saved already).
- *
- * Args are passed in x0-x6 and x18-x30 are callee saved.
- */
-FUNCTION(handle_exc_aarch32)
- stp x9, x10, [sp, #-16]! // create scratch
-
- /* get exception code */
- mrs x9, esr_el3
- ubfx x9, x9, #EC_BIT_POS, #EC_WIDTH
-
- cmp x9, #EC_SMC_AARCH32
- b.ne . // fail
-
- /* check for 32bit Trusted OS (TOS) calls */
- and x9, x0, #(SMC_OWNER_MASK << SMC_OWNER_SHIFT)
- ldr x10, =SMC_TOS_CALL
- cmp x9, x10
- b.eq handle_trusted_os_call
-
- /* service NS SIP call to switch aarch */
- mon_handle_aarch_switch x9, x10
- b . // unrecognized aarch32 SMC
-
-.weak handle_trusted_os_call
-handle_trusted_os_call:
-fail:
- mvn x0, xzr // return -1
- eret
-
-/*
- * FIQ exception handler for the monitor mode.
- *
- * We service the FIQ exceptions in the secure world and then jump to the NS
- * world. The NS world has already registered its handler with us during
- * boot. We store the necessary FIQ context before returning to the NS world
- * handler. The saved FIQ context is requested by the NS world as a response to
- * SMC_SIP_GET_FIQ_REGS function ID.
- */
-FUNCTION(handle_fiq_aarch64)
- stp x9, x10, [sp, #-16]! // create scratch
- stp x11, x12, [sp, #-16]! // create scratch
-
- adr x11, __fiq_state
- mrs x9, elr_el1
- mrs x10, spsr_el1
- stp x9, x10, [x11, #FIQ_STATE_ELR_SPSR]
- mrs x9, sp_el0
- mrs x10, sp_el1
- stp x9, x10, [x11, #FIQ_STATE_SP_EL0_SP_EL1]
- mrs x9, elr_el3
- mrs x10, spsr_el3
- stp x9, x10, [x11, #FIQ_STATE_PC_CPSR]
-
- adr x9, __mon_cpu_fiq_glue
- ldr x9, [x9]
- cbz x9, . // NS world's handler not present
- msr elr_el3, x9
- mov x9, #(MON_SCR_RESV1 | MON_SCR_64BIT | MON_SCR_NS_MODE)
- msr scr_el3, x9
-
- ldp x11, x12, [sp], #16 // restore scratch
- ldp x9, x10, [sp], #16 // restore scratch
- eret
-
-/*
- * SMCs from 64bit non-secure world.
- *
- * This would be the path for PSCI calls and Trusted OS SMCs interfacing
- * with secure TAs. For PSCI, they'd be serviced here, but Trusted OS
- * SMCs need to transition to the secureos in EL1.
- */
-FUNCTION(handle_exc_aarch64)
- stp x9, x10, [sp, #-16]! // create scratch
-
- /* get exception code */
- mrs x9, esr_el3
- ubfx x10, x9, #EC_BIT_POS, #EC_WIDTH
-
- cmp x10, #EC_SMC_AARCH64
- b.ne . // fail
-
- /* for now, only expect non-secure EL1 */
- mrs x9, scr_el3
- tst x9, #1
- b.eq secure_el1_smc64 // fail
- b non_secure_el1_smc64
-
- /*
- * SMCs from 64bit secure world.
- * Currently these are unexpected as secureos runs in a 32bit mode.
- */
-secure_el1_smc64:
- b .
- ldp x9, x10, [sp], #16 // restore scratch
- movn x0, #0
- eret
-
- /*
- * SMCs from 64bit non-secure world.
- *
- * This is the path for both monitor fastcalls (i.e. those serviced
- * entirely within the monitor) and Trusted OS SMCs interfacing with
- * secure TAs (which call the secureos in EL1 for handling).
- */
-non_secure_el1_smc64:
- /* service NS SIP call to get regs saved during FIQ excptn */
- mon_handle_get_fiq_regs x9, x10
-
- /* service NS SIP call to switch aarch */
- mon_handle_aarch_switch x9, x10
-
- /* handle fastcall SMCs */
- tst x0, #SMC_FASTCALL
- b.ne monitor_fastcall
-
- b non_secure_stdcall
-
-.weak non_secure_stdcall
-non_secure_stdcall:
- mvn x0, xzr // return -1
- eret
-
-.align 3
-.global __mon_cpu_fiq_glue
-__mon_cpu_fiq_glue:
- .quad 0
-
-.global __mon_cpu_fiq_ns_stack
-__mon_cpu_fiq_ns_stack:
- .quad 0
-
-__fiq_state:
- .quad 0, 0, 0, 0, 0, 0
+++ /dev/null
-/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <config.h>
-#include <asm.h>
-#include <arch/arm.h>
-#include <arm64/asm.h>
-#include <arm64/monitor_macros.h>
-#include <lib/monitor/monitor_vector.h>
-
-/*
- * Set up initial registers and transition to EL1 to start the
- * secureos (no args are passed to this routine and it does not
- * return).
- */
-FUNCTION(mon_start_tlk_el1)
- /*
- * Save EL1 entry state before secureos init (which modifies
- * the same EL1 arch state), so on return to the BL, it can
- * be restored.
- */
- adr x3, el1_non_secure_context
- mon_save_el1_regs x3
-
- /* entry into EL1 is at _end of monitor binary */
- ldr x6, __mon_phys_offset
- adr x4, _end
- sub x5, x4, x6 // phys addr of _end
-
- /* adjust carveout (reduced by what monitor's used) */
- adr x3, __mon_phys_size
- ldr w0, [x3]
- adr x4, _start
- sub x7, x4, x6 // phys addr of _start
- sub x3, x5, x7 // amount used by monitor
- sub w0, w0, w3 // reduced size
-
- /* size and bootarg passed as 32bit args */
- adr x3, __mon_bootarg_addr
- ldr w1, [x3]
-
- mon_scr_secure_32 x3
-
- mov x3, #(MON_SPSR_EXC_MASKED | MODE_SVC)
- msr spsr_el3, x3
- msr elr_el3, x5
- eret
-
-.global handle_trusted_os_call
-handle_trusted_os_call:
- /* SMC expected from secureos in EL1(S) */
- mrs x9, scr_el3
- tst x9, #MON_SCR_NS_MODE
- b.ne . // not in secure mode
-
- and x0, x0, #SMC_TOS_FUNC_ID_MASK
- cmp x0, #SMC_TOS_MAX_FUNC_IDX
- b.gt . // too large an index
-
- /* call function at tos_table[idx] */
- adr x9, tos_table
- ldr x10, [x9, x0, lsl #3]
- br x10
-
-tos_completion:
- ldp x9, x10, [sp], #16 // restore scratch
-
- /* save secure EL1 state */
- adr x3, el1_secure_context
- mon_save_el1_regs x3
-
- /* restore NS EL1 state (loads spsr_el3/elr_el3) */
- adr x3, el1_non_secure_context
- mon_restore_el1_regs x3
-
- /* switch non-secure for return */
- mon_scr_non_secure_64 x3
-
- /* load SMC results into registers */
- ldr x3, el1_smc_args_results
- ldp x0, x1, [x3], #16
- ldp x2, x3, [x3], #16
-
- eret
-
-// Is this the first SMC we receive (from the bootloader) on boot?
-tos_initial_ns_return:
- ldp x9, x10, [sp], #16 // restore scratch
-
- /* save S EL1 state */
- adr x3, el1_secure_context
- mon_save_el1_regs x3
-
- /* restore NS EL1 state (from monitor entry point) */
- adr x3, el1_non_secure_context
- mon_restore_el1_regs x3
-
- bl platform_psci_coldboot_epilog
- b mon_return_aarch64_ns
-
-tos_init_shared_addr:
- ldp x9, x10, [sp], #16 // restore scratch
-
- /* save shared mem address (in x1) and return */
- adr x3, el1_smc_args_results
- str x1, [x3]
-
- eret
-
-/*
- * This TOS call is serviced entirely within the monitor and returns
- * to secure EL1. If the virt->phys translation is for the normal world,
- * then make that MMU state current.
- */
-tos_addr_translation:
- /* get virt address and type */
- ldr x9, el1_smc_args_results
- ldp x0, x1, [x9]
-
- /* translate in current or non-secure world */
- tst x1, 0x4
- b.eq write_vreg // current: no need to change state */
-
- /* make non-secure MMU state current (corrupts x0, x1) */
- adr x3, el1_secure_context
- mon_save_el1_mmu x3
- adr x3, el1_non_secure_context
- mon_restore_el1_mmu x3
-
- /* switch non-secure for translation */
- mon_scr_non_secure_64 x3
-
- /* reload args */
- ldp x0, x1, [x9]
-
-write_vreg:
- mov x10, x1
- and x10, x10, #3
- adr x2, v2p_table
- add x2, x2, x10, lsl #3 // each type is 2 instrs
- br x2
-
-v2p_table:
- at s12e1r, x0 // S12 priv read
- b read_par
- at s12e1w, x0 // S12 priv write
- b read_par
- at s12e0r, x0 // S12 user read
- b read_par
- at s12e0w, x0 // S12 user write
-
-read_par:
- mrs x0, par_el1
- str x0, [x9] // return par in x0
-
- /* translate in current or non-secure world */
- tst x1, 0x4
- b.eq do_return // current: no need to restore state */
-
- /* restore secure MMU state */
- adr x3, el1_secure_context
- mon_restore_el1_mmu x3
-
- /* go back to secure mode */
- mon_scr_secure_32 x3
-
-do_return:
- ldp x9, x10, [sp], #16 // restore scratch
- eret
-
-/*
- * Callbacks from secure->non-secure (not ready yet)
- */
-tos_callback:
- b .
-
-.global non_secure_stdcall
-non_secure_stdcall:
- /* save incoming SMC args from registers */
- ldr x9, el1_smc_args_results
- stp x0, x1, [x9], #16
- stp x2, x3, [x9], #16
- stp x4, x5, [x9], #16
- stp x6, x7, [x9], #16
-
- ldp x9, x10, [sp], #16 // restore scratch
-
- /*
- * Some SMCs (besides PSCI) don't transition to the secureos.
- * For instance, the registration of IRQ and FS callback handlers.
- *
- * It does mean we're not supporting this functionality at the
- * moment, but the intent is to change the implementation, to not
- * require returning to a different PC than where we were called.
- */
- ldr w3, =0x32000004 // SMC_TOS_NS_IRQ_PENDING_VECTOR
- cmp w0, w3
- b.ne call_secureos
-
-.global call_secureos
-call_secureos:
- /* save NS EL1 state */
- adr x3, el1_non_secure_context
- mon_save_el1_regs x3
-
- /* restore S EL1 state (including spsr_el3/elr_el3) */
- adr x3, el1_secure_context
- mon_restore_el1_regs x3
-
- /* set scr to secure32 */
- mon_scr_secure_32 x3
- eret
-
-.align 3
-el1_secure_context:
- .rept NUM_CTX_REGS
- .quad 0
- .endr
-
-;.global el1_non_secure_context // Not needed anymore?
-el1_non_secure_context:
- .rept NUM_CTX_REGS
- .quad 0
- .endr
-
-/* SMCs issued from the Trusted OS */
-tos_table:
- .quad -1
- .quad tos_completion
- .quad tos_completion /* IRQ */
- .quad tos_completion /* filesystem */
- .quad tos_initial_ns_return
- .quad tos_addr_translation
- .quad tos_init_shared_addr
-
-/* address of shared mem for passing SMC args/results */
-el1_smc_args_results:
- .quad 0
+++ /dev/null
-/*
- * Copyright (c) 2008-2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-
-void halt(void)
-{
- platform_halt();
-}
-
-void _panic(void *caller, const char *fmt, ...)
-{
- dprintf(ALWAYS, "panic (caller %p): ", caller);
-
- va_list ap;
- va_start(ap, fmt);
- _dvprintf(fmt, ap);
- va_end(ap);
-
- halt();
-}
-
-#if !DISABLE_DEBUG_OUTPUT
-
-int _dputs(const char *str)
-{
- while(*str != 0) {
- _dputc(*str++);
- }
-
- return 0;
-}
-
-static int _dprintf_output_func(char c, void *state)
-{
- _dputc(c);
- return INT_MAX;
-}
-
-int _dprintf(const char *fmt, ...)
-{
- int err;
-
- va_list ap;
- va_start(ap, fmt);
- err = _printf_engine(&_dprintf_output_func, NULL, fmt, ap);
- va_end(ap);
-
- return err;
-}
-
-int _dvprintf(const char *fmt, va_list ap)
-{
- int err;
-
- err = _printf_engine(&_dprintf_output_func, NULL, fmt, ap);
-
- return err;
-}
-
-#endif // !DISABLE_DEBUG_OUTPUT
+++ /dev/null
-/*
- * Copyright (c) 2008-2012 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <stdarg.h>
-#include <sys/types.h>
-#include <printf.h>
-#include <string.h>
-#include <platform/debug.h>
-
-void putc(char c)
-{
- return _dputc(c);
-}
-
-int puts(const char *str)
-{
- return _dputs(str);
-}
-
-int getc(char *c)
-{
- return platform_dgetc(c, true);
-}
-
-int _printf(const char *fmt, ...)
-{
- int err;
-
- va_list ap;
- va_start(ap, fmt);
- err = _dvprintf(fmt, ap);
- va_end(ap);
-
- return err;
-}
-
-int sprintf(char *str, const char *fmt, ...)
-{
- int err;
-
- va_list ap;
- va_start(ap, fmt);
- err = vsprintf(str, fmt, ap);
- va_end(ap);
-
- return err;
-}
-
-int snprintf(char *str, size_t len, const char *fmt, ...)
-{
- int err;
-
- va_list ap;
- va_start(ap, fmt);
- err = vsnprintf(str, len, fmt, ap);
- va_end(ap);
-
- return err;
-}
-
-
-#define LONGFLAG 0x00000001
-#define LONGLONGFLAG 0x00000002
-#define HALFFLAG 0x00000004
-#define HALFHALFFLAG 0x00000008
-#define SIZETFLAG 0x00000010
-#define ALTFLAG 0x00000020
-#define CAPSFLAG 0x00000040
-#define SHOWSIGNFLAG 0x00000080
-#define SIGNEDFLAG 0x00000100
-#define LEFTFORMATFLAG 0x00000200
-#define LEADZEROFLAG 0x00000400
-
-static char *longlong_to_string(char *buf, unsigned long long n, int len, uint flag)
-{
- int pos = len;
- int negative = 0;
-
- if((flag & SIGNEDFLAG) && (long long)n < 0) {
- negative = 1;
- n = -n;
- }
-
- buf[--pos] = 0;
-
- /* only do the math if the number is >= 10 */
- while(n >= 10) {
- int digit = n % 10;
-
- n /= 10;
-
- buf[--pos] = digit + '0';
- }
- buf[--pos] = n + '0';
-
- if(negative)
- buf[--pos] = '-';
- else if((flag & SHOWSIGNFLAG))
- buf[--pos] = '+';
-
- return &buf[pos];
-}
-
-static char *longlong_to_hexstring(char *buf, unsigned long long u, int len, uint flag)
-{
- int pos = len;
- static const char hextable[] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f' };
- static const char hextable_caps[] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
- const char *table;
-
- if((flag & CAPSFLAG))
- table = hextable_caps;
- else
- table = hextable;
-
- buf[--pos] = 0;
- do {
- unsigned int digit = u % 16;
- u /= 16;
-
- buf[--pos] = table[digit];
- } while(u != 0);
-
- return &buf[pos];
-}
-
-int vsprintf(char *str, const char *fmt, va_list ap)
-{
- return vsnprintf(str, INT_MAX, fmt, ap);
-}
-
-struct _output_args {
- char *outstr;
- size_t len;
- size_t pos;
-};
-
-static int _vsnprintf_output(char c, void *state)
-{
- struct _output_args *args = state;
-
- if (args->pos >= args->len)
- return 0;
-
- args->outstr[args->pos++] = c;
-
- return args->len - args->pos;
-}
-
-int vsnprintf(char *str, size_t len, const char *fmt, va_list ap)
-{
- struct _output_args args;
-
- args.outstr = str;
- args.len = len;
- args.pos = 0;
-
- return _printf_engine(&_vsnprintf_output, (void *)&args, fmt, ap);
-}
-
-size_t strlen(char const *s)
-{
- size_t i;
-
- i = 0;
- while(s[i])
- i += 1;
- return i;
-}
-
-int _printf_engine(_printf_engine_output_func out, void *state, const char *fmt, va_list ap)
-{
- char c;
- unsigned char uc;
- const char *s;
- unsigned long long n;
- void *ptr;
- int flags;
- unsigned int format_num;
- size_t chars_written = 0;
- char num_buffer[32];
-
-#define OUTPUT_CHAR(c) do { chars_written++; if (out(c, state) <= 1) goto done; } while(0)
-#define OUTPUT_CHAR_NOLENCHECK(c) do { out(c, state); } while(0)
-
- for(;;) {
- /* handle regular chars that aren't format related */
- while((c = *fmt++) != 0) {
- if(c == '%')
- break; /* we saw a '%', break and start parsing format */
- OUTPUT_CHAR(c);
- }
-
- /* make sure we haven't just hit the end of the string */
- if(c == 0)
- break;
-
- /* reset the format state */
- flags = 0;
- format_num = 0;
-
-next_format:
- /* grab the next format character */
- c = *fmt++;
- if(c == 0)
- break;
-
- switch(c) {
- case '0'...'9':
- if (c == '0' && format_num == 0)
- flags |= LEADZEROFLAG;
- format_num *= 10;
- format_num += c - '0';
- goto next_format;
- case '.':
- /* XXX for now eat numeric formatting */
- goto next_format;
- case '%':
- OUTPUT_CHAR('%');
- break;
- case 'c':
- uc = va_arg(ap, unsigned int);
- OUTPUT_CHAR(uc);
- break;
- case 's':
- s = va_arg(ap, const char *);
- if(s == 0)
- s = "<null>";
- goto _output_string;
- case '-':
- flags |= LEFTFORMATFLAG;
- goto next_format;
- case '+':
- flags |= SHOWSIGNFLAG;
- goto next_format;
- case '#':
- flags |= ALTFLAG;
- goto next_format;
- case 'l':
- if(flags & LONGFLAG)
- flags |= LONGLONGFLAG;
- flags |= LONGFLAG;
- goto next_format;
- case 'h':
- if(flags & HALFFLAG)
- flags |= HALFHALFFLAG;
- flags |= HALFFLAG;
- goto next_format;
- case 'z':
- flags |= SIZETFLAG;
- goto next_format;
- case 'D':
- flags |= LONGFLAG;
- /* fallthrough */
- case 'i':
- case 'd':
- n = (flags & LONGLONGFLAG) ? va_arg(ap, long long) :
- (flags & LONGFLAG) ? va_arg(ap, long) :
- (flags & HALFHALFFLAG) ? (signed char)va_arg(ap, int) :
- (flags & HALFFLAG) ? (short)va_arg(ap, int) :
- (flags & SIZETFLAG) ? va_arg(ap, ssize_t) :
- va_arg(ap, int);
- flags |= SIGNEDFLAG;
- s = longlong_to_string(num_buffer, n, sizeof(num_buffer), flags);
- goto _output_string;
- case 'U':
- flags |= LONGFLAG;
- /* fallthrough */
- case 'u':
- n = (flags & LONGLONGFLAG) ? va_arg(ap, unsigned long long) :
- (flags & LONGFLAG) ? va_arg(ap, unsigned long) :
- (flags & HALFHALFFLAG) ? (unsigned char)va_arg(ap, unsigned int) :
- (flags & HALFFLAG) ? (unsigned short)va_arg(ap, unsigned int) :
- (flags & SIZETFLAG) ? va_arg(ap, size_t) :
- va_arg(ap, unsigned int);
- s = longlong_to_string(num_buffer, n, sizeof(num_buffer), flags);
- goto _output_string;
- case 'p':
- flags |= LONGFLAG | ALTFLAG;
- goto hex;
- case 'X':
- flags |= CAPSFLAG;
- /* fallthrough */
-hex:
- case 'x':
- n = (flags & LONGLONGFLAG) ? va_arg(ap, unsigned long long) :
- (flags & LONGFLAG) ? va_arg(ap, unsigned long) :
- (flags & HALFHALFFLAG) ? (unsigned char)va_arg(ap, unsigned int) :
- (flags & HALFFLAG) ? (unsigned short)va_arg(ap, unsigned int) :
- (flags & SIZETFLAG) ? va_arg(ap, size_t) :
- va_arg(ap, unsigned int);
- s = longlong_to_hexstring(num_buffer, n, sizeof(num_buffer), flags);
- if(flags & ALTFLAG) {
- OUTPUT_CHAR('0');
- OUTPUT_CHAR((flags & CAPSFLAG) ? 'X': 'x');
- }
- goto _output_string;
- case 'n':
- ptr = va_arg(ap, void *);
- if(flags & LONGLONGFLAG)
- *(long long *)ptr = chars_written;
- else if(flags & LONGFLAG)
- *(long *)ptr = chars_written;
- else if(flags & HALFHALFFLAG)
- *(signed char *)ptr = chars_written;
- else if(flags & HALFFLAG)
- *(short *)ptr = chars_written;
- else if(flags & SIZETFLAG)
- *(size_t *)ptr = chars_written;
- else
- *(int *)ptr = chars_written;
- break;
- default:
- OUTPUT_CHAR('%');
- OUTPUT_CHAR(c);
- break;
- }
-
- /* move on to the next field */
- continue;
-
- /* shared output code */
-_output_string:
- if (flags & LEFTFORMATFLAG) {
- /* left justify the text */
- uint count = 0;
- while(*s != 0) {
- OUTPUT_CHAR(*s++);
- count++;
- }
-
- /* pad to the right (if necessary) */
- for (; format_num > count; format_num--)
- OUTPUT_CHAR(' ');
- } else {
- /* right justify the text (digits) */
- size_t string_len = strlen(s);
- char outchar = (flags & LEADZEROFLAG) ? '0' : ' ';
- for (; format_num > string_len; format_num--)
- OUTPUT_CHAR(outchar);
-
- /* output the string */
- while(*s != 0)
- OUTPUT_CHAR(*s++);
- }
- continue;
- }
-
-done:
- /* null terminate */
- OUTPUT_CHAR_NOLENCHECK('\0');
-
-#undef OUTPUT_CHAR
-#undef OUTPUT_CHAR_NOLENCHECK
-
- return chars_written;
-}
+++ /dev/null
-#
-# This builds either into a library that's linked with the TLK kernel
-# (when MONITOR_MODULE = false, in the case of MODULE_ARCH = arm).
-#
-# Or, generates a separate monitor.bin binary with its own address space
-# (when MONITOR_MODULE = true, in the case of MODULE_ARCH = arm64).
-#
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-MONARCH := $(MONITOR_ARCH)
-MODULE_ARCH := $(MONARCH)
-
-INCLUDES += \
- -I$(LOCAL_DIR)/include \
- -I$(LOCAL_DIR)/$(MONARCH)/include
-
-ifeq ($(MONARCH),arm)
-$(error arm32 standalone monitor binary not supported)
-endif
-
-MODULE_SRCS += \
- $(LOCAL_DIR)/common/debug.c \
- $(LOCAL_DIR)/common/printf.c
-
-ifeq ($(MONARCH),arm64)
-MODULE_SRCS += \
- $(LOCAL_DIR)/arm64/monitor_start.S \
- $(LOCAL_DIR)/arm64/monitor_vector.S \
- $(LOCAL_DIR)/arm64/monitor_cpu.S \
- $(LOCAL_DIR)/arm64/monitor_fastcall.S \
- $(LOCAL_DIR)/arm64/monitor_lib.S \
- $(LOCAL_DIR)/arm64/monitor_mmu.S \
- $(LOCAL_DIR)/arm64/cache_helpers.S
-
-MODULE_CC := $(TOOLCHAIN_PREFIX64)gcc
-MODULE_LD := $(TOOLCHAIN_PREFIX64)ld
-MON_OBJCOPY := $(TOOLCHAIN_PREFIX64)objcopy
-#
-# If we're building a secure build include the secure world callbacks
-ifeq ($(STANDALONE_MONITOR),false)
-MODULE_SRCS += \
- $(LOCAL_DIR)/arm64/secure_callback.S
-endif # STANDALONE_MONITOR == false
-endif # MONARCH == arm64
-
-# generating separate $(MONARCH) monitor.bin
-ifeq ($(MONITOR_BIN),true)
-DEFINES += \
- WITH_MONITOR_BIN=1 \
- MONBITS=$(MONBITS) \
- MONBASE=$(MONBASE) \
- MONCPUS=$(MONCPUS) \
- MONTARGET_$(MONTARGET)=1
-
-MONITOR_MODULE := true
-MON_LD := $(MODULE_LD)
-MON_LINKER_SCRIPT += \
- $(BUILDDIR)/monitor-onesegment.ld
-
-ifeq ($(MONBASE),)
-$(error missing MONBASE variable, please set in target rules.mk)
-endif
-ifeq ($(MONBITS),)
-$(error missing MONBITS variable, please set in target rules.mk)
-endif
-ifeq ($(MONCPUS),)
-$(error missing MONCPUS variable, please set in target rules.mk)
-endif
-
-$(BUILDDIR)/monitor-onesegment.ld: $(LOCAL_DIR)/$(MONARCH)/monitor-onesegment.ld $(CONFIGHEADER)
- @echo generating $@
- @$(MKDIR)
- $(NOECHO)sed "s/%MEMBASE%/$(MONBASE)/" < $< > $@
-endif
-
-include make/module.mk
+++ /dev/null
-# comment out or override if you want to see the full output of each command
-NOECHO ?= @
-
-$(MONBIN): $(MONELF)
- @echo generating image: $@
- $(NOECHO)$(MON_OBJCOPY) -O binary $< $@
-
-# This target builds the barebones tos.img from monitor.bin
-$(TOSIMAGE): $(MONBIN)
- @echo generating image: $@
- tools/gen_tos_part_img.py $< $@
-
-$(MONELF): $(ALLMONITOR_OBJS) $(MON_LINKER_SCRIPT)
- @echo linking $@
- $(NOECHO)$(MON_LD) $(GLOBAL_LDFLAGS) -T $(MON_LINKER_SCRIPT) $(ALLMONITOR_OBJS) $(LIBGCC) -o $@
-
-# This builds a static library from platform/monitor for ote/tlk to link in
-$(MONLIB): $(ALLMODULE_OBJS)
- @echo building platform monitor static library $@
- $(AR) $(GLOBAL_ARFLAGS) $@ $<
+++ /dev/null
-# create a separate list of objects per source type
-MODULE_CSRCS := $(filter %.c,$(MODULE_SRCS))
-MODULE_CPPSRCS := $(filter %.cpp,$(MODULE_SRCS))
-MODULE_ASMSRCS := $(filter %.S,$(MODULE_SRCS))
-
-MODULE_COBJS := $(call TOBUILDDIR,$(patsubst %.c,%.o,$(MODULE_CSRCS)))
-MODULE_CPPOBJS := $(call TOBUILDDIR,$(patsubst %.cpp,%.o,$(MODULE_CPPSRCS)))
-MODULE_ASMOBJS := $(call TOBUILDDIR,$(patsubst %.S,%.o,$(MODULE_ASMSRCS)))
-
-# do the same thing for files specified in arm override mode
-MODULE_ARM_CSRCS := $(filter %.c,$(MODULE_ARM_OVERRIDE_SRCS))
-MODULE_ARM_CPPSRCS := $(filter %.cpp,$(MODULE_ARM_OVERRIDE_SRCS))
-MODULE_ARM_ASMSRCS := $(filter %.S,$(MODULE_ARM_OVERRIDE_SRCS))
-
-MODULE_ARM_COBJS := $(call TOBUILDDIR,$(patsubst %.c,%.o,$(MODULE_ARM_CSRCS)))
-MODULE_ARM_CPPOBJS := $(call TOBUILDDIR,$(patsubst %.cpp,%.o,$(MODULE_ARM_CPPSRCS)))
-MODULE_ARM_ASMOBJS := $(call TOBUILDDIR,$(patsubst %.S,%.o,$(MODULE_ARM_ASMSRCS)))
-
-MODULE_OBJS := $(MODULE_COBJS) $(MODULE_CPPOBJS) $(MODULE_ASMOBJS) $(MODULE_ARM_COBJS) $(MODULE_ARM_CPPOBJS) $(MODULE_ARM_ASMOBJS)
-
-#$(info MODULE_SRCS = $(MODULE_SRCS))
-#$(info MODULE_CSRCS = $(MODULE_CSRCS))
-#$(info MODULE_CPPSRCS = $(MODULE_CPPSRCS))
-#$(info MODULE_ASMSRCS = $(MODULE_ASMSRCS))
-
-#$(info MODULE_OBJS = $(MODULE_OBJS))
-#$(info MODULE_COBJS = $(MODULE_COBJS))
-#$(info MODULE_CPPOBJS = $(MODULE_CPPOBJS))
-#$(info MODULE_ASMOBJS = $(MODULE_ASMOBJS))
-
-$(MODULE_OBJS): MODULE_CC:=$(MODULE_CC)
-$(MODULE_OBJS): MODULE_OPTFLAGS:=$(MODULE_OPTFLAGS)
-$(MODULE_OBJS): MODULE_COMPILEFLAGS:=$(MODULE_COMPILEFLAGS)
-$(MODULE_OBJS): MODULE_CFLAGS:=$(MODULE_CFLAGS)
-$(MODULE_OBJS): MODULE_CPPFLAGS:=$(MODULE_CPPFLAGS)
-$(MODULE_OBJS): MODULE_ASMFLAGS:=$(MODULE_ASMFLAGS)
-$(MODULE_OBJS): MODULE_SRCDEPS:=$(MODULE_SRCDEPS)
-$(MODULE_OBJS): SRCDEPS:=$(SRCDEPS)
-
-$(MODULE_OBJS): $(MODULE_SRCDEPS) $(SRCDEPS)
-
-$(MODULE_COBJS): $(BUILDDIR)/%.o: %.c $(SRCDEPS)
- @$(MKDIR)
- @echo compiling $<
- $(NOECHO)$(MODULE_CC) $(GLOBAL_OPTFLAGS) $(MODULE_OPTFLAGS) $(GLOBAL_COMPILEFLAGS) $(MODULE_COMPILEFLAGS) $(GLOBAL_CFLAGS) $(MODULE_CFLAGS) $(THUMBCFLAGS) $(INCLUDES) $(MODULE_INCLUDES) -c $< -MD -MT $@ -MF $(@:%o=%d) -o $@
-
-$(MODULE_CPPOBJS): $(BUILDDIR)/%.o: %.cpp $(SRCDEPS)
- @$(MKDIR)
- @echo compiling $<
- $(NOECHO)$(MODULE_CC) $(GLOBAL_OPTFLAGS) $(MODULE_OPTFLAGS) $(GLOBAL_COMPILEFLAGS) $(MODULE_COMPILEFLAGS) $(GLOBAL_CPPFLAGS) $(MODULE_CPPFLAGS) $(THUMBCFLAGS) $(INCLUDES) $(MODULE_INCLUDES) -c $< -MD -MT $@ -MF $(@:%o=%d) -o $@
-
-$(MODULE_ASMOBJS): $(BUILDDIR)/%.o: %.S $(SRCDEPS)
- @$(MKDIR)
- @echo compiling $<
- $(NOECHO)$(MODULE_CC) $(GLOBAL_OPTFLAGS) $(MODULE_OPTFLAGS) $(GLOBAL_COMPILEFLAGS) $(MODULE_COMPILEFLAGS) $(GLOBAL_ASMFLAGS) $(MODULE_ASMFLAGS) $(THUMBCFLAGS) $(INCLUDES) $(MODULE_INCLUDES) -c $< -MD -MT $@ -MF $(@:%o=%d) -o $@
-
-# overridden arm versions
-$(MODULE_ARM_COBJS): $(BUILDDIR)/%.o: %.c $(SRCDEPS)
- @$(MKDIR)
- @echo compiling $<
- $(NOECHO)$(MODULE_CC) $(GLOBAL_OPTFLAGS) $(MODULE_OPTFLAGS) $(GLOBAL_COMPILEFLAGS) $(MODULE_COMPILEFLAGS) $(GLOBAL_CFLAGS) $(MODULE_CFLAGS) $(INCLUDES) $(MODULE_INCLUDES) -c $< -MD -MT $@ -MF $(@:%o=%d) -o $@
-
-$(MODULE_ARM_CPPOBJS): $(BUILDDIR)/%.o: %.cpp $(SRCDEPS)
- @$(MKDIR)
- @echo compiling $<
- $(NOECHO)$(MODULE_CC) $(GLOBAL_OPTFLAGS) $(MODULE_OPTFLAGS) $(GLOBAL_COMPILEFLAGS) $(MODULE_COMPILEFLAGS) $(GLOBAL_CPPFLAGS) $(MODULE_CPPFLAGS) $(INCLUDES) $(MODULE_INCLUDES) -c $< -MD -MT $@ -MF $(@:%o=%d) -o $@
-
-$(MODULE_ARM_ASMOBJS): $(BUILDDIR)/%.o: %.S $(SRCDEPS)
- @$(MKDIR)
- @echo compiling $<
- $(NOECHO)$(MODULE_CC) $(GLOBAL_OPTFLAGS) $(MODULE_OPTFLAGS) $(GLOBAL_COMPILEFLAGS) $(MODULE_COMPILEFLAGS) $(GLOBAL_ASMFLAGS) $(MODULE_ASMFLAGS) $(INCLUDES) $(MODULE_INCLUDES) -c $< -MD -MT $@ -MF $(@:%o=%d) -o $@
-
-# clear some variables we set here
-MODULE_CSRCS :=
-MODULE_CPPSRCS :=
-MODULE_ASMSRCS :=
-MODULE_COBJS :=
-MODULE_CPPOBJS :=
-MODULE_ASMOBJS :=
+++ /dev/null
-# Find the local dir of the make file
-GET_LOCAL_DIR = $(patsubst %/,%,$(dir $(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST))))
-
-# makes sure the target dir exists
-MKDIR = if [ ! -d $(dir $@) ]; then mkdir -p $(dir $@); fi
-
-# prepends the BUILD_DIR var to each item in the list
-TOBUILDDIR = $(addprefix $(BUILDDIR)/,$(1))
-
-COMMA := ,
-SPACE :=
-SPACE +=
-
-# generate a header file at $1 with an expanded variable in $2
-define MAKECONFIGHEADER
- @$(MKDIR)
- @echo generating $1
- @rm -f $1.tmp; \
- LDEF=`echo $1 | tr '/\\.-' '_'`; \
- echo \#ifndef __$${LDEF}_H > $1.tmp; \
- echo \#define __$${LDEF}_H >> $1.tmp; \
- for d in `echo $($2) | tr '[:lower:]' '[:upper:]'`; do \
- echo "#define $$d" | sed "s/=/\ /g;s/-/_/g;s/\//_/g" >> $1.tmp; \
- done; \
- echo \#endif >> $1.tmp; \
- if [ -f "$1" ]; then \
- if cmp "$1.tmp" "$1"; then \
- rm -f $1.tmp; \
- else \
- mv $1.tmp $1; \
- fi \
- else \
- mv $1.tmp $1; \
- fi
-endef
+++ /dev/null
-
-# modules
-#
-# args:
-# MODULE : module name (required)
-# MODULE_SRCS : list of source files, local path (required)
-# MODULE_DEPS : other modules that this one depends on
-# MODULE_DEFINES : #defines local to this module
-# MODULE_OPTFLAGS : OPTFLAGS local to this module
-# MODULE_COMPILEFLAGS : COMPILEFLAGS local to this module
-# MODULE_CFLAGS : CFLAGS local to this module
-# MODULE_CPPFLAGS : CPPFLAGS local to this module
-# MODULE_ASMFLAGS : ASMFLAGS local to this module
-# MODULE_SRCDEPS : extra dependencies that all of this module's files depend on
-# MODULE_EXTRA_OBJS : extra .o files that should be linked with the module
-
-# MODULE_ARM_OVERRIDE_SRCS : list of source files, local path that should be force compiled with ARM (if applicable)
-
-# the minimum module rules.mk file is as follows:
-#
-# LOCAL_DIR := $(GET_LOCAL_DIR)
-# MODULE := $(LOCAL_DIR)
-#
-# MODULE_SRCS := $(LOCAL_DIR)/at_least_one_source_file.c
-#
-# include make/module.mk
-
-# test for old style rules.mk
-ifneq ($(MODULE_OBJS),)
-$(warning MODULE_OBJS = $(MODULE_OBJS))
-$(error MODULE $(MODULE) is setting MODULE_OBJS, change to MODULE_SRCS)
-endif
-ifneq ($(OBJS),)
-$(warning OBJS = $(OBJS))
-$(error MODULE $(MODULE) is probably setting OBJS, change to MODULE_SRCS)
-endif
-
-MODULE_SRCDIR := $(MODULE)
-MODULE_BUILDDIR := $(call TOBUILDDIR,$(MODULE_SRCDIR))
-
-# add the listed module deps to the global list
-MODULES += $(MODULE_DEPS)
-
-#$(info module $(MODULE))
-#$(info MODULE_SRCDIR $(MODULE_SRCDIR))
-#$(info MODULE_BUILDDIR $(MODULE_BUILDDIR))
-#$(info MODULE_DEPS $(MODULE_DEPS))
-#$(info MODULE_SRCS $(MODULE_SRCS))
-#$(info MODULE_CC $(MODULE_CC))
-#$(info MODULE_LD $(MODULE_LD))
-
-# build with default toolchain/arch, unless module has overridden it
-ifeq ($(MODULE_CC),)
-MODULE_CC := $(CCACHE) $(TOOLCHAIN_PREFIX)gcc
-endif
-ifeq ($(MODULE_LD),)
-MODULE_LD := $(TOOLCHAIN_PREFIX)ld
-endif
-
-MODULE_DEFINES += MODULE_COMPILEFLAGS=\"$(subst $(SPACE),_,$(MODULE_COMPILEFLAGS))\"
-MODULE_DEFINES += MODULE_CFLAGS=\"$(subst $(SPACE),_,$(MODULE_CFLAGS))\"
-MODULE_DEFINES += MODULE_CPPFLAGS=\"$(subst $(SPACE),_,$(MODULE_CPPFLAGS))\"
-MODULE_DEFINES += MODULE_ASMFLAGS=\"$(subst $(SPACE),_,$(MODULE_ASMFLAGS))\"
-MODULE_DEFINES += MODULE_LDFLAGS=\"$(subst $(SPACE),_,$(MODULE_LDFLAGS))\"
-MODULE_DEFINES += MODULE_OPTFLAGS=\"$(subst $(SPACE),_,$(MODULE_OPTFLAGS))\"
-MODULE_DEFINES += MODULE_INCLUDES=\"$(subst $(SPACE),_,$(MODULE_INCLUDES))\"
-MODULE_DEFINES += MODULE_DEPS=\"$(subst $(SPACE),_,$(MODULE_DEPS))\"
-
-# generate a per-module config.h file
-MODULE_CONFIG := $(MODULE_BUILDDIR)/module_config.h
-
-$(MODULE_CONFIG): MODULE_DEFINES:=$(MODULE_DEFINES)
-$(MODULE_CONFIG): configheader
- $(call MAKECONFIGHEADER,$@,MODULE_DEFINES)
-
-GENERATED += $(MODULE_CONFIG)
-
-MODULE_COMPILEFLAGS += --include $(MODULE_CONFIG)
-
-MODULE_SRCDEPS += $(MODULE_CONFIG)
-
-# include the rules to compile the module's object files
-include make/compile.mk
-
-# MODULE_OBJS is passed back from compile.mk
-#$(info MODULE_OBJS = $(MODULE_OBJS))
-
-# build a ld -r style combined object
-MODULE_OBJECT := $(call TOBUILDDIR,$(MODULE_SRCDIR).mod.o)
-$(MODULE_OBJECT): MODULE_LD:=$(MODULE_LD)
-$(MODULE_OBJECT): $(MODULE_OBJS) $(MODULE_EXTRA_OBJS)
- @$(MKDIR)
- @echo linking $@
- $(NOECHO)$(MODULE_LD) -r $^ -o $@
-
-# track all the objects built
-ALLOBJS += $(MODULE_OBJS)
-
-# track the module object for make clean
-GENERATED += $(MODULE_OBJECT)
-
-# make the rest of the build depend on our output
-ifeq ($(MONITOR_MODULE),true)
-ALLMONITOR_OBJS := $(ALLMONITOR_OBJS) $(MODULE_OBJECT)
-else
-ALLMODULE_OBJS := $(ALLMODULE_OBJS) $(MODULE_OBJECT)
-endif
-
-# empty out any vars set here
-MODULE :=
-MODULE_SRCDIR :=
-MODULE_BUILDDIR :=
-MODULE_DEPS :=
-MODULE_SRCS :=
-MODULE_OBJS :=
-MODULE_DEFINES :=
-MODULE_OPTFLAGS :=
-MODULE_COMPILEFLAGS :=
-MODULE_CFLAGS :=
-MODULE_CPPFLAGS :=
-MODULE_ASMFLAGS :=
-MODULE_SRCDEPS :=
-MODULE_EXTRA_OBJS :=
-MODULE_CONFIG :=
-MODULE_OBJECT :=
-MODULE_ARM_OVERRIDE_SRCS :=
-MODULE_CC :=
-MODULE_LD :=
-MONITOR_MODULE :=
+++ /dev/null
-PREFIX ?= ..
-
-ifeq ($(TARGET_ARCH),arm64)
-TOOLCHAIN_PREFIX := ../../tools/aarch64-linux-android-4.8/bin/aarch64-linux-android-
-TOOLCHAIN_PREFIX64 := ../../tools/aarch64-linux-android-4.8/bin/aarch64-linux-android-
-else
-TOOLCHAIN_PREFIX ?= ../../tools/arm-eabi-4.7/bin/arm-eabi-
-TOOLCHAIN_PREFIX64 ?= ../../tools/aarch64-linux-android-4.8/bin/aarch64-linux-android-
-endif
-
-ifeq ($(MAKECMDGOALS),spotless)
-spotless:
- rm -rf $(PREFIX)/ $(MON_IMAGE)
-else
-
--include local.mk
-include make/macros.mk
-
-# If one of our goals (from the commandline) happens to have a
-# matching project/goal.mk, then we should re-invoke make with
-# that project name specified...
-
-project-name := $(firstword $(MAKECMDGOALS))
-
-ifneq ($(project-name),)
-ifneq ($(wildcard project/$(project-name).mk),)
-do-nothing := 1
-$(MAKECMDGOALS) _all: make-make
-make-make:
- @PROJECT=$(project-name) $(MAKE) $(filter-out $(project-name), $(MAKECMDGOALS))
-endif
-endif
-
-ifeq ($(do-nothing),)
-
-ifeq ($(PROJECT),)
-$(error No project specified. Use "make projectname" or put "PROJECT := projectname" in local.mk)
-endif
-
-DEBUG ?= 2
-
-BUILDDIR := $(PREFIX)/../build-$(TARGET)/secure_monitor
-CONFIGHEADER := $(BUILDDIR)/config.h
-MONELF := $(BUILDDIR)/monitor.elf
-MONBIN := $(BUILDDIR)/monitor.bin
-MONLIB := $(BUILDDIR)/libmonitor.a
-
-INCLUDES := -I$(BUILDDIR) -Iinclude -Ilib/monitor/arm64/include
-GLOBAL_OPTFLAGS ?= -Os
-GLOBAL_COMPILEFLAGS := -g -fno-builtin -finline -W -Wall -Wno-multichar -Wno-unused-parameter -Wno-unused-function -include $(CONFIGHEADER)
-GLOBAL_CFLAGS := --std=c99 -Werror-implicit-function-declaration
-#GLOBAL_CFLAGS += -Werror
-GLOBAL_CPPFLAGS := -fno-exceptions -fno-rtti -fno-threadsafe-statics
-#GLOBAL_CPPFLAGS += -Weffc++
-GLOBAL_ASMFLAGS := -DASSEMBLY
-GLOBAL_LDFLAGS :=
-GLOBAL_ARFLAGS := crsPD
-
-GLOBAL_COMPILEFLAGS += -ffunction-sections -fdata-sections
-GLOBAL_LDFLAGS += -gc-sections
-
-# top level rule, based on whether we are building whole tos or just monitor
-ifeq ($(STANDALONE_MONITOR), true)
-all:: $(TOSIMAGE)
-else
-ifeq ($(MONITOR_LIBRARY), true)
-all:: $(MONLIB)
-else
-all:: $(MONBIN)
-endif # MONITOR_LIBRARY == true (for t124 builds only)
-endif # STANDALONE_MONITOR == true (for 64 bit monitor, non tlk builds)
-
-# master module object list
-ALLOBJS_MODULE :=
-
-# master object list (for dep generation)
-ALLOBJS :=
-
-# a linker script needs to be declared in one of the project/target/platform files
-LINKER_SCRIPT :=
-MON_LINKER_SCRIPT :=
-
-# anything you add here will be deleted in make clean
-GENERATED := $(CONFIGHEADER)
-
-# anything added to DEFINES will be put into $(BUILDDIR)/config.h
-DEFINES := LK=1
-
-# Anything added to SRCDEPS will become a dependency of every source file in the system.
-# Useful for header files that may be included by one or more source files.
-SRCDEPS := $(CONFIGHEADER)
-
-# these need to be filled out by the project/target/platform rules.mk files
-TARGET :=
-PLATFORM :=
-ARCH :=
-ALLMODULES :=
-MODULES :=
-
-# any rules you put here will also be built by the system before considered being complete
-EXTRA_BUILDDEPS :=
-
-# any rules you put here will be depended on in clean builds
-EXTRA_CLEANDEPS :=
-
-# any objects you put here get linked with the final image
-EXTRA_OBJS :=
-
-include target/$(TARGET)/rules.mk
-include platform/$(PLATFORM)/rules.mk
-
-$(info PROJECT = $(PROJECT))
-$(info PLATFORM = $(PLATFORM))
-$(info TARGET = $(TARGET))
-$(info STANDALONE_MONITOR = $(STANDALONE_MONITOR))
-$(info TARGET_ARCH = $(TARGET_ARCH))
-
-include arch/$(ARCH)/rules.mk
-
-ifeq ($(MONITOR_LIBRARY), false)
-include lib/monitor/rules.mk
-endif
-include platform/tegra/monitor/rules.mk
-
-# any extra top level build dependencies that someone declared
-all:: $(EXTRA_BUILDDEPS)
-
-# add some automatic configuration defines
-DEFINES += \
- PROJECT_$(PROJECT)=1 \
- TARGET_$(TARGET)=1 \
- PLATFORM_$(PLATFORM)=1 \
- ARCH_$(ARCH)=1 \
- $(addsuffix =1,$(addprefix WITH_,$(ALLMODULES)))
-
-# debug build?
-ifneq ($(DEBUG),)
-DEFINES += \
- DEBUG=$(DEBUG)
-endif
-
-# allow additional defines from outside the build system
-ifneq ($(EXTERNAL_DEFINES),)
-DEFINES += $(EXTERNAL_DEFINES)
-$(info EXTERNAL_DEFINES = $(EXTERNAL_DEFINES))
-endif
-
-DEPS := $(ALLOBJS:%o=%d)
-
-#$(warning DEPS=$(DEPS))
-
-# default to no ccache
-CCACHE ?=
-CC := $(CCACHE) $(TOOLCHAIN_PREFIX)gcc
-LD := $(TOOLCHAIN_PREFIX)ld
-OBJDUMP := $(TOOLCHAIN_PREFIX)objdump
-OBJCOPY := $(TOOLCHAIN_PREFIX)objcopy
-CPPFILT := $(TOOLCHAIN_PREFIX)c++filt
-SIZE := $(TOOLCHAIN_PREFIX)size
-NM := $(TOOLCHAIN_PREFIX)nm
-AR := $(TOOLCHAIN_PREFIX)ar
-
-# put all of the global build flags in config.h to force a rebuild if any change
-DEFINES += INCLUDES=\"$(subst $(SPACE),_,$(INCLUDES))\"
-DEFINES += GLOBAL_COMPILEFLAGS=\"$(subst $(SPACE),_,$(GLOBAL_COMPILEFLAGS))\"
-DEFINES += GLOBAL_OPTFLAGS=\"$(subst $(SPACE),_,$(GLOBAL_OPTFLAGS))\"
-DEFINES += GLOBAL_CFLAGS=\"$(subst $(SPACE),_,$(GLOBAL_CFLAGS))\"
-DEFINES += GLOBAL_CPPFLAGS=\"$(subst $(SPACE),_,$(GLOBAL_CPPFLAGS))\"
-DEFINES += GLOBAL_ASMFLAGS=\"$(subst $(SPACE),_,$(GLOBAL_ASMFLAGS))\"
-DEFINES += GLOBAL_LDFLAGS=\"$(subst $(SPACE),_,$(GLOBAL_LDFLAGS))\"
-
-# comment out or override if you want to see the full output of each command
-NOECHO ?= @
-
-ifneq ($(OBJS),)
-$(warning OBJS=$(OBJS))
-$(error OBJS is not empty, please convert to new module format)
-endif
-ifneq ($(OPTFLAGS),)
-$(warning OPTFLAGS=$(OPTFLAGS))
-$(error OPTFLAGS is not empty, please use GLOBAL_OPTFLAGS or MODULE_OPTFLAGS)
-endif
-ifneq ($(CFLAGS),)
-$(warning CFLAGS=$(CFLAGS))
-$(error CFLAGS is not empty, please use GLOBAL_CFLAGS or MODULE_CFLAGS)
-endif
-ifneq ($(CPPFLAGS),)
-$(warning CPPFLAGS=$(CPPFLAGS))
-$(error CPPFLAGS is not empty, please use GLOBAL_CPPFLAGS or MODULE_CPPFLAGS)
-endif
-
-# the logic to compile and link stuff is in here
-include make/build.mk
-
-clean: $(EXTRA_CLEANDEPS)
- rm -f $(ALLOBJS) $(DEPS) $(GENERATED)
-
-# generate a config.h file with all of the DEFINES laid out in #define format
-configheader:
-
-$(CONFIGHEADER): configheader
- $(call MAKECONFIGHEADER,$@,DEFINES)
-
-# Empty rule for the .d files. The above rules will build .d files as a side
-# effect. Only works on gcc 3.x and above, however.
-%.d:
-
-ifeq ($(filter $(MAKECMDGOALS), clean), )
--include $(DEPS)
-endif
-
-.PHONY: configheader
-endif
-
-endif # make spotless
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR)
-
-# shared platform code
-MODULE_SRCS += \
- $(LOCAL_DIR)/debug.c \
- $(LOCAL_DIR)/init.c
-
-include make/module.mk
-
-
+++ /dev/null
-/*
- * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_TEGRA_MEMMAP_H
-#define __PLATFORM_TEGRA_MEMMAP_H
-
-#include <memmap_ext.h>
-
-#define TEGRA_ARM_PERIF_BASE 0x50040000
-#define TEGRA_ARM_PERIF_SIZE SZ_8K
-
-#define TEGRA_ARM_INT_DIST_BASE 0x50041000
-#define TEGRA_ARM_INT_DIST_SIZE SZ_4K
-
-#define TEGRA_PRIMARY_ICTLR_BASE 0x60004000
-#define TEGRA_PRIMARY_ICTLR_SIZE 64
-
-#define TEGRA_ARBGNT_ICTLR_BASE 0x60004040
-#define TEGRA_ARBGNT_ICTLR_SIZE 192
-
-#define TEGRA_SECONDARY_ICTLR_BASE 0x60004100
-#define TEGRA_SECONDARY_ICTLR_SIZE 64
-
-#define TEGRA_TERTIARY_ICTLR_BASE 0x60004200
-#define TEGRA_TERTIARY_ICTLR_SIZE 64
-
-#define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300
-#define TEGRA_QUATERNARY_ICTLR_SIZE 64
-
-#define TEGRA_QUINARY_ICTLR_BASE 0x60004400
-#define TEGRA_QUINARY_ICTLR_SIZE SZ_64
-
-#define TEGRA_TMR1_BASE 0x60005000
-#define TEGRA_TMR1_SIZE SZ_8
-
-#define TEGRA_TMR2_BASE 0x60005008
-#define TEGRA_TMR2_SIZE SZ_8
-
-#define TEGRA_TMRUS_BASE 0x60005010
-#define TEGRA_TMRUS_SIZE 64
-
-#define TEGRA_TMR3_BASE 0x60005050
-#define TEGRA_TMR3_SIZE SZ_8
-
-#define TEGRA_TMR4_BASE 0x60005058
-#define TEGRA_TMR4_SIZE SZ_8
-
-#define TEGRA_TMR5_BASE 0x60005060
-#define TEGRA_TMR5_SIZE 8
-
-#define TEGRA_TMR6_BASE 0x60005068
-#define TEGRA_TMR6_SIZE 8
-
-#define TEGRA_TMR7_BASE 0x60005070
-#define TEGRA_TMR7_SIZE 8
-
-#define TEGRA_TMR8_BASE 0x60005078
-#define TEGRA_TMR8_SIZE 8
-
-#define TEGRA_TMR9_BASE 0x60005080
-#define TEGRA_TMR9_SIZE 8
-
-#define TEGRA_TMR10_BASE 0x60005088
-#define TEGRA_TMR10_SIZE 8
-
-#define TEGRA_WDT0_BASE 0x60005100
-#define TEGRA_WDT0_SIZE 32
-
-#define TEGRA_WDT1_BASE 0x60005120
-#define TEGRA_WDT1_SIZE 32
-
-#define TEGRA_WDT2_BASE 0x60005140
-#define TEGRA_WDT2_SIZE 32
-
-#define TEGRA_WDT3_BASE 0x60005160
-#define TEGRA_WDT3_SIZE 32
-
-#define TEGRA_WDT4_BASE 0x60005180
-#define TEGRA_WDT4_SIZE 32
-
-#define TEGRA_CLK_RESET_BASE 0x60006000
-#define TEGRA_CLK_RESET_SIZE SZ_4K
-
-#define TEGRA_FLOW_CTRL_BASE 0x60007000
-#define TEGRA_FLOW_CTRL_SIZE 20
-
-#define TEGRA_SB_BASE 0x6000C200
-#define TEGRA_SB_SIZE 256
-
-#define TEGRA_GPIO_BASE 0x6000D000
-#define TEGRA_GPIO_SIZE SZ_4K
-
-#define TEGRA_EXCEPTION_VECTORS_BASE 0x6000F000
-#define TEGRA_EXCEPTION_VECTORS_SIZE SZ_4K
-
-#define TEGRA_UARTA_BASE 0x70006000
-#define TEGRA_UARTA_SIZE 64
-
-#define TEGRA_UARTB_BASE 0x70006040
-#define TEGRA_UARTB_SIZE 64
-
-#define TEGRA_UARTC_BASE 0x70006200
-#define TEGRA_UARTC_SIZE SZ_256
-
-#define TEGRA_UARTD_BASE 0x70006300
-#define TEGRA_UARTD_SIZE SZ_256
-
-#define TEGRA_UARTE_BASE 0x70006400
-#define TEGRA_UARTE_SIZE SZ_256
-
-#define TEGRA_RTC_BASE 0x7000E000
-#define TEGRA_RTC_SIZE SZ_256
-
-#define TEGRA_PMC_BASE 0x7000E400
-#define TEGRA_PMC_SIZE SZ_256
-
-#define TEGRA_SE_BASE 0x70012000
-#define TEGRA_SE_SIZE SZ_8K
-
-#define TEGRA_TZRAM_BASE 0x7C010000
-#define TEGRA_TZRAM_SIZE 0x10000
-
-#define NV_ARM_CORE_HIVEC_BASE 0xFFFF0000
-
-#endif /*__PLATFORM_TEGRA_MEMMAP_H */
-
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_MONITOR_H
-#define __PLATFORM_MONITOR_H
-
-void platform_init_memory(uint32_t sec_base, uint32_t sec_size);
-void platform_restore_memory();
-status_t platform_program_vpr(uint32_t vpr_base, uint32_t vpr_size);
-void platform_config_interrupts(void);
-void platform_secure_dram_aperture(void);
-#endif
+++ /dev/null
-/*
- * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/* Silicon Partner SMCs */
-#define SMC_SIP_CPU_RESET_VECTOR_LEGACY 0x82000001
-#define SMC_SIP_L2_MANAGEMENT 0x82000002
-#define SMC_SIP_PROGRAM_VPR 0x82000003
-#define SMC_SIP_REGISTER_FIQ_GLUE 0x82000005
-#define SMC_SIP_DEVICE_SUSPEND 0x84000001
-#define SMC_SIP_CPU_RESET_VECTOR 0x84000003
+++ /dev/null
-/*
- * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __PLATFORM_TEGRA_MEMMAP_EXT_H
-#define __PLATFORM_TEGRA_MEMMAP_EXT_H
-
-#define TEGRA_MC_BASE 0x70019000
-#define TEGRA_MC_SIZE SZ_2K
-
-#define TEGRA_EMC_BASE 0x7001B000
-#define TEGRA_EMC_SIZE SZ_2K
-
-#define TEGRA_ARM_INT_CPU_BASE (TEGRA_ARM_PERIF_BASE + 0x2000)
-
-#endif /*__PLATFORM_TEGRA_MEMMAP_EXT_H */
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <debug.h>
-#include <platform/memmap.h>
-
-static unsigned int disable_debug;
-
-#define TEGRA_UART_NONE 0x0
-
-static uintptr_t uart_base[] = {
- TEGRA_UART_NONE,
- TEGRA_UARTA_BASE,
- TEGRA_UARTB_BASE,
- TEGRA_UARTC_BASE,
- TEGRA_UARTD_BASE,
- TEGRA_UARTE_BASE
-};
-
-static unsigned int debug_port;
-
-#define UART_RHR 0
-#define UART_THR 0
-#define UART_LSR 5
-
-static inline void write_uart_reg(int port, uint reg, unsigned char data)
-{
- *(volatile unsigned char *)(uart_base[port] + (reg << 2)) = data;
-}
-
-static inline unsigned char read_uart_reg(int port, uint reg)
-{
- return *(volatile unsigned char *)(uart_base[port] + (reg << 2));
-}
-
-static int uart_putc(int port, char c )
-{
- while (!(read_uart_reg(port, UART_LSR) & (1<<6)))
- ;
- write_uart_reg(port, UART_THR, c);
- return 0;
-}
-
-int uart_getc(int port, bool wait)
-{
- if (wait) {
- while (!(read_uart_reg(port, UART_LSR) & (1<<0)))
- ;
- } else {
- if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
- return -1;
- }
- return read_uart_reg(port, UART_RHR);
-}
-
-void platform_dputc(char c)
-{
- if (disable_debug || (debug_port == TEGRA_UART_NONE))
- return;
-
- if (c == '\n') {
- uart_putc(debug_port, '\r');
- } else if (c == '\0') {
- return;
- }
- uart_putc(debug_port, c);
-}
-
-int platform_dgetc(char *c, bool wait)
-{
- int _c;
-
- if (disable_debug || (debug_port == TEGRA_UART_NONE))
- return -1;
-
- if ((_c = uart_getc(debug_port, false)) < 0)
- return -1;
-
- *c = _c;
- return 0;
-}
-
-void platform_init_debug_port(unsigned int dbg_port)
-{
- debug_port = dbg_port;
-}
-
-void platform_halt(void)
-{
- dprintf(ALWAYS, "HALT: spinning forever...\n");
- for(;;);
-}
-
-void platform_disable_debug_intf(void)
-{
- disable_debug = 1;
-}
-
-void platform_enable_debug_intf(void)
-{
- disable_debug = 0;
-}
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#include <sys/types.h>
-#include <assert.h>
-#include <debug.h>
-#include <err.h>
-#include <reg.h>
-#include <string.h>
-#include <platform/interrupts.h>
-#include <arch/ops.h>
-#include <platform/memmap.h>
-#include <platform/platform_monitor.h>
-#include <lib/monitor/monitor_vector.h>
-
-#define GIC_DIST_CTR 0x004
-#define GIC_CPU_ICCIAR 0x00c
-
-#define ICTLR_CPU_IEP_VFIQ 0x08
-#define ICTLR_CPU_IEP_FIR 0x14
-#define ICTLR_CPU_IEP_FIR_SET 0x18
-#define ICTLR_CPU_IEP_FIR_CLR 0x1c
-
-#define ICTLR_CPU_IER 0x20
-#define ICTLR_CPU_IER_SET 0x24
-#define ICTLR_CPU_IER_CLR 0x28
-#define ICTLR_CPU_IEP_CLASS 0x2C
-
-#define ICTLR_COP_IER 0x30
-#define ICTLR_COP_IER_SET 0x34
-#define ICTLR_COP_IER_CLR 0x38
-#define ICTLR_COP_IEP_CLASS 0x3c
-
-static uint32_t num_ictrlrs;
-
-static uintptr_t ictlr_reg_base[] = {
- TEGRA_PRIMARY_ICTLR_BASE,
- TEGRA_SECONDARY_ICTLR_BASE,
- TEGRA_TERTIARY_ICTLR_BASE,
- TEGRA_QUATERNARY_ICTLR_BASE,
- TEGRA_QUINARY_ICTLR_BASE,
-};
-
-void platform_init_interrupts(void)
-{
- uint32_t i;
-
- num_ictrlrs = *REG32(TEGRA_ARM_INT_DIST_BASE + GIC_DIST_CTR);
- num_ictrlrs &= 0x1f;
-
- for (i = 0; i < num_ictrlrs; i++) {
- uintptr_t ictrl = ictlr_reg_base[i];
- *REG32(ictrl + ICTLR_CPU_IER_CLR) = ~0;
- *REG32(ictrl + ICTLR_CPU_IEP_CLASS) = 0;
- *REG32(ictrl + ICTLR_CPU_IEP_FIR_CLR) = ~0;
- *REG32(ictrl + ICTLR_CPU_IER_SET) = ~0;
- *REG32(ictrl + ICTLR_COP_IER_CLR) = ~0;
- }
-}
-
-void platform_config_interrupts(void)
-{
- int i;
- int num_irqs;
- uintptr_t eic_dist_gicd_ctlr = TEGRA_ARM_PERIF_BASE + 0x1000;
- uintptr_t eic_dist_gicd_typer = TEGRA_ARM_PERIF_BASE + 0x1004;
- uintptr_t eic_dist_gicd_groupr_base = TEGRA_ARM_PERIF_BASE + 0x1080;
- uintptr_t eic_dist_gicd_isenabler = TEGRA_ARM_PERIF_BASE + 0x1110;
- uintptr_t eic_dist_gicd_prio_base = TEGRA_ARM_PERIF_BASE + 0x1400;
- uintptr_t eic_dist_gicd_targetsr_base = TEGRA_ARM_PERIF_BASE + 0x1800;
- uintptr_t eic_dist_gicd_intconfig_base = TEGRA_ARM_PERIF_BASE + 0x1C00;
- uintptr_t eic_proc_if_gicc_ctlr = TEGRA_ARM_PERIF_BASE + 0x2000;
- uintptr_t eic_proc_if_gicc_pmr = TEGRA_ARM_PERIF_BASE + 0x2004;
- uint32_t val = 0, wdt_cpu = (4 * 32) + 27, wdt_cop = (4 * 32) + 28;
-
- num_irqs = *(volatile uint32_t *)(eic_dist_gicd_typer);
- num_irqs = (num_irqs & 0x1f) + 1;
-
- uintptr_t base = eic_dist_gicd_groupr_base;
- for (i = 0; i < num_irqs; i++)
- *(volatile uint32_t *)(base + i * 4) = ~0;
-
- /* enable fiqs, group 0/1, irq/fiq bypass fields */
- val = (1 << 0 | 1 << 1 | 1 << 3 | 0xF << 5);
- *(volatile uint32_t *)(eic_proc_if_gicc_ctlr) = val;
-
- /* priority mask max, accept ints at all priority levels */
- *(volatile uint32_t *)(eic_proc_if_gicc_pmr) = 0xFF;
-
- /* enable group 0/1 in the distributor */
- *(volatile uint32_t *)(eic_dist_gicd_ctlr) = (1 << 1) | (1 << 0);
-
- /* enable path for the 2 WDTs in GIC: CPU = 27, COP = 28 */
- val = *(volatile uint32_t *)(eic_dist_gicd_isenabler);
- val |= (1 << 27) | (1 << 28);
- *(volatile uint32_t *)(eic_dist_gicd_isenabler) = val;
-
- /* map WDT_CPU to CPU 0-3 */
- *(volatile uint32_t *)(eic_dist_gicd_targetsr_base +
- ((wdt_cpu / 4) * 4)) |= ~(0xFF << ((wdt_cpu % 4) * 8));
- *(volatile uint32_t *)(eic_dist_gicd_targetsr_base +
- ((wdt_cpu / 4) * 4)) |= (0x1 << ((wdt_cpu % 4) * 8));
-
- /* map WDT_AVP to CPU 0 */
- *(volatile uint32_t *)(eic_dist_gicd_targetsr_base +
- ((wdt_cop / 4) * 4)) |= ~(0xFF << ((wdt_cop % 4) * 8));
- *(volatile uint32_t *)(eic_dist_gicd_targetsr_base +
- ((wdt_cop / 4) * 4)) |= (0x1 << ((wdt_cop % 4) * 8));
-
- /* configure both WDTs as level-triggered interrupts */
- val = *(volatile uint32_t *)(eic_dist_gicd_intconfig_base +
- ((wdt_cpu / 16) * 4));
- val &= ~(3 << ((wdt_cpu % 16) * 2));
- *(volatile uint32_t *)(eic_dist_gicd_intconfig_base +
- ((wdt_cpu / 16) * 4)) = val;
- val = *(volatile uint32_t *)(eic_dist_gicd_intconfig_base +
- ((wdt_cop / 16) * 4));
- val &= ~(3 << ((wdt_cop % 16) * 2));
- *(volatile uint32_t *)(eic_dist_gicd_intconfig_base +
- ((wdt_cop / 16) * 4)) = val;
-
- /* configure CPU WDT and COP WDT as FIQ (grp 0) */
- val = *(volatile uint32_t *)(eic_dist_gicd_groupr_base +
- ((wdt_cpu / 32) * 4));
- val &= ~(1 << (wdt_cpu % 32));
- val &= ~(1 << (wdt_cop % 32));
- *(volatile uint32_t *)(eic_dist_gicd_groupr_base +
- ((wdt_cpu / 32) * 4)) = val;
-
- /* CPU and COP WDT are high priority */
- val = *(volatile uint32_t *)(eic_dist_gicd_prio_base +
- ((wdt_cpu / 4) * 4));
- val &= ~(0xFF << ((wdt_cop % 4) * 8));
- val &= ~(0xFF << ((wdt_cpu % 4) * 8));
- *(volatile uint32_t *)(eic_dist_gicd_prio_base +
- ((wdt_cpu / 4) * 4)) = val;
-}
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <err.h>
-#include <debug.h>
-#include <platform.h>
-#include <platform/memmap.h>
-#include <reg.h>
-#include <string.h>
-
-#include <lib/monitor/monitor_vector.h>
-#include <platform/platform_monitor.h>
-
-#define SZ_1MB 0x00100000
-
-#define MC_SMMU_CONFIG_0 0x10
-#define MC_SMMU_CONFIG_0_SMMU_ENABLE_DISABLE 0
-#define MC_SMMU_CONFIG_0_SMMU_ENABLE_ENABLE 1
-
-#define CLK_RST_CONTROLLER_RST_DEVICES_X_0 0x28c
-#define GPU_RESET_MASK (1 << 24)
-
-#define MC_SMMU_TLB_CONFIG_0 0x14
-#define MC_SMMU_TLB_CONFIG_0_RESET_VAL 0x20000010
-
-#define MC_SMMU_PTC_CONFIG_0 0x18
-#define MC_SMMU_PTC_CONFIG_0_RESET_VAL 0x2000003f
-
-#define MC_SMMU_TLB_FLUSH_0 0x30
-#define TLB_FLUSH_VA_MATCH_ALL 0
-#define TLB_FLUSH_ASID_MATCH_DISABLE 0
-#define TLB_FLUSH_ASID_MATCH_SHIFT 31
-#define MC_SMMU_TLB_FLUSH_ALL \
- (TLB_FLUSH_VA_MATCH_ALL | \
- (TLB_FLUSH_ASID_MATCH_DISABLE << TLB_FLUSH_ASID_MATCH_SHIFT))
-
-#define MC_SMMU_PTC_FLUSH_0 0x34
-#define MC_SMMU_PTC_FLUSH_ALL 0
-
-#define MC_SMMU_ASID_SECURITY_0 0x38
-#define ASID_SECURITY (0)
-
-#define MC_SECURITY_CFG0_0 0x70
-#define MC_SECURITY_CFG1_0 0x74
-
-#define MC_SMMU_TRANSLATION_ENABLE_0_0 0x228
-#define MC_SMMU_TRANSLATION_ENABLE_1_0 0x22c
-#define MC_SMMU_TRANSLATION_ENABLE_2_0 0x230
-#define MC_SMMU_TRANSLATION_ENABLE_3_0 0x234
-#define MC_SMMU_TRANSLATION_ENABLE_4_0 0xb98
-#define TRANSLATION_ENABLE (~0)
-
-#define MC_VIDEO_PROTECT_BOM 0x648
-#define MC_VIDEO_PROTECT_SIZE_MB 0x64c
-
-static uint32_t platform_sec_base;
-static uint32_t platform_sec_size;
-static uintptr_t save_vpr_base;
-static uintptr_t save_vpr_size;
-
-static void init_smmu_hw()
-{
- uintptr_t mc_base = TEGRA_MC_BASE;
-
- /* allow translations for all MC engines */
- *REG32(mc_base + MC_SMMU_TRANSLATION_ENABLE_0_0) = TRANSLATION_ENABLE;
- *REG32(mc_base + MC_SMMU_TRANSLATION_ENABLE_1_0) = TRANSLATION_ENABLE;
- *REG32(mc_base + MC_SMMU_TRANSLATION_ENABLE_2_0) = TRANSLATION_ENABLE;
- *REG32(mc_base + MC_SMMU_TRANSLATION_ENABLE_3_0) = TRANSLATION_ENABLE;
- *REG32(mc_base + MC_SMMU_TRANSLATION_ENABLE_4_0) = TRANSLATION_ENABLE;
-
- *REG32(mc_base + MC_SMMU_ASID_SECURITY_0) = ASID_SECURITY;
-
- *REG32(mc_base + MC_SMMU_TLB_CONFIG_0) = MC_SMMU_TLB_CONFIG_0_RESET_VAL;
- *REG32(mc_base + MC_SMMU_PTC_CONFIG_0) = MC_SMMU_PTC_CONFIG_0_RESET_VAL;
-
- /* flush PTC and TLB */
- *REG32(mc_base + MC_SMMU_PTC_FLUSH_0) = MC_SMMU_PTC_FLUSH_ALL;
- (void) *REG32(mc_base + MC_SMMU_CONFIG_0); /* read to flush writes */
- *REG32(mc_base + MC_SMMU_TLB_FLUSH_0) = MC_SMMU_TLB_FLUSH_ALL;
-
- /* enable SMMU */
- *REG32(mc_base + MC_SMMU_CONFIG_0) = MC_SMMU_CONFIG_0_SMMU_ENABLE_ENABLE;
- (void) *REG32(mc_base + MC_SMMU_CONFIG_0); /* read to flush writes */
-}
-
-void platform_secure_dram_aperture()
-{
- *REG32(TEGRA_MC_BASE + MC_SECURITY_CFG0_0) = platform_sec_base;
- *REG32(TEGRA_MC_BASE + MC_SECURITY_CFG1_0) = (platform_sec_size >> 20);
-}
-
-status_t platform_program_vpr(uint32_t vpr_base, uint32_t vpr_size)
-{
- uintptr_t save_vpr_end, vpr_end;
- uint32_t val;
-
- /* if GPU is not in reset mode, then return error */
- val = readl(TEGRA_CLK_RESET_BASE + CLK_RST_CONTROLLER_RST_DEVICES_X_0);
- val &= GPU_RESET_MASK;
- if (!val) {
- dprintf(CRITICAL, "%s: GPU is not in reset mode\n", __func__);
- return ERR_NOT_ALLOWED;
- }
-
- if (!save_vpr_base && !save_vpr_size) {
- save_vpr_base = *REG32(TEGRA_MC_BASE + MC_VIDEO_PROTECT_BOM);
- save_vpr_size = *REG32(TEGRA_MC_BASE + MC_VIDEO_PROTECT_SIZE_MB);
-
- /* apply nvtboot WAR as initial carveout may include HIVEC_BASE */
- if ((uint64_t)save_vpr_base + (save_vpr_size * SZ_1MB) > NV_ARM_CORE_HIVEC_BASE) {
- save_vpr_end = ROUNDDOWN(NV_ARM_CORE_HIVEC_BASE, SZ_1MB);
- save_vpr_size = (save_vpr_end - save_vpr_base) / SZ_1MB;
- }
- }
-
- /* check if vpr_size and vpr_base are MB align */
- if ((vpr_size & (SZ_1MB-1)) || (vpr_base & (SZ_1MB-1)) ) {
- dprintf(CRITICAL, "%s: vpr base/size not MB align\n", __func__);
- return ERR_GENERIC;
- }
-
- vpr_end = vpr_base + vpr_size;
- vpr_size = vpr_size / SZ_1MB;
- save_vpr_end = save_vpr_base + (save_vpr_size * SZ_1MB);
-
- /* check if there was a previous VPR region */
- if (save_vpr_size) {
-#if defined(WITH_MONITOR_BIN)
- mon_mmu_map_uncached(save_vpr_base, save_vpr_base, (save_vpr_size * SZ_1MB));
-#endif
- /* clear old regions now exposed in the new region */
- if (vpr_base > save_vpr_end || save_vpr_base > vpr_end) {
- /* clear whole old region (no overlap with new region) */
- memset((void*)save_vpr_base, 0, (save_vpr_size * SZ_1MB));
- } else {
- if (save_vpr_base < vpr_base) {
- /* clear old sub-region below new base */
- memset((void*)save_vpr_base, 0, vpr_base-save_vpr_base);
- }
- if (save_vpr_end > vpr_end) {
- /* clear old sub-region above new end */
- memset((void*)vpr_end, 0, save_vpr_end-vpr_end);
- }
- }
-#if defined(WITH_MONITOR_BIN)
- mon_mmu_unmap(save_vpr_base, (save_vpr_size * SZ_1MB));
-#endif
- }
-
- *REG32(TEGRA_MC_BASE + MC_VIDEO_PROTECT_BOM) = vpr_base;
- *REG32(TEGRA_MC_BASE + MC_VIDEO_PROTECT_SIZE_MB) = vpr_size;
- save_vpr_base = vpr_base;
- save_vpr_size = vpr_size;
-
- return NO_ERROR;
-}
-
-void platform_init_memory(uint32_t sec_base, uint32_t sec_size)
-{
- platform_sec_base = sec_base;
- platform_sec_size = sec_size;
-
- init_smmu_hw();
-}
-
-void platform_restore_memory()
-{
- init_smmu_hw();
- platform_secure_dram_aperture();
-
- /* Program VPR during LP0 exit, if we have the most current value */
- if (save_vpr_base && save_vpr_size) {
- *REG32(TEGRA_MC_BASE + MC_VIDEO_PROTECT_BOM) = save_vpr_base;
- *REG32(TEGRA_MC_BASE + MC_VIDEO_PROTECT_SIZE_MB) = save_vpr_size;
- }
-}
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <err.h>
-#include <debug.h>
-#include <platform.h>
-#include <platform/platform_monitor.h>
-#include <platform/platform_sip.h>
-#include <lib/monitor/monitor_vector.h>
-
-#define CORTEX_A57 0xD07
-#define CORTEX_A53 0xD03
-
-#define L2ACTLR (1 << 6)
-#define L2ECTLR (1 << 5)
-#define L2CTLR (1 << 4)
-#define CPUECTLR (1 << 1)
-#define CPUACTLR (1 << 0)
-#define ACTLR_MODE (L2ACTLR | L2ECTLR | L2CTLR | CPUECTLR | CPUACTLR)
-
-extern uint64_t __mon_cpu_fiq_glue, __mon_cpu_fiq_ns_stack;
-
-void platform_sip_handler(struct fastcall_frame *frame, uint32_t cpu)
-{
- switch (frame->r[0]) {
- case SMC_SIP_PROGRAM_VPR:
- frame->r[0] = platform_program_vpr(frame->r[1], frame->r[2]);
- break;
-
- case SMC_SIP_REGISTER_FIQ_GLUE:
- __mon_cpu_fiq_glue = frame->r[1];
- __mon_cpu_fiq_ns_stack = frame->r[2];
- frame->r[0] = NO_ERROR;
- break;
-
- default:
- frame->r[0] = ERR_NOT_SUPPORTED;
- }
-}
-
-/* Implementation specific CPU init */
-void platform_monitor_init_cpu(void)
-{
- uint32_t val = ACTLR_MODE;
- int cpu = mon_get_cpu_id();
-
- /* enable L2 and CPU ECTLR RW access from non-secure world */
- if (cpu == CORTEX_A57 || cpu == CORTEX_A53) {
- __asm__ volatile (
- "msr actlr_el3, %0 \n"
- "msr actlr_el2, %0 \n"
- :: "r" (val)
- );
- }
-}
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <reg.h>
-#include <psci.h>
-#include <platform/memmap.h>
-#include <lib/monitor/monitor_vector.h>
-
-#define MAX_CPUS 4
-
-#define MC_SECURITY_CFG1_0 0x74
-
-#define FLOW_CTRL_HALT_CPU0_EVENTS 0x0
-#define FLOW_CTRL_WAITEVENT (2 << 29)
-#define FLOW_CTRL_WAIT_FOR_INTERRUPT (4 << 29)
-#define FLOW_CTRL_JTAG_RESUME (1 << 28)
-#define FLOW_CTRL_HALT_SCLK (1 << 27)
-#define FLOW_CTRL_HALT_LIC_IRQ (1 << 11)
-#define FLOW_CTRL_HALT_LIC_FIQ (1 << 10)
-#define FLOW_CTRL_HALT_GIC_IRQ (1 << 9)
-#define FLOW_CTRL_HALT_GIC_FIQ (1 << 8)
-#define FLOW_CTLR_HALT_COP_EVENTS 0x4
-#define FLOW_CTRL_CPU0_CSR 0x8
-#define FLOW_CTRL_CSR_PWR_OFF_STS (1 << 16)
-#define FLOW_CTRL_CSR_INTR_FLAG (1 << 15)
-#define FLOW_CTRL_CSR_EVENT_FLAG (1 << 14)
-#define FLOW_CTRL_CSR_IMMEDIATE_WAKE (1 << 3)
-#define FLOW_CTRL_CSR_ENABLE (1 << 0)
-#define FLOW_CTRL_HALT_CPU1_EVENTS 0x14
-#define FLOW_CTRL_CPU1_CSR 0x18
-#define FLOW_CTLR_CC4_HVC_CONTROL 0x60
-#define FLOW_CTRL_CC4_HVC_ENABLE (1 << 0)
-#define FLOW_CTRL_CC4_RETENTION_CONTROL 0x64
-#define FLOW_CTRL_CC4_CORE0_CTRL 0x6c
-#define FLOW_CTRL_WAIT_WFI_BITMAP 0x100
-#define FLOW_CTRL_CC4_HVC_RETRY 0x8c
-#define FLOW_CTLR_L2FLUSH_CONTROL 0x94
-#define FLOW_CTLR_BPMP_CLUSTER_CONTROL 0x98
-#define FLOW_CTLR_BPMP_CLUSTER_LOCK (1 << 2)
-
-#define FLOW_CTLR_ENABLE_EXT 12
-#define FLOW_CTLR_PG_CPU_NONCPU 0x1
-#define FLOW_CTLR_TURNOFF_CPURAIL 0x2
-
-#define PMC_PWRGATE_STATUS 0x2C
-#define PMC_PWRGATE_TOGGLE 0x30
-#define PMC_TOGGLE_START 0x100
-#define PMC_SCRATCH39 0x138
-
-#define CLK_RST_DEV_L_SET 0x300
-#define CLK_RST_DEV_L_CLR 0x304
-#define CLK_COP_RST (1 << 1)
-
-#define EVP_COP_RESET_VECTOR 0x200
-
-/* Core state 0-9 */
-#define TEGRA_CPUIDLE_C4 4
-#define TEGRA_CPUIDLE_C7 7
-
-/* Cluster states 10-19 */
-#define TEGRA_CPUIDLE_CC4 14
-#define TEGRA_CPUIDLE_CC6 16
-#define TEGRA_CPUIDLE_CC7 17
-
-/* SoC states 20-29 */
-#define TEGRA_CPUIDLE_SC2 22
-#define TEGRA_CPUIDLE_SC3 23
-#define TEGRA_CPUIDLE_SC4 24
-#define TEGRA_CPUIDLE_SC7 27
-
-#define TEGRA_CLUSTER_SWITCH 31
-
-#define NO_CLUSTER_SWITCH_PENDING -1
-
-#define NO_FLUSH_L2 0
-#define FLUSH_L2 1
-
-extern volatile uint32_t cpus_started;
-
-static paddr_t flowctrl_offset_cpu_csr[MAX_CPUS] = {
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CPU0_CSR),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CPU1_CSR),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CPU1_CSR + 8),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CPU1_CSR + 16)
-};
-
-static paddr_t flowctrl_offset_halt_cpu[MAX_CPUS] = {
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_HALT_CPU0_EVENTS),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_HALT_CPU1_EVENTS),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_HALT_CPU1_EVENTS + 8),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_HALT_CPU1_EVENTS + 16)
-};
-
-static paddr_t flowctrl_offset_cc4_ctrl[MAX_CPUS] = {
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CC4_CORE0_CTRL),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CC4_CORE0_CTRL + 4),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CC4_CORE0_CTRL + 8),
- (TEGRA_FLOW_CTRL_BASE + FLOW_CTRL_CC4_CORE0_CTRL + 12)
-};
-
-static int cpu_powergate_mask[MAX_CPUS];
-static int pmc_cpu_powergate_id[MAX_CPUS] = {0 , 9, 10, 11};
-static int cluster_last_man_id;
-
-static inline void flowctrl_write_cpu_csr(int cpu_id, uint32_t val)
-{
- writel(val, flowctrl_offset_cpu_csr[cpu_id]);
- val = readl(flowctrl_offset_cpu_csr[cpu_id]);
-}
-
-static inline void flowctrl_write_halt_cpu(int cpu_id, uint32_t val)
-{
- writel(val, flowctrl_offset_halt_cpu[cpu_id]);
- val = readl(flowctrl_offset_halt_cpu[cpu_id]);
-}
-
-static inline void flowctrl_write_cc4_ctrl(int cpu_id, uint32_t val)
-{
- writel(val, flowctrl_offset_cc4_ctrl[cpu_id]);
- val = readl(flowctrl_offset_cc4_ctrl[cpu_id]);
-}
-
-/* Turn off CPU using flow controller */
-static void plat_cpu_off(int cpu_id)
-{
- uint32_t val;
-
- val = FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG |
- FLOW_CTRL_CSR_ENABLE | (FLOW_CTRL_WAIT_WFI_BITMAP << cpu_id);
-
- flowctrl_write_cpu_csr(cpu_id, val);
- flowctrl_write_halt_cpu(cpu_id, FLOW_CTRL_WAITEVENT);
- flowctrl_write_cc4_ctrl(cpu_id, 0);
-
- return;
-}
-
-/* Turn on CPU using flow controller or PMC */
-static int plat_cpu_on(int cpu_id)
-{
- uint32_t val;
-
- if (cpu_powergate_mask[cpu_id] == 0) {
- /* use PMC */
-
- /*
- * The PMC deasserts the START bit when it starts the power
- * ungate process. Loop till powergate START bit is asserted.
- */
- do {
- val = readl(TEGRA_PMC_BASE + PMC_PWRGATE_TOGGLE);
- } while (val & (1 << 8));
-
- /* fill in the CPU powergate mask */
- cpu_powergate_mask[cpu_id] = 1;
-
- val = pmc_cpu_powergate_id[cpu_id] | PMC_TOGGLE_START;
- writel(val, TEGRA_PMC_BASE + PMC_PWRGATE_TOGGLE);
-
- /*
- * The PMC deasserts the START bit when it starts the power
- * ungate process. Loop till powergate START bit is asserted.
- */
- do {
- val = readl(TEGRA_PMC_BASE + PMC_PWRGATE_TOGGLE);
- } while (val & (1 << 8));
-
- /* loop till the CPU is power ungated */
- do {
- val = readl(TEGRA_PMC_BASE + PMC_PWRGATE_STATUS);
- } while (val & (1 << pmc_cpu_powergate_id[cpu_id]));
-
- } else {
- /* use FC */
- flowctrl_write_cpu_csr(cpu_id, FLOW_CTRL_CSR_ENABLE);
- flowctrl_write_halt_cpu(cpu_id, FLOW_CTRL_WAITEVENT |
- FLOW_CTRL_HALT_SCLK);
- }
-
- return PSCI_RETURN_SUCCESS;
-}
-
-/* prepare for SC7 entry */
-static int plat_prepare_sc7(int cpu_id)
-{
- uint32_t val;
-
- flowctrl_write_halt_cpu(cpu_id, FLOW_CTRL_WAITEVENT);
-
- writel(1, TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_L2FLUSH_CONTROL);
-
- val = FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG |
- FLOW_CTRL_CSR_ENABLE | (FLOW_CTRL_WAIT_WFI_BITMAP << cpu_id) |
- (FLOW_CTLR_TURNOFF_CPURAIL << FLOW_CTLR_ENABLE_EXT);
- flowctrl_write_cpu_csr(cpu_id, val);
-
- return PSCI_RETURN_SUCCESS;
-}
-
-/* prepare for CC6/CC7 entry */
-static int plat_prepare_cc6_cc7(int cpu_id, uint32_t csr)
-{
- uint32_t val;
- uint32_t cluster;
-
- __asm__ volatile ("mrs %0, mpidr_el1\n"
- "ubfx %0, %0, #8, #4"
- : "=r" (cluster)
- :
- : "cc", "memory");
-
- val = FLOW_CTRL_HALT_GIC_IRQ | FLOW_CTRL_HALT_GIC_FIQ |
- FLOW_CTRL_HALT_LIC_IRQ | FLOW_CTRL_HALT_LIC_FIQ |
- FLOW_CTRL_WAITEVENT;
- flowctrl_write_halt_cpu(cpu_id, val);
-
- /* fast==0 => use SW L2 flush, slow==1 => use HW L2 flush */
- writel(!!cluster, TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_L2FLUSH_CONTROL);
-
- val = FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG |
- FLOW_CTRL_CSR_ENABLE |
- (FLOW_CTRL_WAIT_WFI_BITMAP << cpu_id);
- flowctrl_write_cpu_csr(cpu_id, val | csr);
-
- return cluster ? NO_FLUSH_L2 : FLUSH_L2;
-}
-
-/* prepare for cluster switch */
-static int plat_prepare_cluster_switch(int cpu_id, int afflvl)
-{
- int i;
- uint32_t val = (FLOW_CTRL_WAIT_WFI_BITMAP << cpu_id) |
- FLOW_CTRL_CSR_ENABLE | FLOW_CTRL_CSR_IMMEDIATE_WAKE;
-
- if (afflvl == 0) {
- flowctrl_write_cpu_csr(cpu_id, val);
- return NO_FLUSH_L2;
- }
-
- /* Affinity level == cluster, then PG the non CPU part */
- val |= FLOW_CTLR_PG_CPU_NONCPU << FLOW_CTLR_ENABLE_EXT;
- flowctrl_write_cpu_csr(cpu_id, val);
-
- /* store last man standing */
- cluster_last_man_id = cpu_id;
-
- for (i = 0; i < MAX_CPUS; i++) {
- if (i == cpu_id)
- continue;
-
- /* skip CPU if it has never been booted */
- if (i && !cpu_powergate_mask[i])
- continue;
-
- val = readl(flowctrl_offset_cpu_csr[i]);
-
- /* wait till current cpu is power gated by FC */
- while ((val & FLOW_CTRL_CSR_PWR_OFF_STS) == 0)
- val = readl(flowctrl_offset_cpu_csr[i]);
- }
-
- val = readl(TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_BPMP_CLUSTER_CONTROL);
- val &= ~FLOW_CTLR_BPMP_CLUSTER_LOCK;
- writel(val, TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_BPMP_CLUSTER_CONTROL);
-
- writel(0, TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_L2FLUSH_CONTROL);
-
- return FLUSH_L2;
-}
-
-static int plat_cpu_suspend(int cpu_id, int afflvl, int psci_state_id)
-{
- uint32_t val;
-
- flowctrl_write_cc4_ctrl(cpu_id, 0);
-
- switch (psci_state_id) {
- case TEGRA_CPUIDLE_SC7:
- cpus_started = 0;
- return plat_prepare_sc7(cpu_id);
-
- case TEGRA_CPUIDLE_CC6:
- val = FLOW_CTLR_PG_CPU_NONCPU << FLOW_CTLR_ENABLE_EXT;
- return plat_prepare_cc6_cc7(cpu_id, val);
-
- case TEGRA_CPUIDLE_CC7:
- val = FLOW_CTLR_TURNOFF_CPURAIL << FLOW_CTLR_ENABLE_EXT;
- return plat_prepare_cc6_cc7(cpu_id, val);
-
- case TEGRA_CLUSTER_SWITCH:
- cpus_started = 0;
- return plat_prepare_cluster_switch(cpu_id, afflvl);
-
- case TEGRA_CPUIDLE_C7:
- val = FLOW_CTRL_HALT_GIC_IRQ | FLOW_CTRL_HALT_GIC_FIQ |
- FLOW_CTRL_HALT_LIC_IRQ | FLOW_CTRL_HALT_LIC_FIQ |
- FLOW_CTRL_WAITEVENT;
- flowctrl_write_halt_cpu(cpu_id, val);
-
- val = FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG |
- FLOW_CTRL_CSR_ENABLE |
- (FLOW_CTRL_WAIT_WFI_BITMAP << cpu_id);
- flowctrl_write_cpu_csr(cpu_id, val);
- return NO_FLUSH_L2;
-
- default:
- break;
- }
-
- return PSCI_RETURN_INVALID_PARAMS;
-}
-
-void platform_psci_start(int cpu_id)
-{
- uint32_t val;
-
- if (cluster_last_man_id == NO_CLUSTER_SWITCH_PENDING ||
- cluster_last_man_id != cpu_id)
- return;
-
- val = readl(TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_BPMP_CLUSTER_CONTROL);
- val |= FLOW_CTLR_BPMP_CLUSTER_LOCK;
- writel(val, TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_BPMP_CLUSTER_CONTROL);
- val = readl(TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_BPMP_CLUSTER_CONTROL);
-
- cluster_last_man_id = NO_CLUSTER_SWITCH_PENDING;
-}
-
-void platform_psci_cpu_resume(int cpu_id)
-{
- uint32_t val;
- uintptr_t evp_base = TEGRA_EXCEPTION_VECTORS_BASE;
-
- flowctrl_write_cpu_csr(cpu_id, 0);
- flowctrl_write_halt_cpu(cpu_id, 0);
-
-#if defined(MONTARGET_ARM64)
- /*
- * Avoid relying on having seen an LP0 enter SMC.
- *
- * If MC_SECURITY_CFG1 has gone back zero (its POR value) then LP0
- * has occurred (as it's not part of BL's warmboot restore) and system
- * registers need to be reloaded.
- */
- val = readl(TEGRA_MC_BASE + MC_SECURITY_CFG1_0);
- if (val == (__mon_phys_size >> 20))
- return;
-
- /*
- * Restore BPMP reset address from SCRATCH39 and Reset BPMP.
- */
-
- /* 1. Halt BPMP */
- writel(FLOW_CTRL_WAITEVENT, TEGRA_FLOW_CTRL_BASE +
- FLOW_CTLR_HALT_COP_EVENTS);
-
- /* 2. Assert BPMP reset */
- writel(CLK_COP_RST, TEGRA_CLK_RESET_BASE + CLK_RST_DEV_L_SET);
-
- /* 3. Restore reset address (stored in PMC_SCRATCH39) */
- val = readl(TEGRA_PMC_BASE + PMC_SCRATCH39);
- writel(val, evp_base + EVP_COP_RESET_VECTOR);
- while (val != readl(evp_base + EVP_COP_RESET_VECTOR))
- ; // wait till value reaches EVP_COP_RESET_VECTOR
-
- val = readl(TEGRA_TMRUS_BASE);
- val += 2;
- while (val > readl(TEGRA_TMRUS_BASE));
-
- /* 4. De-assert BPMP reset */
- writel(CLK_COP_RST, TEGRA_CLK_RESET_BASE + CLK_RST_DEV_L_CLR);
-
- /* 5. Un-halt BPMP */
- writel(0, TEGRA_FLOW_CTRL_BASE + FLOW_CTLR_HALT_COP_EVENTS);
-#endif
-}
-
-int platform_psci_cpu_suspend(int cpu_id, uint32_t psci_state)
-{
- uint32_t state = (psci_state >> PSCI_POWER_STATE_TYPE_SHIFT) &
- PSCI_POWER_STATE_TYPE_MASK;
- uint32_t afflvl = (psci_state >> PSCI_POWER_STATE_AFFL_SHIFT) &
- PSCI_POWER_STATE_AFFL_MASK;
- int ret;
-
- if (state != PSCI_POWER_STATE_TYPE_POWER_DOWN)
- return PSCI_RETURN_DENIED;
-
- ret = plat_cpu_suspend(cpu_id, afflvl,
- psci_state & PSCI_POWER_STATE_ID_MASK);
-
- if (ret < 0)
- return ret;
-
- mon_cpu_power_down(ret);
-
- return PSCI_RETURN_SUCCESS;
-}
-
-void platform_psci_cpu_off(int cpu_id, uint32_t psci_state)
-{
- plat_cpu_off(cpu_id);
- mon_cpu_power_down(NO_FLUSH_L2);
-}
-
-int platform_psci_cpu_on(int cpu_id)
-{
- return plat_cpu_on(cpu_id);
-}
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <stdlib.h>
-#include <err.h>
-#include <debug.h>
-#include <assert.h>
-#include <platform.h>
-#include <platform/memmap.h>
-#include <reg.h>
-#include <string.h>
-#include <psci.h>
-#include <target/debugconfig.h>
-#include <platform/platform_monitor.h>
-#include <lib/monitor/monitor_vector.h>
-
-/* referenced APBDEV_PMC_SECURE registers */
-#define MC_SECURITY_CFG1_0 0x74
-
-#define PMC_SECURE_DISABLE2 0x2c4
-#define PMC_SECURE_DISABLE2_WRITE22_ON (1 << 28)
-
-#define PMC_SECURE_DISABLE3 0x2d8
-#define PMC_SECURE_DISABLE3_WRITE34_ON (1 << 20)
-#define PMC_SECURE_DISABLE3_WRITE35_ON (1 << 22)
-
-#define PMC_SECURE_SCRATCH22 0x338
-#define PMC_SECURE_SCRATCH34 0x368
-#define PMC_SECURE_SCRATCH35 0x36c
-
-#define EVP_CPU_RESET_VECTOR 0x100
-
-#define SB_CSR 0x0
-#define SB_CSR_NS_RST_VEC_WR_DIS (1 << 1)
-
-/* CPU reset vector */
-#define SB_AA64_RESET_LOW 0x30 // width = 31:0
-#define SB_AA64_RESET_HI 0x34 // width = 11:0
-
-volatile uint32_t cpus_started;
-static const uint32_t cpus_expected = ((1 << MONCPUS) - 1);
-
-/* sets of MMIO ranges setup */
-#define MMIO_RANGE_0_ADDR 0x50000000
-#define MMIO_RANGE_1_ADDR 0x60000000
-#define MMIO_RANGE_2_ADDR 0x70000000
-#define MMIO_RANGE_SIZE 0x200000
-
-#if defined(MONTARGET_DENVER)
-/*
- * For T132, CPUs reset to AARCH32, so the reset vector is first
- * armv8_trampoline and which does a warm reset to AARCH64 and
- * starts execution at the address in SCRATCH34/SCRATCH35.
- */
-static uint32_t armv8_trampoline[] __ALIGNED(8) = {
- 0xE3A00003, // mov r0, #3
- 0xEE0C0F50, // mcr p15, 0, r0, c12, c0, 2
- 0xEAFFFFFE, // b .
-};
-#endif
-
-static void psci_lock_reset_registers(void)
-{
- uint32_t reg;
-
- /* ensure SECURE_SCRATCH34/35 are write locked */
- reg = readl(TEGRA_PMC_BASE + PMC_SECURE_DISABLE3);
- reg |= (PMC_SECURE_DISABLE3_WRITE34_ON |
- PMC_SECURE_DISABLE3_WRITE35_ON);
- writel(reg, TEGRA_PMC_BASE + PMC_SECURE_DISABLE3); /* lock */
-
- /* set secure boot control (read to flush) */
- reg = readl(TEGRA_SB_BASE + SB_CSR);
- reg |= SB_CSR_NS_RST_VEC_WR_DIS;
- writel(reg, TEGRA_SB_BASE + SB_CSR);
- readl(TEGRA_SB_BASE + SB_CSR);
-
-#if !defined(WITH_AA64_CPU_RESET_VECTORS)
- /* ensure SECURE_SCRATCH22 is write locked */
- reg = readl(TEGRA_PMC_BASE + PMC_SECURE_DISABLE2);
- reg |= PMC_SECURE_DISABLE2_WRITE22_ON;
- writel(reg, TEGRA_PMC_BASE + PMC_SECURE_DISABLE2); /* lock */
-#endif
-}
-
-static void psci_program_reset_vectors(int cpu)
-{
- uint64_t phys_cpu_reset;
-
-#if WITH_AA64_CPU_RESET_VECTORS
- phys_cpu_reset = mon_virt_to_phys(&__mon_cpu_reset_vector);
-
- /* write lower 32 bits first, then the upper 11 bits */
- writel((phys_cpu_reset & 0xFFFFFFFF) | 1, TEGRA_SB_BASE + SB_AA64_RESET_LOW);
- phys_cpu_reset >>= 32;
- writel(phys_cpu_reset & 0x7FF, TEGRA_SB_BASE + SB_AA64_RESET_HI);
-
- psci_lock_reset_registers();
-#else
- phys_cpu_reset = mon_virt_to_phys(armv8_trampoline);
-
- /* set exception vector (read to flush) */
- writel(phys_cpu_reset, TEGRA_EXCEPTION_VECTORS_BASE + EVP_CPU_RESET_VECTOR);
- readl(TEGRA_EXCEPTION_VECTORS_BASE + EVP_CPU_RESET_VECTOR);
-
- psci_lock_reset_registers();
-#endif
-}
-
-static void psci_init_reset_vector(uint32_t cpu)
-{
- uint64_t phys_cpu_reset;
- uint32_t reg;
-
-#if !defined(WITH_AA64_CPU_RESET_VECTORS)
- /* SECURE_SCRATCH22 should be writable */
- reg = readl(TEGRA_PMC_BASE + PMC_SECURE_DISABLE2);
- ASSERT(!(reg & PMC_SECURE_DISABLE2_WRITE22_ON));
-
- /* initial AARCH32 reset address */
- phys_cpu_reset = mon_virt_to_phys(armv8_trampoline);
- writel(phys_cpu_reset, TEGRA_PMC_BASE + PMC_SECURE_SCRATCH22);
-
- /* make sure all CPUs have reset before reprogramming vector */
- while (cpus_started != cpus_expected)
- ;
-#endif
-
- /* both SECURE_SCRATCH34/SCRATCH35 should be writable */
- reg = readl(TEGRA_PMC_BASE + PMC_SECURE_DISABLE3);
- reg &= (PMC_SECURE_DISABLE3_WRITE34_ON | PMC_SECURE_DISABLE3_WRITE35_ON);
- ASSERT(!reg);
-
- /* set exception vector to be used to resume from suspend */
- phys_cpu_reset = mon_virt_to_phys(&__mon_cpu_reset_vector);
- writel(phys_cpu_reset & 0xFFFFFFFF, TEGRA_PMC_BASE + PMC_SECURE_SCRATCH34);
- phys_cpu_reset >>= 32;
- writel(phys_cpu_reset & 0x7FF, TEGRA_PMC_BASE + PMC_SECURE_SCRATCH35);
-
- psci_program_reset_vectors(cpu);
-}
-
-/*
- * One-time init called during cold boot from primary CPU
- */
-void platform_psci_init(uint32_t cpu)
-{
- /* identity map MMIO ranges for register access */
- mon_mmu_map_mmio(MMIO_RANGE_0_ADDR, MMIO_RANGE_0_ADDR, MMIO_RANGE_SIZE);
- mon_mmu_map_mmio(MMIO_RANGE_1_ADDR, MMIO_RANGE_1_ADDR, MMIO_RANGE_SIZE);
- mon_mmu_map_mmio(MMIO_RANGE_2_ADDR, MMIO_RANGE_2_ADDR, MMIO_RANGE_SIZE);
-
- platform_init_debug_port(DEFAULT_DEBUG_PORT);
-
- mon_atomic_or(&cpus_started, 1 << cpu);
-
- psci_init_reset_vector(cpu);
-
- platform_monitor_init_cpu();
- platform_init_memory(__mon_phys_base, __mon_phys_size);
- platform_config_interrupts();
- platform_psci_start(cpu);
-}
-
-/*
- * One time init call during end of cold boot from primary CPU
- */
-void platform_psci_coldboot_epilog(void)
-{
- /* mark entire TLK carveout as secure in the MC */
- platform_secure_dram_aperture();
-}
-
-/*
- * Routine is called when a CPU goes through reset, either a secondary
- * CPU during cold boot, or all CPUs during system suspend.
- */
-void platform_psci_cpu_has_reset(uint32_t cpu)
-{
- uint32_t reg;
-
- mon_atomic_or(&cpus_started, 1 << cpu);
-
-#if defined(MONTARGET_ARM64)
- platform_psci_cpu_resume(cpu);
- platform_monitor_init_cpu();
- platform_psci_start(cpu);
-#else
- /*
- * Opportunity to do an per-CPU setup after reset. For now, only
- * restores global state, so just run on the primary (CPU0).
- */
- if (cpu != 0)
- return;
-#endif
-
- /*
- * Avoid relying on having seen an LP0 enter SMC.
- *
- * If MC_SECURITY_CFG1 has gone back zero (its POR value) then LP0
- * has occurred (as it's not part of BL's warmboot restore) and system
- * registers need to be reloaded.
- */
- reg = readl(TEGRA_MC_BASE + MC_SECURITY_CFG1_0);
- if (reg == (__mon_phys_size >> 20))
- return;
-
- psci_program_reset_vectors(cpu);
- platform_restore_memory();
- platform_config_interrupts();
-}
-
-void platform_psci_handler(struct fastcall_frame *frame)
-{
- uint64_t ret = PSCI_RETURN_SUCCESS;
- int curr_cpu, target_cpu;
-
- __asm__ volatile (
- "mrs %0, mpidr_el1\n"
- "and %0, %0, #0xf\n"
- : "=r" (curr_cpu)
- );
-
- switch (frame->r[0]) {
- /*
- * Runs on the actual CPU which is being suspended.
- */
- case PSCI_FUNC_ID_CPU_SUSPEND_LEGACY:
- case PSCI_FUNC_ID_CPU_SUSPEND:
- /* save NS entry point */
- ((uint64_t *)&__mon_cpu_return_addr)[curr_cpu] = frame->r[2];
-#if !defined(MONTARGET_DENVER)
- ret = platform_psci_cpu_suspend(curr_cpu, frame->r[1]);
-#endif
- break;
-
-#if defined(MONTARGET_ARM64)
- /*
- * Runs on a CPU other than the one we want to get online.
- */
- case PSCI_FUNC_ID_CPU_ON:
- target_cpu = frame->r[1];
- ((uint64_t *)&__mon_cpu_return_addr)[target_cpu] = frame->r[2];
- ret = platform_psci_cpu_on(target_cpu);
- break;
-
- /*
- * Runs on the actual CPU which is being powered off.
- */
- case PSCI_FUNC_ID_CPU_OFF:
- mon_atomic_and(&cpus_started, ~(1 << curr_cpu));
- platform_psci_cpu_off(curr_cpu,
- PSCI_POWER_STATE_TYPE_POWER_DOWN);
- break;
-#endif
-
- default:
- ret = PSCI_RETURN_NOT_SUPPORTED;
- }
-
- frame->r[0] = ret;
-}
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR).platform
-
-ifeq ($(MONITOR_BIN),true)
-
-MONARCH := $(MONITOR_ARCH)
-MODULE_ARCH := $(MONARCH)
-
-# linked into the monitor build (monitor.bin)
-MONITOR_MODULE := true
-
-MODULE_SRCS += \
- $(LOCAL_DIR)/memory.c \
- $(LOCAL_DIR)/interrupts.c \
- $(LOCAL_DIR)/platform.c \
- $(LOCAL_DIR)/debug.c \
- $(LOCAL_DIR)/psci.c \
- $(LOCAL_DIR)/platform_psci.c
-
-INCLUDES += \
- -I$(LOCAL_DIR)/include \
- -I$(LOCAL_DIR)/$(MONARCH)/include
-
-DEFINES += \
- WITH_MONITOR_BIN=1 \
- MONCPUS=$(MONCPUS)
-
-ifeq ($(MONARCH),arm)
-MODULE_CC := $(TOOLCHAIN_PREFIX)gcc
-MODULE_LD := $(TOOLCHAIN_PREFIX)ld
-MON_OBJCOPY := $(TOOLCHAIN_PREFIX)objcopy
-endif
-
-ifeq ($(MONARCH),arm64)
-MODULE_CC := $(TOOLCHAIN_PREFIX64)gcc
-MODULE_LD := $(TOOLCHAIN_PREFIX64)ld
-MON_OBJCOPY := $(TOOLCHAIN_PREFIX64)objcopy
-endif
-
-else
-
-# linked into secureos build (lk.bin)
-MODULE_SRCS += \
- $(LOCAL_DIR)/memory.c \
- $(LOCAL_DIR)/interrupts.c
-
-endif
-
-include make/module.mk
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-MODULE := $(LOCAL_DIR).platform
-
-ENABLE_THUMB := false
-
-ARCH := arm
-CPU := generic
-
-INCLUDES += \
- -I$(LOCAL_DIR)/include \
- -I$(LOCAL_DIR)/include/platform/$(PLATFORM_SOC) \
- -I$(LOCAL_DIR)/common \
- -I../lib
-
-COMMON_DIR := $(LOCAL_DIR)/common
-PLATFORM_SOC_DIR := $(LOCAL_DIR)/$(PLATFORM_SOC)
-
-# The code within the monitor dir builds to a lib that's either
-# linked into a mon.bin (when MONITOR_BIN is true) or into the
-# secureos when it's not.
-#
-# Routines in the monitor dir are those that restore HW state.
-# In particular, SOC level state is restored there, while CPU
-# state was handled by lib/monitor or boot_secondary.S,
-#
-# In platform/tegra/common, there are still memory and interrupt
-# routines, but they're only called for secureos handling
-# (i.e. aren't part of the monitor or for restoring HW state).
-
-MODULE_DEPS += \
- $(LOCAL_DIR)/monitor
-
-include $(PLATFORM_SOC_DIR)/rules.mk
-
-# Disable all prints for release builds, only CRITICAL prints will be
-# printed in release builds. Change the value of DEBUG in else block
-# to 1->INFO and 2->SPEW prints in debug builds.
-ifeq ($(TARGET_BUILD_TYPE), release)
- DEBUG := 0
-else
- DEBUG := 1
-endif
-
-# relocate image to provided physaddr via MMU
-ARM_USE_MMU_RELOC := true
-
-# enable use of CPU caching
-ARM_USE_CPU_CACHING := true
-
-DEFINES += VMEMBASE=$(VMEMBASE) \
- VMEMSIZE=$(VMEMSIZE) \
- DEBUG=$(DEBUG) \
- WITH_CPU_EARLY_INIT=1
-
-# use a two segment memory layout, where all of the read-only sections
-# of the binary reside in rom, and the read/write are in memory. The
-# ROMBASE, VMEMBASE, and VMEMSIZE make variables are required to be set
-# for the linker script to be generated properly.
-#
-LINKER_SCRIPT += \
- $(BUILDDIR)/system-onesegment.ld
+++ /dev/null
-# ROMBASE, VMEMBASE, and VMEMSIZE are required for the linker script
-VMEMBASE := 0x48000000
-
-ARM_CPU := cortex-a15
-ARM_WITH_LPAE := true
-
-DEFINES += \
- WITH_PADDR_T_64BIT=1
-
-ifeq ($(TARGET),t124)
-DEFINES += \
- ARM_CLUSTER0_INIT_L2=1
-endif
+++ /dev/null
-/*
- * Copyright (c) 2008 Travis Geiselbrecht
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __TARGET_DEBUGCONFIG_H
-#define __TARGET_DEBUGCONFIG_H
-
-#define DEFAULT_DEBUG_PORT 4
-
-#endif
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-INCLUDES += \
- -I$(LOCAL_DIR)/include
-
-PLATFORM := tegra
-PLATFORM_SOC := tegra4
-MONITOR_ARCH := arm
-
-# using phys (MAP_NOR_BASE -> MAP_NOR_LIMIT) as VA space
-VMEMSIZE := 0x8000000 # 128MB
-
-DEFINES += \
- WITH_PLATFORM_IDLE=1
+++ /dev/null
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files
- * (the "Software"), to deal in the Software without restriction,
- * including without limitation the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-#ifndef __TARGET_DEBUGCONFIG_H
-#define __TARGET_DEBUGCONFIG_H
-
-#define DEFAULT_DEBUG_PORT 4
-
-#endif
+++ /dev/null
-LOCAL_DIR := $(GET_LOCAL_DIR)
-
-INCLUDES += \
- -I$(LOCAL_DIR)/include
-
-PLATFORM := tegra
-PLATFORM_SOC := tegra4
-
-# using phys (MAP_NOR_BASE -> MAP_NOR_LIMIT) as VA space
-VMEMSIZE := 0x8000000 # 128MB
-
-#
-# As part of the build, also generate a separate monitor.bin from
-# lib/monitor of the specified architecture. This binary will
-# an address space of 2^MONBITS in size linked at MONBASE.
-#
-MONITOR_ARCH := arm64
-MONITOR_BIN := true
-
-MODULE_DEPS += \
- lib/monitor
-
-MONBASE := 0x40000000
-MONBITS := 33
-MONCPUS := 2
-MONTARGET := DENVER
-
-# base of GIC dist/cpu registers
-ARM_GIC_DIST_BASE := 0x50041000
-ARM_GIC_CPU_BASE := 0x50042000
-
-# frequency of ARM generic timer
-ARM_SYSTEM_COUNTER_FREQ := 12000000
-
-DEFINES += \
- ARM_GIC_DIST_BASE=$(ARM_GIC_DIST_BASE) \
- ARM_GIC_CPU_BASE=$(ARM_GIC_CPU_BASE) \
- ARM_SYSTEM_COUNTER_FREQ=$(ARM_SYSTEM_COUNTER_FREQ) \
- WITH_PLATFORM_IDLE=1
-
-# For debugging. t132 will not build just monitor
-ifeq ($(STANDALONE_MONITOR), true)
-DEFINES += \
- WITH_EL3_MONITOR_ONLY=1
-endif
+++ /dev/null
-#!/usr/bin/python
-# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
-#
-# Permission is hereby granted, free of charge, to any person obtaining
-# a copy of this software and associated documentation files
-# (the "Software"), to deal in the Software without restriction,
-# including without limitation the rights to use, copy, modify, merge,
-# publish, distribute, sublicense, and/or sell copies of the Software,
-# and to permit persons to whom the Software is furnished to do so,
-# subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be
-# included in all copies or substantial portions of the Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-import shutil
-import sys
-import os
-import stat
-
-print "Generate Trusted OS Partition Image File"
-input_name = filename = sys.argv[1]
-output_name = filename = sys.argv[2]
-
-with open(input_name) as f:
- data = f.read()
-
-dest = open(output_name, 'w')
-header = "NVTOSP\0" + str(len(data)) + '\0'
-header = header + '\0' * (512-len(header)) #Align header to 512 bytes
-dest.write(header)
-
-shutil.copyfileobj(open(input_name, 'rb'), dest)
-dest.close()
-os.chmod(output_name, (stat.S_IWUSR | stat.S_IRUSR) | stat.S_IRGRP | stat.S_IROTH)
projects / 3rdparty/ote_partner/tlk.git / commitdiff