First version
[3rdparty/ote_partner/tlk.git] / arch / arm / rules.mk
1 LOCAL_DIR := $(GET_LOCAL_DIR)
2
3 MODULE := $(LOCAL_DIR)
4
5 # default to the regular arm subarch
6 SUBARCH := arm
7
8 DEFINES += \
9         ARM_CPU_$(ARM_CPU)=1
10
11 # do set some options based on the cpu core
12 HANDLED_CORE := false
13 ifeq ($(ARM_CPU),cortex-m3)
14 DEFINES += \
15         ARM_WITH_CP15=1 \
16         ARM_ISA_ARMv7=1 \
17         ARM_ISA_ARMv7M=1 \
18         ARM_WITH_THUMB=1 \
19         ARM_WITH_THUMB2=1
20 HANDLED_CORE := true
21 ONLY_THUMB := true
22 SUBARCH := arm-m
23 endif
24 ifeq ($(ARM_CPU),cortex-a15)
25 DEFINES += \
26         ARM_WITH_CP15=1         \
27         ARM_WITH_MMU=1          \
28         ARM_ISA_ARMv7=1         \
29         ARM_ISA_ARMv7A=1        \
30         ARM_WITH_VFP=1          \
31         ARM_WITH_NEON=1         \
32         ARM_WITH_THUMB=1        \
33         ARM_WITH_THUMB2=1       \
34         ARM_WITH_CACHE=1        \
35         ARM_WITH_SCU=0          \
36         ARM_WITH_L2=0
37 HANDLED_CORE := true
38 #CFLAGS += -mfpu=neon -mfloat-abi=softfp
39 MODULE_DEPS += $(LOCAL_DIR)/arm/neon
40 endif
41 ifeq ($(ARM_CPU),cortex-a9)
42 DEFINES += \
43         ARM_WITH_CP15=1         \
44         ARM_WITH_MMU=1          \
45         ARM_ISA_ARMv7=1         \
46         ARM_ISA_ARMv7A=1        \
47         ARM_WITH_VFP=1          \
48         ARM_WITH_NEON=1         \
49         ARM_WITH_THUMB=1        \
50         ARM_WITH_THUMB2=1       \
51         ARM_WITH_CACHE=1        \
52         ARM_WITH_SCU=1          \
53         ARM_WITH_L2=0
54 HANDLED_CORE := true
55 #CFLAGS += -mfpu=neon -mfloat-abi=softfp
56 MODULE_DEPS += $(LOCAL_DIR)/arm/neon
57 endif
58 ifeq ($(ARM_CPU),cortex-a8)
59 DEFINES += \
60         ARM_WITH_CP15=1 \
61         ARM_WITH_MMU=1 \
62         ARM_ISA_ARMv7=1 \
63         ARM_ISA_ARMv7A=1 \
64         ARM_WITH_VFP=1 \
65         ARM_WITH_NEON=1 \
66         ARM_WITH_THUMB=1 \
67         ARM_WITH_THUMB2=1 \
68         ARM_WITH_CACHE=1 \
69         ARM_WITH_L2=1
70 HANDLED_CORE := true
71 #CFLAGS += -mfpu=neon -mfloat-abi=softfp
72 MODULE_DEPS += $(LOCAL_DIR)/arm/neon
73 endif
74 ifeq ($(ARM_CPU),arm1136j-s)
75 DEFINES += \
76         ARM_WITH_CP15=1 \
77         ARM_WITH_MMU=1 \
78         ARM_ISA_ARMv6=1 \
79         ARM_WITH_THUMB=1 \
80         ARM_WITH_CACHE=1 \
81         ARM_CPU_ARM1136=1
82 HANDLED_CORE := true
83 endif
84 ifeq ($(ARM_CPU),arm1176jzf-s)
85 DEFINES += \
86         ARM_WITH_CP15=1 \
87         ARM_WITH_MMU=1 \
88         ARM_ISA_ARMv6=1 \
89         ARM_WITH_VFP=1 \
90         ARM_WITH_THUMB=1 \
91         ARM_WITH_CACHE=1 \
92         ARM_CPU_ARM1136=1
93 HANDLED_CORE := true
94 endif
95 ifeq ($(ARM_CPU),arm926ej-s)
96 DEFINES += \
97         ARM_WITH_CP15=1 \
98         ARM_WITH_MMU=1 \
99         ARM_ISA_ARMv5E=1 \
100         ARM_WITH_THUMB=1 \
101         ARM_WITH_CACHE=1 \
102         ARM_CPU_ARM9=1 \
103         ARM_CPU_ARM926=1
104 HANDLED_CORE := true
105 endif
106 ifeq ($(ARM_CPU),arm7tdmi)
107 DEFINES += \
108         ARM_ISA_ARMv4=1 \
109         ARM_WITH_THUMB=1 \
110         ARM_CPU_ARM7=1
111 HANDLED_CORE := true
112 endif
113
114 ifneq ($(HANDLED_CORE),true)
115 $(warning $(LOCAL_DIR)/rules.mk doesnt have logic for arm core $(ARM_CPU))
116 $(warning this is likely to be broken)
117 endif
118
119 INCLUDES += \
120         -I$(LOCAL_DIR)/include \
121         -I$(LOCAL_DIR)/$(SUBARCH)/include
122
123 ifeq ($(SUBARCH),arm)
124 MODULE_SRCS += \
125         $(LOCAL_DIR)/arm/start.S \
126         $(LOCAL_DIR)/arm/asm.S \
127         $(LOCAL_DIR)/arm/cache-ops.S \
128         $(LOCAL_DIR)/arm/cache.c \
129         $(LOCAL_DIR)/arm/ops.S \
130         $(LOCAL_DIR)/arm/exceptions.S \
131         $(LOCAL_DIR)/arm/faults.c \
132         $(LOCAL_DIR)/arm/mmu.c \
133         $(LOCAL_DIR)/arm/task.c \
134         $(LOCAL_DIR)/arm/thread.c \
135         $(LOCAL_DIR)/arm/dcc.S \
136         $(LOCAL_DIR)/arm/cache-l2x0.c
137
138 # The monitor support is provided either as a separate binary when
139 # WITH_MONITOR_BIN = true, or as part of the secureos image when
140 # it's false.
141 #
142 # When used with a separate binary, monitor_interface.S is used to
143 # pass back/forth between secureos and the monitor, otherwise the
144 # monitor support is part of the image by including monitor_vectors.S
145 # in the build.
146
147 ifeq ($(MONITOR_BIN),)
148 # full native support
149 MODULE_SRCS += \
150         $(LOCAL_DIR)/arm/monitor_vectors.S
151 else
152 # interface support
153 MODULE_SRCS += \
154         $(LOCAL_DIR)/arm/monitor_interface.S
155 endif
156
157 MODULE_ARM_OVERRIDE_SRCS := \
158         $(LOCAL_DIR)/arm/arch.c
159
160 # using either long / short MMU desc support
161 ifeq ($(ARM_WITH_LPAE),true)
162 DEFINES += \
163         ARM_WITH_LPAE=1
164 MODULE_SRCS += \
165         $(LOCAL_DIR)/arm/mmu_ldesc.c
166 else
167 MODULE_SRCS += \
168         $(LOCAL_DIR)/arm/mmu_sdesc.c
169 endif
170
171 DEFINES += \
172         ARCH_DEFAULT_STACK_SIZE=4096
173 endif
174 ifeq ($(SUBARCH),arm-m)
175 MODULE_SRCS += \
176         $(LOCAL_DIR)/arm-m/arch.c \
177         $(LOCAL_DIR)/arm-m/vectab.c \
178         $(LOCAL_DIR)/arm-m/start.c \
179         $(LOCAL_DIR)/arm-m/exceptions.c \
180         $(LOCAL_DIR)/arm-m/thread.c \
181         $(LOCAL_DIR)/arm-m/systick.c
182
183 INCLUDES += \
184         -I$(LOCAL_DIR)/arm-m/CMSIS/Include
185
186 DEFINES += \
187         ARCH_DEFAULT_STACK_SIZE=1024
188 endif
189
190 # If platform sets ARM_USE_MMU_RELOC the image will be built based on
191 # VMEMBASE and will create page table entries in start.S to the physmem
192 # it's been given (avoiding relocation by copying the image).
193
194 ifeq ($(ARM_USE_MMU_RELOC),true)
195 DEFINES += \
196         ARM_USE_MMU_RELOC=1
197 endif
198
199 ifeq ($(ARM_USE_CPU_CACHING),true)
200 DEFINES += \
201         ARM_USE_CPU_CACHING=1
202 endif
203
204 # make sure some bits were set up
205 MEMVARS_SET := 0
206 ifeq ($(ARM_USE_MMU_RELOC),true)
207 ifneq ($(VMEMBASE),)
208 MEMVARS_SET := 1
209 endif
210 ifneq ($(VMEMSIZE),)
211 MEMVARS_SET := 1
212 endif
213 ifeq ($(MEMVARS_SET),0)
214 $(error missing VMEMBASE or VMEMSIZE variable, please set in target rules.mk)
215 endif
216 else
217 ifneq ($(MEMBASE),)
218 MEMVARS_SET := 1
219 endif
220 ifneq ($(MEMSIZE),)
221 MEMVARS_SET := 1
222 endif
223 DEFINES += \
224         VMEMBASE=$(MEMBASE)
225 endif
226 ifeq ($(MEMVARS_SET),0)
227 $(error missing MEMBASE or MEMSIZE variable, please set in target rules.mk)
228 endif
229
230 LIBGCC := $(shell $(TOOLCHAIN_PREFIX)gcc $(MODULE_COMPILEFLAGS) -print-libgcc-file-name)
231 $(info LIBGCC = $(LIBGCC))
232
233 $(info ARCH_COMPILEFLAGS = $(MODULE_COMPILEFLAGS))
234
235 # potentially generated files that should be cleaned out with clean make rule
236 GENERATED += \
237         $(BUILDDIR)/system-onesegment.ld \
238         $(BUILDDIR)/system-twosegment.ld
239
240 # rules for generating the linker scripts
241
242 ifeq ($(ARM_USE_MMU_RELOC),true)
243 $(BUILDDIR)/system-onesegment.ld: $(LOCAL_DIR)/system-onesegment.ld $(CONFIGHEADER)
244         @echo generating $@
245         @$(MKDIR)
246         $(NOECHO)sed "s/%MEMBASE%/$(VMEMBASE)/;s/%MEMSIZE%/$(VMEMSIZE)/" < $< > $@
247
248 $(BUILDDIR)/system-twosegment.ld: $(LOCAL_DIR)/system-twosegment.ld $(CONFIGHEADER)
249         @echo generating $@
250         @$(MKDIR)
251         $(NOECHO)sed "s/%ROMBASE%/$(ROMBASE)/;s/%MEMBASE%/$(VMEMBASE)/;s/%MEMSIZE%/$(VMEMSIZE)/" < $< > $@
252 else
253 $(BUILDDIR)/system-onesegment.ld: $(LOCAL_DIR)/system-onesegment.ld $(CONFIGHEADER)
254         @echo generating $@
255         @$(MKDIR)
256         $(NOECHO)sed "s/%MEMBASE%/$(MEMBASE)/;s/%MEMSIZE%/$(MEMSIZE)/" < $< > $@
257
258 $(BUILDDIR)/system-twosegment.ld: $(LOCAL_DIR)/system-twosegment.ld $(CONFIGHEADER)
259         @echo generating $@
260         @$(MKDIR)
261         $(NOECHO)sed "s/%ROMBASE%/$(ROMBASE)/;s/%MEMBASE%/$(MEMBASE)/;s/%MEMSIZE%/$(MEMSIZE)/" < $< > $@
262 endif
263
264 include make/module.mk